diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_adc_v2.c b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_adc_v2.c
index 6c3c8bb5284b..c1e8eb78ed3b 100644
--- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_adc_v2.c
+++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_adc_v2.c
@@ -21,7 +21,7 @@
 
 #if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3) || defined(BSP_USING_ADC4)
 
-#define DRV_DEBUG
+// #define DRV_DEBUG
 #define LOG_TAG "drv.adc"
 #include <drv_log.h>
 
diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.c b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.c
index afbb79c29851..b7be3a65c3af 100644
--- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.c
+++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.c
@@ -25,9 +25,9 @@
  */
 
 /* debug option */
-/* #define ETH_RX_DUMP */
-/* #define ETH_TX_DUMP */
-/* #define DRV_DEBUG */
+// #define ETH_RX_DUMP
+// #define ETH_TX_DUMP
+// #define DRV_DEBUG
 #define LOG_TAG             "drv.emac"
 #include <drv_log.h>
 
@@ -960,6 +960,17 @@ static rt_err_t eth_allocate_dma_memory(void)
     return RT_EOK;
 }
 
+#ifdef RT_USING_DEVICE_OPS
+const static struct rt_device_ops eth_ops = {
+    rt_stm32_eth_init,
+    rt_stm32_eth_open,
+    rt_stm32_eth_close,
+    rt_stm32_eth_read,
+    rt_stm32_eth_write,
+    rt_stm32_eth_control,
+};
+#endif
+
 /* Register the EMAC device */
 static int rt_hw_stm32_eth_init(void)
 {
@@ -1003,12 +1014,16 @@ static int rt_hw_stm32_eth_init(void)
     stm32_eth_device.dev_addr[4] = *(rt_uint8_t *)(UID_BASE + 2);
     stm32_eth_device.dev_addr[5] = *(rt_uint8_t *)(UID_BASE + 0);
 
+#ifdef RT_USING_DEVICE_OPS
+    stm32_eth_device.parent.parent.ops = &eth_ops;
+#else
     stm32_eth_device.parent.parent.init = rt_stm32_eth_init;
     stm32_eth_device.parent.parent.open = rt_stm32_eth_open;
     stm32_eth_device.parent.parent.close = rt_stm32_eth_close;
     stm32_eth_device.parent.parent.read = rt_stm32_eth_read;
     stm32_eth_device.parent.parent.write = rt_stm32_eth_write;
     stm32_eth_device.parent.parent.control = rt_stm32_eth_control;
+#endif
     stm32_eth_device.parent.parent.user_data = RT_NULL;
     stm32_eth_device.parent.eth_rx = rt_stm32_eth_rx;
     stm32_eth_device.parent.eth_tx = rt_stm32_eth_tx;
diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.h b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.h
index 2d35e3bb5eb3..29643bd56080 100644
--- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.h
+++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_eth.h
@@ -96,6 +96,22 @@
 #define PHY_Status_SPEED_10M(sr)    (!PHY_Status_SPEED_100M(sr))
 #define PHY_Status_SPEED_100M(sr)   ((sr) & PHY_100M_MASK)
 #define PHY_Status_FULL_DUPLEX(sr)  ((sr) & PHY_FULL_DUPLEX_MASK)
-#endif /* defined(PHY_USING_LAN8720A) || defined(PHY_USING_LAN8742A) */
+
+#elif defined(PHY_USING_SR8201F)
+/*  The PHY interrupt source flag register. */
+#define PHY_INTERRUPT_FLAG_REG      0x1DU
+/*  The PHY interrupt mask register. */
+#define PHY_INTERRUPT_MASK_REG      0x1EU
+#define PHY_LINK_DOWN_MASK          (1 << 4)
+#define PHY_AUTO_NEGO_COMPLETE_MASK (1 << 6)
+/*  The PHY status register. */
+#define PHY_Status_REG              0x00U
+#define PHY_10M_MASK                (1 << 2)
+#define PHY_100M_MASK               (1 << 13)
+#define PHY_FULL_DUPLEX_MASK        (1 << 8)
+#define PHY_Status_SPEED_10M(sr)    ((sr) & PHY_10M_MASK)
+#define PHY_Status_SPEED_100M(sr)   ((sr) & PHY_100M_MASK)
+#define PHY_Status_FULL_DUPLEX(sr)  ((sr) & PHY_FULL_DUPLEX_MASK)
+#endif
 
 #endif /* __DRV_ETH_H__ */
diff --git a/components/drivers/adc/adc_v2.c b/components/drivers/adc/adc_v2.c
index 9ec3b6ac111e..c504e2470007 100644
--- a/components/drivers/adc/adc_v2.c
+++ b/components/drivers/adc/adc_v2.c
@@ -21,7 +21,7 @@
 #include <rtthread.h>
 
 #define DBG_TAG "adc.v2"
-#define DBG_LVL DBG_LOG
+#define DBG_LVL DBG_INFO
 #include <rtdbg.h>
 
 #include <drivers/adc_v2.h>