From 0479f8b8290294218779ae8db10c321e59943c4a Mon Sep 17 00:00:00 2001
From: XYenChi <oriachiuan@gmail.com>
Date: Sun, 19 Apr 2026 23:32:28 +0800
Subject: [PATCH 01/21] Add RISC-V Blocklist (#1)

* Add RISC-V 64 BLOCK_LIST

* Skip long time testcase

Co-authored-by: Cursor <cursoragent@cursor.com>
---
 test/run_test.py    | 47 +++++++++++++++++++++++++++++++++++++++++++++
 test/test_linalg.py |  1 +
 2 files changed, 48 insertions(+)

diff --git a/test/run_test.py b/test/run_test.py
index be7973e119c65..45e64cd912960 100755
--- a/test/run_test.py
+++ b/test/run_test.py
@@ -120,6 +120,7 @@ def upload_adhoc_failure_json(*args, **kwargs):
 INDUCTOR_TEST_PREFIX = "inductor"
 IS_SLOW = "slow" in TEST_CONFIG or "slow" in BUILD_ENVIRONMENT
 IS_S390X = platform.machine() == "s390x"
+IS_RISCV64 = platform.machine() == "riscv64"
 
 
 # Note [ROCm parallel CI testing]
@@ -295,6 +296,45 @@ def __contains__(self, item):
     "test_xpu",
 ]
 
+RISCV64_BLOCKLIST = [
+    # disable distributed related test
+    "inductor/test_distributed_patterns"
+    "fx/test_dce_pass"
+    "export/test_cpp_serdes"
+    "export/test_export"
+    "export/test_export_strict"
+    "export/test_export_training_ir_to_run_decomp"
+    "export/test_retraceability"
+    "export/test_serdes"
+    "export/test_strict_export_v2"
+    "test_public_bindings"
+    # quantized engine NoQEngine is not supported
+    "test_torch"
+    "ao/sparsity/test_composability"
+    # QNNPACK is not supported
+    "export/test_converter"
+    # record_contex_cpp is not support on non-linux non-x86_64 platforms
+    "torch_np/numpy_tests/core/test_numeric"
+    # Failed to import torch.distributed.run: cannot import name 'Store' from 'torch.distributed'
+    "test_testing"
+    # TODO:L1 cache size = 0, need to fix
+    "inductor/test_cpu_select_algorithm"
+    "inductor/test_aot_inductor_arrayref"
+    "inductor/test_cpu_repro"
+    # TODO:scalar value not equal, need to fix
+    "profiler/test_profiler"
+    # TODO precision
+    "test_binary_ufuncs"
+    "test_decomp"
+    # TODO no CUDA related module
+    "quantization/core/test_workflow_module"  # TestFakeQuantize.test_fq_module_per_channel
+    "quantization/core/test_workflow_ops"
+    "quantization/core/test_quantized_op"
+    # z3-solver build fail
+    "test_proxy_tensor"
+]
+
+
 # The tests inside these files should never be run in parallel with each other
 RUN_PARALLEL_BLOCKLIST = [
     "test_extension_utils",
@@ -1980,6 +2020,13 @@ def get_selected_tests(options) -> list[str]:
             selected_tests,
             "Skip distributed tests on s390x",
         )
+    elif IS_RISCV64:
+        selected_tests = exclude_tests(RISCV64_BLOCKLIST, selected_tests, "on riscv64")
+        selected_tests = exclude_tests(
+            DISTRIBUTED_TESTS,
+            selected_tests,
+            "Skip distributed tests on riscv64",
+        )
 
     # skip all distributed tests if distributed package is not available.
     if not dist.is_available():
diff --git a/test/test_linalg.py b/test/test_linalg.py
index 7f5d873c03d64..4bdd3dd2d1543 100644
--- a/test/test_linalg.py
+++ b/test/test_linalg.py
@@ -7996,6 +7996,7 @@ def test_matrix_exp_backward_input_validation(self, device, dtype):
         with self.assertRaisesRegex(RuntimeError, "must be batches of square matrices"):
             torch.ops.aten.matrix_exp_backward(non_square, grad_non_square)
 
+    @slowTest
     @skipCUDAIfNoMagmaAndNoLinalgsolver
     @skipCPUIfNoLapack
     @dtypes(torch.float, torch.double, torch.complex64, torch.complex128)

From fb0bd0a687c1660d9b11a860115582e4b73b55fc Mon Sep 17 00:00:00 2001
From: Bo YU <tsu.yubo@gmail.com>
Date: Wed, 22 Apr 2026 08:10:52 +0000
Subject: [PATCH 02/21] add riscv64 ci

---
 .github/workflows/ci-riscv64.yml | 99 ++++++++++++++++++++++++++++++++
 1 file changed, 99 insertions(+)
 create mode 100644 .github/workflows/ci-riscv64.yml

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
new file mode 100644
index 0000000000000..ffc859265b3c9
--- /dev/null
+++ b/.github/workflows/ci-riscv64.yml
@@ -0,0 +1,99 @@
+# Note: this runner is provided externally, so we minimize its access to
+# secrets.
+on:
+  push:
+    branches: [riscv]
+
+  pull_request_target:
+    types: [opened, synchronize, reopened]
+  
+
+name: CI (riscv64)
+
+permissions:
+  contents: read
+  # No permissions to secrets.
+
+concurrency:
+  group: ${{ github.workflow }}-${{ github.head_ref || github.run_id }}
+  cancel-in-progress: true
+
+# FIXME: Drop this
+env:
+  RUSTFLAGS: -D warnings
+  CARGO_TERM_COLOR: always
+
+jobs:
+  build:
+    name: Build and test
+    runs-on: [self-hosted, linux, amd64]
+    # This is in its own separate environment.
+    environment: riscv64
+    steps:
+      - name: Checkout repo
+        uses: actions/checkout@v4
+        with:
+          fetch-depth: 0   # merge-base
+
+      - name: Extract PR info
+        run: |
+          echo "BASE_SHA=${{ github.event.pull_request.base.sha }}" >> $GITHUB_ENV
+          echo "HEAD_SHA=${{ github.event.pull_request.head.sha }}" >> GITHUB_ENV
+          echo "PR_NUMBER=${{ github.event.pull_request.number }}" >> GITHUB_ENV
+
+      - name: Diff base and head
+        run: |
+          if [ "${{ github.event_name }}" = "pull_request" ]; then
+          echo "Push PR build"
+            BASE_REF="${{ github.base_ref }}"
+            HEAD_REF="${{ github.head_ref }}"
+
+            echo "Base ref: $BASE_REF"
+            echo "Head ref: $HEAD_REF"
+
+            # 强约束: PR 必须基于 riscv
+            if [ "$BASE_REF" != "riscv" ]; then
+              echo "ERROR: PR must target 'riscv' branch, got '$BASE_REF'"
+              exit 1
+            fi
+
+            BASE="$BASE_SHA"
+            HEAD="$HEAD_SHA"
+          else
+            echo "Push to riscv"
+            # 统一用 riscv 作为 baseline
+            git fetch origin riscv
+
+            BASE=$(git merge-base HEAD origin/main)
+            HEAD=$(git rev-parse HEAD)
+
+          fi
+
+          echo "BASE_COMMIT=$BASE" >> $GITHUB_ENV
+          echo "HEAD_COMMIT=$HEAD" >> $GITHUB_ENV
+
+          echo "Base: $BASE"
+          echo "Head: $HEAD"
+
+      - name: Generate patch
+        run: |
+          echo "Generating patch..."
+
+          git diff $BASE_COMMIT $HEAD_COMMIT > patch.diff
+
+          echo "Patch size:"
+          wc -l patch.diff
+          cat patch.diff
+
+          # 可选：避免空 patch
+          if [ ! -s patch.diff ]; then
+            echo "Warning: empty patch"
+          fi
+
+      - name: Trigger Jenkins Job
+        run: |
+          export BASE_COMMIT=${BASE_COMMIT}
+          export PATCH_FILE=$(pwd)/patch.diff
+          export GITHUB_PR=${PR_NUMBER:-0}
+
+          #bash /home/jenkins/scripts/jenkins-run.sh

From 98c8c8a024e728544598627dd68a63c7eaa33ce9 Mon Sep 17 00:00:00 2001
From: vimer <yuzibode@126.com>
Date: Fri, 24 Apr 2026 14:58:31 +0800
Subject: [PATCH 03/21] Test ci with PR (#8)

* Add riscv64 ci with PR
---
 .github/workflows/ci-riscv64.yml | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index ffc859265b3c9..c14ce1e4c3efa 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -6,7 +6,6 @@ on:
 
   pull_request_target:
     types: [opened, synchronize, reopened]
-  
 
 name: CI (riscv64)
 
@@ -33,7 +32,7 @@ jobs:
       - name: Checkout repo
         uses: actions/checkout@v4
         with:
-          fetch-depth: 0   # merge-base
+          fetch-depth: 3000   # shadow clone?
 
       - name: Extract PR info
         run: |
@@ -44,7 +43,7 @@ jobs:
       - name: Diff base and head
         run: |
           if [ "${{ github.event_name }}" = "pull_request" ]; then
-          echo "Push PR build"
+            echo "Push PR build"
             BASE_REF="${{ github.base_ref }}"
             HEAD_REF="${{ github.head_ref }}"
 
@@ -57,8 +56,12 @@ jobs:
               exit 1
             fi
 
-            BASE="$BASE_SHA"
-            HEAD="$HEAD_SHA"
+            // need to get contents of the PR
+            git fetch origin pull/${{ github.event.pull_request.number }}/head:pr-head
+            git fetch origin pull/${{ github.event.pull_request.number }}/base:pr-base
+
+            BASE=$(git merge-base pr-base pr-head)
+            HEAD=pr-head
           else
             echo "Push to riscv"
             # 统一用 riscv 作为 baseline

From 26aab047a905057663918d956254208a6a1b15ea Mon Sep 17 00:00:00 2001
From: Bo YU <tsu.yubo@gmail.com>
Date: Fri, 24 Apr 2026 07:06:46 +0000
Subject: [PATCH 04/21] Fix no main brach issue
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

⭐ Run Main Diff base and head
Push to riscv
From https://github.com/RuyiAI-Stack/pytorch
 * branch              riscv      -> FETCH_HEAD
fatal: Not a valid object name origin/main
Error:   ❌  Failure - Main Diff base and head
Error: exit status 128
---
 .github/workflows/ci-riscv64.yml | 23 +++++++++++------------
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index c14ce1e4c3efa..3b3ddd23483e7 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -33,16 +33,16 @@ jobs:
         uses: actions/checkout@v4
         with:
           fetch-depth: 3000   # shadow clone?
+          ref: ${{ github.sha }} # including latest sha
 
       - name: Extract PR info
         run: |
           echo "BASE_SHA=${{ github.event.pull_request.base.sha }}" >> $GITHUB_ENV
           echo "HEAD_SHA=${{ github.event.pull_request.head.sha }}" >> GITHUB_ENV
-          echo "PR_NUMBER=${{ github.event.pull_request.number }}" >> GITHUB_ENV
-
+         
       - name: Diff base and head
         run: |
-          if [ "${{ github.event_name }}" = "pull_request" ]; then
+          if [[ "${{ github.event_name }}" = "pull_request" || "${{ github.event_name }}" == "pull_request_target" ]]; then
             echo "Push PR build"
             BASE_REF="${{ github.base_ref }}"
             HEAD_REF="${{ github.head_ref }}"
@@ -56,19 +56,19 @@ jobs:
               exit 1
             fi
 
-            // need to get contents of the PR
+            # need to get contents of the PR
             git fetch origin pull/${{ github.event.pull_request.number }}/head:pr-head
-            git fetch origin pull/${{ github.event.pull_request.number }}/base:pr-base
-
-            BASE=$(git merge-base pr-base pr-head)
+            git fetch origin main
+            BASE=$(git merge-base pr-head origin/main)
             HEAD=pr-head
           else
             echo "Push to riscv"
             # 统一用 riscv 作为 baseline
-            git fetch origin riscv
+            git fetch origin main
+            #git fetch origin riscv
 
-            BASE=$(git merge-base HEAD origin/main)
-            HEAD=$(git rev-parse HEAD)
+            BASE=$(git merge-base ${{ github.sha }} origin/main) # The latest commit
+            HEAD=${{ github.sha }}
 
           fi
 
@@ -97,6 +97,5 @@ jobs:
         run: |
           export BASE_COMMIT=${BASE_COMMIT}
           export PATCH_FILE=$(pwd)/patch.diff
-          export GITHUB_PR=${PR_NUMBER:-0}
 
-          #bash /home/jenkins/scripts/jenkins-run.sh
+          bash /home/jenkins/scripts/jenkins-run.sh

From 72843ab51037a67f5aa43264005bd62682c27691 Mon Sep 17 00:00:00 2001
From: Bo YU <tsu.yubo@gmail.com>
Date: Sat, 25 Apr 2026 14:21:06 +0000
Subject: [PATCH 05/21] move the patch to dest

---
 .github/workflows/ci-riscv64.yml | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index 3b3ddd23483e7..dec68a6d12c16 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -39,7 +39,7 @@ jobs:
         run: |
           echo "BASE_SHA=${{ github.event.pull_request.base.sha }}" >> $GITHUB_ENV
           echo "HEAD_SHA=${{ github.event.pull_request.head.sha }}" >> GITHUB_ENV
-         
+
       - name: Diff base and head
         run: |
           if [[ "${{ github.event_name }}" = "pull_request" || "${{ github.event_name }}" == "pull_request_target" ]]; then
@@ -82,20 +82,20 @@ jobs:
         run: |
           echo "Generating patch..."
 
-          git diff $BASE_COMMIT $HEAD_COMMIT > patch.diff
+          SHORT_HEAD=${HEAD_COMMIT:0:7}
+          PATCH_NAME="patch_${SHORT_HEAD}.patch"
+
+          git diff $BASE_COMMIT $HEAD_COMMIT > $PATCH_NAME
 
           echo "Patch size:"
-          wc -l patch.diff
-          cat patch.diff
+          wc -l $PATCH_NAME
 
-          # 可选：避免空 patch
-          if [ ! -s patch.diff ]; then
-            echo "Warning: empty patch"
-          fi
+          cp $PATCH_NAME /home/jenkins/patch/
+          cat /home/jenkins/patch/$PATCH_NAME
 
       - name: Trigger Jenkins Job
         run: |
           export BASE_COMMIT=${BASE_COMMIT}
           export PATCH_FILE=$(pwd)/patch.diff
 
-          bash /home/jenkins/scripts/jenkins-run.sh
+          #bash /home/jenkins/scripts/jenkins-run.sh

From 7338bc0422e101d7a183d4128b3fac93b78b3e44 Mon Sep 17 00:00:00 2001
From: XYenChi <oriachiuan@gmail.com>
Date: Mon, 27 Apr 2026 10:59:07 +0800
Subject: [PATCH 06/21] Fix block list format and remove
 test_cpu_select_algorithm (#4)

* mklnn is unavailable on RISC-V

* Remove test_cpu_select_algorithm from block_list

* Fix block list format
---
 test/inductor/test_cpu_select_algorithm.py |  2 +
 test/run_test.py                           | 52 +++++++++++-----------
 2 files changed, 28 insertions(+), 26 deletions(-)

diff --git a/test/inductor/test_cpu_select_algorithm.py b/test/inductor/test_cpu_select_algorithm.py
index f35da9b6094d8..cdb7b3a95147f 100644
--- a/test/inductor/test_cpu_select_algorithm.py
+++ b/test/inductor/test_cpu_select_algorithm.py
@@ -1648,6 +1648,7 @@ def forward(self, x):
         vec_amx = VecAMX()
         self._check_amx_counter(vec_amx)
 
+    @unittest.skipIf(not torch._C._has_mkldnn, "MKLDNN is not enabled")
     @inductor_config.patch({"freezing": True})
     @patches
     @torch.no_grad
@@ -1766,6 +1767,7 @@ def forward(self, x, scale):
             vec_amx = VecAMX()
             self._check_amx_counter(vec_amx)
 
+    @unittest.skipIf(not torch._C._has_mkldnn, "MKLDNN is not enabled")
     @inductor_config.patch({"freezing": True, "cpp.enable_concat_linear": True})
     @patches
     @torch.no_grad
diff --git a/test/run_test.py b/test/run_test.py
index 45e64cd912960..a7bd7fbdbd6d9 100755
--- a/test/run_test.py
+++ b/test/run_test.py
@@ -298,40 +298,40 @@ def __contains__(self, item):
 
 RISCV64_BLOCKLIST = [
     # disable distributed related test
-    "inductor/test_distributed_patterns"
-    "fx/test_dce_pass"
-    "export/test_cpp_serdes"
-    "export/test_export"
-    "export/test_export_strict"
-    "export/test_export_training_ir_to_run_decomp"
-    "export/test_retraceability"
-    "export/test_serdes"
-    "export/test_strict_export_v2"
-    "test_public_bindings"
+    "inductor/test_distributed_patterns",
+    "fx/test_dce_pass",
+    "export/test_cpp_serdes",
+    "export/test_export",
+    "export/test_export_strict",
+    "export/test_export_training_ir_to_run_decomp",
+    "export/test_retraceability",
+    "export/test_serdes",
+    "export/test_strict_export_v2",
+    "test_public_bindings",
     # quantized engine NoQEngine is not supported
-    "test_torch"
-    "ao/sparsity/test_composability"
+    "test_torch",
+    "ao/sparsity/test_composability",
     # QNNPACK is not supported
-    "export/test_converter"
+    "export/test_converter",
     # record_contex_cpp is not support on non-linux non-x86_64 platforms
-    "torch_np/numpy_tests/core/test_numeric"
+    "torch_np/numpy_tests/core/test_numeric",
     # Failed to import torch.distributed.run: cannot import name 'Store' from 'torch.distributed'
-    "test_testing"
-    # TODO:L1 cache size = 0, need to fix
-    "inductor/test_cpu_select_algorithm"
-    "inductor/test_aot_inductor_arrayref"
-    "inductor/test_cpu_repro"
+    "test_testing",
+    "inductor/test_aot_inductor_arrayref",
+    "inductor/test_cpu_repro",
+    # TODO: mkldnn not available, shape guard failures on RISC-V
+    "inductor/test_cpu_select_algorithm",
     # TODO:scalar value not equal, need to fix
-    "profiler/test_profiler"
+    "profiler/test_profiler",
     # TODO precision
-    "test_binary_ufuncs"
-    "test_decomp"
+    "test_binary_ufuncs",
+    "test_decomp",
     # TODO no CUDA related module
-    "quantization/core/test_workflow_module"  # TestFakeQuantize.test_fq_module_per_channel
-    "quantization/core/test_workflow_ops"
-    "quantization/core/test_quantized_op"
+    "quantization/core/test_workflow_module",  # TestFakeQuantize.test_fq_module_per_channel
+    "quantization/core/test_workflow_ops",
+    "quantization/core/test_quantized_op",
     # z3-solver build fail
-    "test_proxy_tensor"
+    "test_proxy_tensor",
 ]
 
 

From 7444a799cf39d5c9046ef513057381410f61b476 Mon Sep 17 00:00:00 2001
From: Bo YU <tsu.yubo@gmail.com>
Date: Sat, 25 Apr 2026 14:21:06 +0000
Subject: [PATCH 07/21] move the patch to dest

---
 .github/workflows/ci-riscv64.yml | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index dec68a6d12c16..d8cd1ecdd8de3 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -57,14 +57,14 @@ jobs:
             fi
 
             # need to get contents of the PR
-            git fetch origin pull/${{ github.event.pull_request.number }}/head:pr-head
-            git fetch origin main
+            git fetch --quiet origin pull/${{ github.event.pull_request.number }}/head:pr-head
+            git fetch --quiet origin main
             BASE=$(git merge-base pr-head origin/main)
             HEAD=pr-head
           else
             echo "Push to riscv"
             # 统一用 riscv 作为 baseline
-            git fetch origin main
+            git fetch --quiet origin main
             #git fetch origin riscv
 
             BASE=$(git merge-base ${{ github.sha }} origin/main) # The latest commit
@@ -93,9 +93,8 @@ jobs:
           cp $PATCH_NAME /home/jenkins/patch/
           cat /home/jenkins/patch/$PATCH_NAME
 
+          echo "PATCH_FILE=$PATCH_NAME" >> $GITHUB_ENV
+
       - name: Trigger Jenkins Job
         run: |
-          export BASE_COMMIT=${BASE_COMMIT}
-          export PATCH_FILE=$(pwd)/patch.diff
-
-          #bash /home/jenkins/scripts/jenkins-run.sh
+          bash /home/jenkins/scripts/jenkins-run.sh $BASE_COMMIT  $PATCH_FILE

From c8cb84b5fd499213cd66fbf7311238418ef20930 Mon Sep 17 00:00:00 2001
From: vimer <yuzibode@126.com>
Date: Sun, 3 May 2026 09:05:59 +0800
Subject: [PATCH 08/21] [blacklist]: update it (#11)

These cases are too slow on riscv64, adding them to here simply

Drop test_torch from the list because it is one core case
---
 test/run_test.py | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/test/run_test.py b/test/run_test.py
index a7bd7fbdbd6d9..f1363b7741963 100755
--- a/test/run_test.py
+++ b/test/run_test.py
@@ -308,8 +308,6 @@ def __contains__(self, item):
     "export/test_serdes",
     "export/test_strict_export_v2",
     "test_public_bindings",
-    # quantized engine NoQEngine is not supported
-    "test_torch",
     "ao/sparsity/test_composability",
     # QNNPACK is not supported
     "export/test_converter",
@@ -332,6 +330,15 @@ def __contains__(self, item):
     "quantization/core/test_quantized_op",
     # z3-solver build fail
     "test_proxy_tensor",
+    # too slow on riscv64
+    # 53013.55 s
+    "functorch/test_aotdispatch",
+    # 25069 s
+    "functorch/test_ops",
+    # 17528 s
+    "test_transformers",
+    # 10897 s
+    "functorch/test_vmap",
 ]
 
 

From abf25ccb035c4b3ac43be730a74a128aab2ca823 Mon Sep 17 00:00:00 2001
From: vimer <yuzibode@126.com>
Date: Thu, 7 May 2026 12:32:52 +0800
Subject: [PATCH 09/21] Use commit sha on PR workflow (#12)

---
 .github/workflows/ci-riscv64.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index d8cd1ecdd8de3..44cd575a01e01 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -60,7 +60,7 @@ jobs:
             git fetch --quiet origin pull/${{ github.event.pull_request.number }}/head:pr-head
             git fetch --quiet origin main
             BASE=$(git merge-base pr-head origin/main)
-            HEAD=pr-head
+            HEAD=$(git rev-parse pr-head)
           else
             echo "Push to riscv"
             # 统一用 riscv 作为 baseline

From 930f39f629b9506295d62eed081fafcb3fc07a69 Mon Sep 17 00:00:00 2001
From: Yixuan Chen <chenyixuan@iscas.ac.cn>
Date: Sun, 26 Apr 2026 00:49:38 +0800
Subject: [PATCH 10/21] Fix bytes_to_scalar for float/complex on RISC-V

bytes_to_scalar previously round-tripped raw bytes through Python
float/complex values (via ctypes) before constructing the tensor. This
loses NaN bit patterns on architectures (such as RISC-V) that
canonicalize NaNs in floating-point loads/conversions, causing
test_bytes_to_scalar_cpu_{float32,float64,complex64,complex128} to
fail with mismatched storage bytes.

Construct the scalar tensor by writing the raw bytes directly into its
untyped storage so all input bit patterns (including NaN payloads) are
preserved exactly.
---
 torch/testing/_internal/common_utils.py | 37 +++++++++++--------------
 1 file changed, 16 insertions(+), 21 deletions(-)

diff --git a/torch/testing/_internal/common_utils.py b/torch/testing/_internal/common_utils.py
index eb65038aeef74..8e3a365855613 100644
--- a/torch/testing/_internal/common_utils.py
+++ b/torch/testing/_internal/common_utils.py
@@ -6034,27 +6034,22 @@ def check_bytes(byte_list):
             if not (0 <= byte <= 255):
                 raise AssertionError(f"byte value out of range: expected 0 <= byte <= 255, got {byte}")
 
-    if dtype.is_complex:
-        if len(byte_list) != (num_bytes * 2):
-            raise AssertionError(
-                f"expected len(byte_list) == {num_bytes * 2} for complex dtype, got {len(byte_list)}"
-            )
-        check_bytes(byte_list)
-        real = ctype.from_buffer((ctypes.c_byte * num_bytes)(
-            *byte_list[:num_bytes])).value
-        imag = ctype.from_buffer((ctypes.c_byte * num_bytes)(
-            *byte_list[num_bytes:])).value
-        res = real + 1j * imag
-    else:
-        if len(byte_list) != num_bytes:
-            raise AssertionError(
-                f"expected len(byte_list) == {num_bytes}, got {len(byte_list)}"
-            )
-        check_bytes(byte_list)
-        res = ctype.from_buffer((ctypes.c_byte * num_bytes)(
-            *byte_list)).value
-
-    return torch.tensor(res, device=device, dtype=dtype)
+    expected_len = num_bytes * 2 if dtype.is_complex else num_bytes
+    if len(byte_list) != expected_len:
+        raise AssertionError(
+            f"expected len(byte_list) == {expected_len}"
+            f"{' for complex dtype' if dtype.is_complex else ''}, got {len(byte_list)}"
+        )
+    check_bytes(byte_list)
+
+    # Write bytes directly into storage to preserve exact bit patterns
+    # (e.g. NaN payloads, which are not preserved when round-tripping through
+    # Python float/complex, especially on architectures like RISC-V that
+    # canonicalize NaNs).
+    res = torch.empty((), dtype=dtype, device=device)
+    src = torch.tensor(byte_list, dtype=torch.uint8, device=device)
+    res.untyped_storage().copy_(src.untyped_storage())
+    return res
 
 
 def copy_func(f):

From 782e92a75e8db8b61985310b89ec1860bc9688c3 Mon Sep 17 00:00:00 2001
From: Yixuan Chen <chenyixuan@iscas.ac.cn>
Date: Wed, 22 Apr 2026 15:27:45 +0800
Subject: [PATCH 11/21] Fix test_float_to_int_conversion_nonfinite for RISC-V

RISC-V converts non-finite floats to integers by saturating:
-inf -> min, inf/nan -> max for wider int types.
Add IS_RISCV64 flag and RISC-V-specific reference values.

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
---
 test/test_tensor_creation_ops.py        | 8 ++++++++
 torch/testing/_internal/common_utils.py | 1 +
 2 files changed, 9 insertions(+)

diff --git a/test/test_tensor_creation_ops.py b/test/test_tensor_creation_ops.py
index fcaba5a15a558..fa93e7607077a 100644
--- a/test/test_tensor_creation_ops.py
+++ b/test/test_tensor_creation_ops.py
@@ -33,6 +33,7 @@
     IS_SANDCASTLE,
     IS_S390X,
     IS_ARM64,
+    IS_RISCV64,
     parametrize,
     TEST_WITH_TORCHDYNAMO,
     xfailIfTorchDynamo,
@@ -1127,6 +1128,13 @@ def test_float_to_int_conversion_nonfinite(self, device, dtype):
 
         if dtype == torch.bool:
             refs = (True, True, True)
+        elif IS_RISCV64:
+            if dtype in (torch.int32, torch.int64):
+                refs = (torch.iinfo(dtype).min, torch.iinfo(dtype).max, torch.iinfo(dtype).max)
+            elif dtype == torch.uint8:
+                refs = (0, torch.iinfo(dtype).max, torch.iinfo(dtype).max)
+            elif dtype in (torch.int8, torch.int16):
+                refs = (0, -1, -1)
         elif IS_ARM64:
             refs = (torch.iinfo(dtype).min, torch.iinfo(dtype).max, 0)
             if dtype in (torch.int8, torch.int16):
diff --git a/torch/testing/_internal/common_utils.py b/torch/testing/_internal/common_utils.py
index 8e3a365855613..5c87633309c64 100644
--- a/torch/testing/_internal/common_utils.py
+++ b/torch/testing/_internal/common_utils.py
@@ -1652,6 +1652,7 @@ def printErrors(self) -> None:
 IS_PPC = platform.machine() == "ppc64le"
 IS_X86 = platform.machine() in ('x86_64', 'i386')
 IS_ARM64 = platform.machine() in ('arm64', 'aarch64', 'ARM64')
+IS_RISCV64 = platform.machine() == 'riscv64'
 IS_S390X = platform.machine() == "s390x"
 IS_AVX512_VNNI_SUPPORTED = torch.cpu.get_capabilities().get("avx512_vnni", False)
 IS_CPU_EXT_SVE_SUPPORTED = torch.cpu.get_capabilities().get("sve", False)

From 12e0d7031fe47799a7ea1aa57357dc1048cceda8 Mon Sep 17 00:00:00 2001
From: Yixuan Chen <chenyixuan@iscas.ac.cn>
Date: Sat, 9 May 2026 15:59:22 +0800
Subject: [PATCH 12/21] Skip test if no qengine

---
 test/test_torch.py                      | 11 +++++++++--
 torch/testing/_internal/common_utils.py |  4 ++++
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/test/test_torch.py b/test/test_torch.py
index 805eed45b1aca..9c981ea895221 100644
--- a/test/test_torch.py
+++ b/test/test_torch.py
@@ -43,7 +43,7 @@
     wrapDeterministicFlagAPITest, DeterministicGuard, CudaSyncGuard,
     bytes_to_scalar, parametrize, noncontiguous_like,
     AlwaysWarnTypedStorageRemoval, TEST_WITH_TORCHDYNAMO, xfailIfTorchDynamo,
-    xfailIfS390X, set_warn_always_context, decorateIf, isRocmArchAnyOf,
+    xfailIfS390X, xfailIfRISCV, set_warn_always_context, decorateIf, isRocmArchAnyOf,
     IS_MACOS,
 )
 from multiprocessing.reduction import ForkingPickler
@@ -9852,14 +9852,21 @@ def test_type(self):
     # FIXME: port to a quantization test suite
     @unittest.skipIf(IS_MACOS, "https://github.com/pytorch/pytorch/issues/157245")
     @xfailIfS390X
+    @xfailIfRISCV
     def test_qengine(self):
         qengines = torch.backends.quantized.supported_engines
+        if not qengines:
+            self.skipTest("No quantized engines supported on this platform")
         original_qe = torch.backends.quantized.engine
         for qe in qengines:
             torch.backends.quantized.engine = qe
             if torch.backends.quantized.engine != qe:
                 raise AssertionError(f"qengine not set successfully: expected {qe}, got {torch.backends.quantized.engine}")
-        torch.backends.quantized.engine = original_qe
+        # On platforms where no qengine is compiled in as the default (e.g. RISC-V),
+        # the initial engine reads as "none" (NoQEngine), which is not a valid value
+        # to pass back to _set_qengine. Only restore if it was a real engine.
+        if original_qe != "none":
+            torch.backends.quantized.engine = original_qe
 
     def test_terminate_handler_on_crash(self):
         cmd = [sys.executable, '-c', "import os; os.environ[\"TORCH_CUSTOM_TERMINATE\"] ='1'; \
diff --git a/torch/testing/_internal/common_utils.py b/torch/testing/_internal/common_utils.py
index 5c87633309c64..8d130a7fe1463 100644
--- a/torch/testing/_internal/common_utils.py
+++ b/torch/testing/_internal/common_utils.py
@@ -1658,6 +1658,7 @@ def printErrors(self) -> None:
 IS_CPU_EXT_SVE_SUPPORTED = torch.cpu.get_capabilities().get("sve", False)
 IS_CPU_CAPABILITY_SVE = torch._C._get_cpu_capability() in ("SVE128", "SVE256")
 IS_CPU_CAPABILITY_SVE256 = torch._C._get_cpu_capability() == "SVE256"
+IS_RISCV = platform.machine() in ('riscv64', 'riscv32')
 
 if IS_WINDOWS:
     @contextmanager
@@ -2499,6 +2500,9 @@ def wrap_fn(self, *args, **kwargs):
 def xfailIfS390X(func):
     return unittest.expectedFailure(func) if IS_S390X else func
 
+def xfailIfRISCV(func):
+    return unittest.expectedFailure(func) if IS_RISCV else func
+
 def xfailIf(condition):
     def wrapper(func):
         if condition:

From 01db43b3c5ca3af0036fe92dce9b4a7af8f8d6fd Mon Sep 17 00:00:00 2001
From: XYenChi <oriachiuan@gmail.com>
Date: Wed, 20 May 2026 14:15:08 +0800
Subject: [PATCH 13/21] Replace offical cpuinfo repo (#18)

---
 .gitmodules | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.gitmodules b/.gitmodules
index 076ce38ac7938..35feb14cec9ae 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -41,7 +41,7 @@
 [submodule "third_party/cpuinfo"]
     ignore = dirty
     path = third_party/cpuinfo
-    url = https://github.com/pytorch/cpuinfo.git
+    url = https://github.com/RuyiAI-Stack/cpuinfo.git
 [submodule "third_party/python-peachpy"]
     ignore = dirty
     path = third_party/python-peachpy

From ddad2c3bab562c78be3da6f6fe5b2ac32f7c9c61 Mon Sep 17 00:00:00 2001
From: vimer <yuzibode@126.com>
Date: Sun, 24 May 2026 23:34:18 +0800
Subject: [PATCH 14/21] [ci] split core and full ci (#20)

---
 .github/workflows/ci-riscv64.yml | 79 +++++++++++++++++++++++++++++---
 1 file changed, 72 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index 44cd575a01e01..127e0a01e36eb 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -1,5 +1,8 @@
 # Note: this runner is provided externally, so we minimize its access to
 # secrets.
+
+name: CI (riscv64)
+
 on:
   push:
     branches: [riscv]
@@ -7,8 +10,6 @@ on:
   pull_request_target:
     types: [opened, synchronize, reopened]
 
-name: CI (riscv64)
-
 permissions:
   contents: read
   # No permissions to secrets.
@@ -23,9 +24,17 @@ env:
   CARGO_TERM_COLOR: always
 
 jobs:
-  build:
-    name: Build and test
+  core-ci:
+    name: pytorch-riscv64-core-ci
     runs-on: [self-hosted, linux, amd64]
+
+    outputs:
+      base_commit: ${{ steps.meta.outputs.base_commit }}
+      head_commit: ${{ steps.meta.outputs.head_commit }}
+      patch_file: ${{ steps.patch.outputs.patch_file }}
+      ci_result_base_url: ${{ steps.jenkins.outputs.ci_result_base_url }}
+      ci_stat_url: ${{ steps.jenkins.outputs.ci_stat_url }}
+
     # This is in its own separate environment.
     environment: riscv64
     steps:
@@ -38,7 +47,7 @@ jobs:
       - name: Extract PR info
         run: |
           echo "BASE_SHA=${{ github.event.pull_request.base.sha }}" >> $GITHUB_ENV
-          echo "HEAD_SHA=${{ github.event.pull_request.head.sha }}" >> GITHUB_ENV
+          echo "HEAD_SHA=${{ github.event.pull_request.head.sha }}" >> $GITHUB_ENV
 
       - name: Diff base and head
         run: |
@@ -50,7 +59,7 @@ jobs:
             echo "Base ref: $BASE_REF"
             echo "Head ref: $HEAD_REF"
 
-            # 强约束: PR 必须基于 riscv
+            # must based on riscv
             if [ "$BASE_REF" != "riscv" ]; then
               echo "ERROR: PR must target 'riscv' branch, got '$BASE_REF'"
               exit 1
@@ -97,4 +106,60 @@ jobs:
 
       - name: Trigger Jenkins Job
         run: |
-          bash /home/jenkins/scripts/jenkins-run.sh $BASE_COMMIT  $PATCH_FILE
+          set -euo pipefail
+
+          BASE=${{ steps.meta.outputs.base_commit }}
+          PATCH=${{ steps.patch.outputs.patch_file }}
+
+          bash /home/jenkins/scripts/jenkins-run.sh $BASE_COMMIT  $PATCH_FILE | tee jenkins.log
+
+          CI_STAT_URL=$(grep -oE 'https://[^ ]+/pytorch-ci-stat\.json' jenkins.log | tail -n1)
+
+          if [[ -z "$CI_STAT_URL" ]]; then
+            echo "ERROR: cannot find pytorch-ci-stat.json URL from Jenkins log"
+            exit 1
+          fi
+
+          CI_RESULT_BASE_URL="${CI_STAT_URL%/pytorch-ci-stat.json}"
+
+          echo "ci_stat_url=$CI_STAT_URL" >> "$GITHUB_OUTPUT"
+          echo "ci_result_base_url=$CI_RESULT_BASE_URL" >> "$GITHUB_OUTPUT"
+
+          echo "CI_STAT_URL=$CI_STAT_URL"
+          echo "CI_RESULT_BASE_URL=$CI_RESULT_BASE_URL"
+
+full-ci:
+  name: pytorch-riscv64-full-ci
+  runs-on: [self-hosted, linux, amd64]
+  needs: core-ci
+  if: always()
+  continue-on-error: true
+
+  steps:
+    - name: Query existing full test result
+      shell: bash
+      run: |
+        set -euo pipefail
+
+        BASE_URL="${{ needs.core-ci.outputs.ci_result_base_url }}"
+        STAT_URL="${BASE_URL}/pytorch-ci-stat.json"
+
+        echo "STAT_URL=$STAT_URL"
+
+         curl -fsSL "$STAT_URL" -o pytorch-ci-stat.json
+
+        echo "==== FULL TEST STAT ===="
+        cat pytorch-ci-stat.json
+        echo
+
+        FAILED=$(jq '.failed | length' pytorch-ci-stat.json)
+
+        if [[ "$FAILED" != "0" ]]; then
+          echo "==== FULL TEST FAILED ===="
+          echo "failed cases: $FAILED"
+          exit 1
+        fi
+
+        echo "==== FULL TEST PASSED ===="
+        echo "full test no failures"
+

From 54a71e9a95f3cf079dadfa7ca09552fbd5248ea0 Mon Sep 17 00:00:00 2001
From: vimer <yuzibode@126.com>
Date: Sun, 24 May 2026 23:51:12 +0800
Subject: [PATCH 15/21] [ci] fix ci workflow and other issue (#21)

for action, these yaml must be merged first then take effect, so merge
it skipping ci
---
 .github/workflows/ci-riscv64.yml | 63 ++++++++++++++++++--------------
 1 file changed, 35 insertions(+), 28 deletions(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index 127e0a01e36eb..8c53debb93a8e 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -50,6 +50,7 @@ jobs:
           echo "HEAD_SHA=${{ github.event.pull_request.head.sha }}" >> $GITHUB_ENV
 
       - name: Diff base and head
+        id: meta
         run: |
           if [[ "${{ github.event_name }}" = "pull_request" || "${{ github.event_name }}" == "pull_request_target" ]]; then
             echo "Push PR build"
@@ -84,10 +85,14 @@ jobs:
           echo "BASE_COMMIT=$BASE" >> $GITHUB_ENV
           echo "HEAD_COMMIT=$HEAD" >> $GITHUB_ENV
 
+          echo "base_commit=$BASE" >> "$GITHUB_OUTPUT"
+          echo "head_commit=$HEAD" >> "$GITHUB_OUTPUT"
+
           echo "Base: $BASE"
           echo "Head: $HEAD"
 
       - name: Generate patch
+        id: patch
         run: |
           echo "Generating patch..."
 
@@ -102,16 +107,18 @@ jobs:
           cp $PATCH_NAME /home/jenkins/patch/
           cat /home/jenkins/patch/$PATCH_NAME
 
-          echo "PATCH_FILE=$PATCH_NAME" >> $GITHUB_ENV
+          echo "PATCH_FILE=$PATCH_NAME" >> "$GITHUB_ENV"
+          echo "patch_file=$PATCH_NAME" >> "$GITHUB_OUTPUT"
 
       - name: Trigger Jenkins Job
+        id: jenkins
         run: |
           set -euo pipefail
 
           BASE=${{ steps.meta.outputs.base_commit }}
           PATCH=${{ steps.patch.outputs.patch_file }}
 
-          bash /home/jenkins/scripts/jenkins-run.sh $BASE_COMMIT  $PATCH_FILE | tee jenkins.log
+          bash /home/jenkins/scripts/jenkins-run.sh $BASE  $PATCH | tee jenkins.log
 
           CI_STAT_URL=$(grep -oE 'https://[^ ]+/pytorch-ci-stat\.json' jenkins.log | tail -n1)
 
@@ -128,38 +135,38 @@ jobs:
           echo "CI_STAT_URL=$CI_STAT_URL"
           echo "CI_RESULT_BASE_URL=$CI_RESULT_BASE_URL"
 
-full-ci:
-  name: pytorch-riscv64-full-ci
-  runs-on: [self-hosted, linux, amd64]
-  needs: core-ci
-  if: always()
-  continue-on-error: true
+  full-ci:
+    name: pytorch-riscv64-full-ci
+    runs-on: [self-hosted, linux, amd64]
+    needs: core-ci
+    if: always()
+    continue-on-error: true
 
-  steps:
-    - name: Query existing full test result
-      shell: bash
-      run: |
-        set -euo pipefail
+    steps:
+      - name: Query existing full test result
+        shell: bash
+        run: |
+          set -euo pipefail
 
-        BASE_URL="${{ needs.core-ci.outputs.ci_result_base_url }}"
-        STAT_URL="${BASE_URL}/pytorch-ci-stat.json"
+          BASE_URL="${{ needs.core-ci.outputs.ci_result_base_url }}"
+          STAT_URL="${BASE_URL}/pytorch-ci-stat.json"
 
-        echo "STAT_URL=$STAT_URL"
+          echo "STAT_URL=$STAT_URL"
 
-         curl -fsSL "$STAT_URL" -o pytorch-ci-stat.json
+          curl -fsSL "$STAT_URL" -o pytorch-ci-stat.json
 
-        echo "==== FULL TEST STAT ===="
-        cat pytorch-ci-stat.json
-        echo
+          echo "==== FULL TEST STAT ===="
+          cat pytorch-ci-stat.json
+          echo
 
-        FAILED=$(jq '.failed | length' pytorch-ci-stat.json)
+          FAILED=$(jq '.failed | length' pytorch-ci-stat.json)
 
-        if [[ "$FAILED" != "0" ]]; then
-          echo "==== FULL TEST FAILED ===="
-          echo "failed cases: $FAILED"
-          exit 1
-        fi
+          if [[ "$FAILED" != "0" ]]; then
+            echo "==== FULL TEST FAILED ===="
+            echo "failed cases: $FAILED"
+            exit 1
+          fi
 
-        echo "==== FULL TEST PASSED ===="
-        echo "full test no failures"
+          echo "==== FULL TEST PASSED ===="
+          echo "full test no failures"
 

From 2653522fc16a5b2385580f08c92f06cb155e8fe5 Mon Sep 17 00:00:00 2001
From: vimer <yuzibode@126.com>
Date: Tue, 23 Jun 2026 21:33:42 +0800
Subject: [PATCH 16/21] [ci]: continue parsing Jenkins outputs after Jenkins
 job failure (#40)

---
 .github/workflows/ci-riscv64.yml | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index 8c53debb93a8e..f628f18b55c7a 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -118,13 +118,17 @@ jobs:
           BASE=${{ steps.meta.outputs.base_commit }}
           PATCH=${{ steps.patch.outputs.patch_file }}
 
+          set +e
           bash /home/jenkins/scripts/jenkins-run.sh $BASE  $PATCH | tee jenkins.log
+          JENKINS_RC=${PIPESTATUS[0]}
+          set -e
 
-          CI_STAT_URL=$(grep -oE 'https://[^ ]+/pytorch-ci-stat\.json' jenkins.log | tail -n1)
+          CI_STAT_URL=$(grep -oE 'https://[^ ]+/pytorch-ci-stat\.json' jenkins.log | tail -n1 || true)
 
           if [[ -z "$CI_STAT_URL" ]]; then
             echo "ERROR: cannot find pytorch-ci-stat.json URL from Jenkins log"
-            exit 1
+            echo "jenkins-run.sh rc=$JENKINS_RC"
+            exit "$JENKINS_RC"
           fi
 
           CI_RESULT_BASE_URL="${CI_STAT_URL%/pytorch-ci-stat.json}"
@@ -135,6 +139,9 @@ jobs:
           echo "CI_STAT_URL=$CI_STAT_URL"
           echo "CI_RESULT_BASE_URL=$CI_RESULT_BASE_URL"
 
+          # judge core ci fail or success
+          exit "$JENKINS_RC"
+
   full-ci:
     name: pytorch-riscv64-full-ci
     runs-on: [self-hosted, linux, amd64]

From 1571898a3c8d0d21968983381e44bba28c761c01 Mon Sep 17 00:00:00 2001
From: vimer <yuzibode@126.com>
Date: Wed, 22 Jul 2026 22:29:06 +0800
Subject: [PATCH 17/21] [CI] workaround to judge Jenkins job success (#41)

---
 .github/workflows/ci-riscv64.yml | 42 +++++++++++++++++++++++++++++---
 1 file changed, 38 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/ci-riscv64.yml b/.github/workflows/ci-riscv64.yml
index f628f18b55c7a..85ea2d53fd102 100644
--- a/.github/workflows/ci-riscv64.yml
+++ b/.github/workflows/ci-riscv64.yml
@@ -110,13 +110,23 @@ jobs:
           echo "PATCH_FILE=$PATCH_NAME" >> "$GITHUB_ENV"
           echo "patch_file=$PATCH_NAME" >> "$GITHUB_OUTPUT"
 
-      - name: Trigger Jenkins Job
+      - name: Trigger Jenkins Job and get the CI results
         id: jenkins
         run: |
           set -euo pipefail
 
+          # Fail early if the runner does not provide the required tools.
+          for tool in curl jq; do
+            if ! command -v "$tool" >/dev/null 2>&1; then
+              echo "::error::Required command is unavailable: $tool"
+              exit 1
+            fi
+          done
+
           BASE=${{ steps.meta.outputs.base_commit }}
           PATCH=${{ steps.patch.outputs.patch_file }}
+          CORE_RESULT_FILE="$RUNNER_TEMP/pytorch-core-ci-stat.json"
+
 
           set +e
           bash /home/jenkins/scripts/jenkins-run.sh $BASE  $PATCH | tee jenkins.log
@@ -128,10 +138,11 @@ jobs:
           if [[ -z "$CI_STAT_URL" ]]; then
             echo "ERROR: cannot find pytorch-ci-stat.json URL from Jenkins log"
             echo "jenkins-run.sh rc=$JENKINS_RC"
-            exit "$JENKINS_RC"
+            exit 1
           fi
 
           CI_RESULT_BASE_URL="${CI_STAT_URL%/pytorch-ci-stat.json}"
+          CI_CORE_RESULT_URL="${CI_STAT_URL%/*}/pytorch-core-ci-stat.json"
 
           echo "ci_stat_url=$CI_STAT_URL" >> "$GITHUB_OUTPUT"
           echo "ci_result_base_url=$CI_RESULT_BASE_URL" >> "$GITHUB_OUTPUT"
@@ -139,8 +150,31 @@ jobs:
           echo "CI_STAT_URL=$CI_STAT_URL"
           echo "CI_RESULT_BASE_URL=$CI_RESULT_BASE_URL"
 
-          # judge core ci fail or success
-          exit "$JENKINS_RC"
+
+
+          if ! curl \
+            --fail \
+            --silent \
+            --show-error \
+            --location \
+            --retry 5 \
+           --retry-delay 5 \
+           --retry-connrefused \
+           --output "$CORE_RESULT_FILE" \
+           "$CI_CORE_RESULT_URL"; then
+           echo "::error::Failed to download $CI_CORE_RESULT_URL"
+           exit 1
+          fi
+
+          if jq -e '.failed == []' "$CORE_RESULT_FILE" >/dev/null; then
+            echo "Core CI succeeded: no failed tests"
+            exit 0
+          fi
+
+          echo "::error::Core CI reported failures"
+          echo "Failed tests:"
+          jq '.failed' "$CORE_RESULT_FILE" 2>/dev/null || cat "$CORE_RESULT_FILE"
+          exit 1
 
   full-ci:
     name: pytorch-riscv64-full-ci

From 5b326fe5d4982cb7c38d039a20ab5c70bf621c79 Mon Sep 17 00:00:00 2001
From: WuXintong123 <13683168028@163.com>
Date: Thu, 30 Jul 2026 10:30:39 +0800
Subject: [PATCH 18/21] [SyncBots] Integrate PyTorch at 1154a55

---
 torch/csrc/autograd/custom_function.cpp | 55 ++++++++++++++++++++++
 torch/csrc/autograd/custom_function.h   | 26 +++++++++++
 torch/testing/_internal/common_utils.py | 61 +++++++++++++++++++++++++
 3 files changed, 142 insertions(+)

diff --git a/torch/csrc/autograd/custom_function.cpp b/torch/csrc/autograd/custom_function.cpp
index 812e37cdf0766..643e06d6113b8 100644
--- a/torch/csrc/autograd/custom_function.cpp
+++ b/torch/csrc/autograd/custom_function.cpp
@@ -595,6 +595,61 @@ optional_variable_list _wrap_outputs(
       attached_node);
 }
 
+// Backward-compat 9-arg overloads (no attached_node out-param). Preserve the
+// pre-#189284 ABI so extensions compiled against a stale custom_function.h
+// still resolve _wrap_outputs at dlopen time. The dropped attached_node is
+// only needed to fire node-creation hooks; forwarding here silently discards
+// it, which is safe because callers that stopped at 9 args predate the hook.
+// NOLINTNEXTLINE(misc-use-internal-linkage)
+optional_variable_list _wrap_outputs(
+    const variable_list& input_vars,
+    const std::unordered_set<at::TensorImpl*>& non_differentiable,
+    const std::unordered_set<at::TensorImpl*>& dirty_inputs,
+    const at::ArrayRef<std::optional<Variable>> raw_outputs,
+    const c10::intrusive_ptr<Node>& cdata,
+    const _jvp_fn_t& jvp_user_function,
+    const std::unordered_set<at::TensorImpl*>& to_save_if_setup_context,
+    const _view_as_self_fn_t& view_as_self_fn,
+    bool pure_view) {
+  c10::intrusive_ptr<Node> attached_node;
+  return _wrap_outputs_impl(
+      input_vars,
+      non_differentiable,
+      dirty_inputs,
+      raw_outputs,
+      cdata,
+      jvp_user_function,
+      to_save_if_setup_context,
+      view_as_self_fn,
+      pure_view,
+      attached_node);
+}
+
+// NOLINTNEXTLINE(misc-use-internal-linkage)
+optional_variable_list _wrap_outputs(
+    at::ArrayRef<const Variable*> input_vars,
+    const std::unordered_set<at::TensorImpl*>& non_differentiable,
+    const std::unordered_set<at::TensorImpl*>& dirty_inputs,
+    const at::ArrayRef<std::optional<Variable>> raw_outputs,
+    const c10::intrusive_ptr<Node>& cdata,
+    const _jvp_fn_t& jvp_user_function,
+    const std::unordered_set<at::TensorImpl*>& to_save_if_setup_context,
+    const _view_as_self_fn_t& view_as_self_fn,
+    bool pure_view) {
+  c10::intrusive_ptr<Node> attached_node;
+  return _wrap_outputs_impl(
+      input_vars,
+      non_differentiable,
+      dirty_inputs,
+      raw_outputs,
+      cdata,
+      jvp_user_function,
+      to_save_if_setup_context,
+      view_as_self_fn,
+      pure_view,
+      attached_node);
+}
+
 void check_variable_result(
     const at::TensorBase& original,
     const at::TensorBase& result,
diff --git a/torch/csrc/autograd/custom_function.h b/torch/csrc/autograd/custom_function.h
index 62fb2986f03b4..3b805569e8c12 100644
--- a/torch/csrc/autograd/custom_function.h
+++ b/torch/csrc/autograd/custom_function.h
@@ -45,6 +45,32 @@ TORCH_API std::vector<std::optional<Variable>> _wrap_outputs(
     bool pure_view,
     c10::intrusive_ptr<Node>& attached_node);
 
+// Backward-compat overloads without the attached_node out-param. These match
+// the pre-#189284 ABI and let C++ extensions built against a stale header
+// still resolve _wrap_outputs at load time. Prefer the 10-arg versions above
+// for any new caller that needs to fire node creation hooks.
+TORCH_API std::vector<std::optional<Variable>> _wrap_outputs(
+    const variable_list& input_vars,
+    const std::unordered_set<at::TensorImpl*>& non_differentiable,
+    const std::unordered_set<at::TensorImpl*>& dirty_inputs,
+    const at::ArrayRef<std::optional<Variable>> raw_outputs,
+    const c10::intrusive_ptr<Node>& cdata,
+    const _jvp_fn_t& jvp_user_function,
+    const std::unordered_set<at::TensorImpl*>& to_save_if_setup_context,
+    const _view_as_self_fn_t& view_as_self_fn,
+    bool pure_view);
+
+TORCH_API std::vector<std::optional<Variable>> _wrap_outputs(
+    at::ArrayRef<const Variable*> input_vars,
+    const std::unordered_set<at::TensorImpl*>& non_differentiable,
+    const std::unordered_set<at::TensorImpl*>& dirty_inputs,
+    const at::ArrayRef<std::optional<Variable>> raw_outputs,
+    const c10::intrusive_ptr<Node>& cdata,
+    const _jvp_fn_t& jvp_user_function,
+    const std::unordered_set<at::TensorImpl*>& to_save_if_setup_context,
+    const _view_as_self_fn_t& view_as_self_fn,
+    bool pure_view);
+
 TORCH_API void check_variable_result(
     const at::TensorBase& original,
     const at::TensorBase& result,
diff --git a/torch/testing/_internal/common_utils.py b/torch/testing/_internal/common_utils.py
index 8d130a7fe1463..91e6205d86999 100644
--- a/torch/testing/_internal/common_utils.py
+++ b/torch/testing/_internal/common_utils.py
@@ -6575,12 +6575,73 @@ def install_cpp_extension(extension_root):
         sys.path.insert(0, mod_install_dir)
 
 
+# When torch/include on the build worker is stale from an install predating
+# upstream PR #189284, extensions compiled via load_inline see the old 9-arg
+# torch::autograd::_wrap_outputs declaration in custom_function.h and end up
+# with an undefined reference to that symbol at dlopen time. This stub, when
+# prepended to the extension's cpp_sources, provides a local definition of
+# the 9-arg overload that forwards to the 10-arg version already exported by
+# libtorch_cpu.so. Included unconditionally: on a fresh header, the 10-arg
+# call site wins overload resolution and this definition is unreferenced.
+_WRAP_OUTPUTS_ABI_SHIM = r"""
+namespace torch { namespace autograd {
+
+// Forward-declare the post-#189284 10-arg overload. libtorch_cpu.so always
+// exports this symbol, but pre-#189284 custom_function.h only declares the
+// 9-arg overload, so we redeclare it here to be able to call into it.
+extern std::vector<std::optional<Variable>> _wrap_outputs(
+    const variable_list& input_vars,
+    const std::unordered_set<at::TensorImpl*>& non_differentiable,
+    const std::unordered_set<at::TensorImpl*>& dirty_inputs,
+    const at::ArrayRef<std::optional<Variable>> raw_outputs,
+    const c10::intrusive_ptr<Node>& cdata,
+    const _jvp_fn_t& jvp_user_function,
+    const std::unordered_set<at::TensorImpl*>& to_save_if_setup_context,
+    const _view_as_self_fn_t& view_as_self_fn,
+    bool pure_view,
+    c10::intrusive_ptr<Node>& attached_node);
+
+// Local definition of the pre-#189284 9-arg overload. The attached_node
+// out-param feeds node-creation hooks; discarding it here is safe because a
+// caller stuck on this ABI predates that feature and never fires hooks.
+inline std::vector<std::optional<Variable>> _wrap_outputs(
+    const variable_list& input_vars,
+    const std::unordered_set<at::TensorImpl*>& non_differentiable,
+    const std::unordered_set<at::TensorImpl*>& dirty_inputs,
+    const at::ArrayRef<std::optional<Variable>> raw_outputs,
+    const c10::intrusive_ptr<Node>& cdata,
+    const _jvp_fn_t& jvp_user_function,
+    const std::unordered_set<at::TensorImpl*>& to_save_if_setup_context,
+    const _view_as_self_fn_t& view_as_self_fn,
+    bool pure_view) {
+  c10::intrusive_ptr<Node> attached_node;
+  return _wrap_outputs(
+      input_vars, non_differentiable, dirty_inputs, raw_outputs, cdata,
+      jvp_user_function, to_save_if_setup_context, view_as_self_fn, pure_view,
+      attached_node);
+}
+
+}} // namespace torch::autograd
+"""
+
+
+def _inject_wrap_outputs_shim(kwargs):
+    sources = kwargs.get("cpp_sources")
+    if sources is None:
+        return
+    if isinstance(sources, str):
+        kwargs["cpp_sources"] = _WRAP_OUTPUTS_ABI_SHIM + sources
+    else:
+        kwargs["cpp_sources"] = [_WRAP_OUTPUTS_ABI_SHIM, *sources]
+
+
 # Decorator to provide a helper to load inline extensions to a temp directory
 def scoped_load_inline(func):
 
     @wraps(func)
     def wrapper(*args, **kwargs):
         def load_inline(*args, **kwargs):
+            _inject_wrap_outputs_shim(kwargs)
             if IS_WINDOWS:
                 # TODO(xmfan): even using TemporaryDirectoryName will result in permission error
                 return cpp_extension.load_inline(*args, **kwargs)

From 55d456eed361259964a26cb8a78549a77e73e2d3 Mon Sep 17 00:00:00 2001
From: WuXintong123 <13683168028@163.com>
Date: Wed, 12 Aug 2026 09:26:08 +0800
Subject: [PATCH 19/21] [SyncBots] Integrate PyTorch at 2760264

---
 test/test_nn.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/test_nn.py b/test/test_nn.py
index afec5193df99f..d4242ec99d11e 100644
--- a/test/test_nn.py
+++ b/test/test_nn.py
@@ -13799,7 +13799,7 @@ def _test_linear_cross_entropy_loss(self, device='cpu', dtype=torch.float32,
             expected_max_ulp_diff = 8
             if dtype == torch.float32:
                 if "cpu" in device:
-                    expected_input_grad_max_ulp_diff = 384  # x86_64 149
+                    expected_input_grad_max_ulp_diff = 512  # x86_64 149, ci 426
                     expected_weight_grad_max_ulp_diff = 160  # x86_64 58
                 elif "mps" in device:
                     expected_input_grad_max_ulp_diff = 128  # 37

From 6e72cda72e25c4bd67429bec460a7c7cc1922433 Mon Sep 17 00:00:00 2001
From: Wu Xintong <13683168028@163.com>
Date: Wed, 12 Aug 2026 22:38:57 +0800
Subject: [PATCH 20/21] [test]Scope linear cross entropy ULP tolerance to
 RISC-V (#42)

---
 test/test_nn.py | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/test/test_nn.py b/test/test_nn.py
index d4242ec99d11e..45ffde2d64955 100644
--- a/test/test_nn.py
+++ b/test/test_nn.py
@@ -37,7 +37,7 @@
 from torch.testing._internal.common_utils import dtype_name, freeze_rng_state, run_tests, TestCase, \
     skipIfNoLapack, skipIfRocm, skipIfRocmVersionLessThan, getRocmVersion, TEST_NUMPY, TEST_SCIPY, TEST_WITH_CROSSREF, TEST_WITH_ROCM, TEST_MULTIACCELERATOR, \
     download_file, get_function_arglist, load_tests, skipIfMPS, MACOS_VERSION, \
-    IS_PPC, IS_ARM64, IS_MACOS, IS_WINDOWS, IS_CPU_CAPABILITY_SVE, IS_CPU_EXT_SVE_SUPPORTED, xfailIf, \
+    IS_PPC, IS_ARM64, IS_RISCV64, IS_MACOS, IS_WINDOWS, IS_CPU_CAPABILITY_SVE, IS_CPU_EXT_SVE_SUPPORTED, xfailIf, \
     parametrize as parametrize_test, subtest, instantiate_parametrized_tests, \
     skipIfTorchDynamo, gcIfJetson, set_default_dtype, skipIfNoCuteDSL, isRocmArchAnyOf, MI200_ARCH
 from torch.testing._internal.common_cuda import TEST_CUDA, TEST_CUDNN, \
@@ -13799,7 +13799,10 @@ def _test_linear_cross_entropy_loss(self, device='cpu', dtype=torch.float32,
             expected_max_ulp_diff = 8
             if dtype == torch.float32:
                 if "cpu" in device:
-                    expected_input_grad_max_ulp_diff = 512  # x86_64 149, ci 426
+                    if IS_RISCV64:
+                        expected_input_grad_max_ulp_diff = 512  # riscv64 426
+                    else:
+                        expected_input_grad_max_ulp_diff = 384  # x86_64 149
                     expected_weight_grad_max_ulp_diff = 160  # x86_64 58
                 elif "mps" in device:
                     expected_input_grad_max_ulp_diff = 128  # 37

From 7a391b4949c40d7f4e354695f3fcc1fa919fbce4 Mon Sep 17 00:00:00 2001
From: Yixuan Chen <chenyixuan@iscas.ac.cn>
Date: Mon, 31 Aug 2026 15:08:17 +0800
Subject: [PATCH 21/21] Add RISC-V Vector (RVV) CPU capability

Add a FindRVV module that probes -march=rv64gcv support, register it
in Dependencies.cmake, and emit an RVV capability in Codegen.cmake.
Wire RVV through the DispatchStub plumbing (enum member, dispatch
pointer, REGISTER_RVV_DISPATCH, and runtime detection via
cpuinfo_has_riscv_v) so RVV-compiled kernels are selected at runtime,
mirroring the existing SVE/VSX/ZVECTOR handling.

Every addition is guarded by HAVE_RVV_CPU_DEFINITION and is inert on
non-RISC-V builds.

Test Plan:
  The RISC-V build runs on sg2044. PASS the CI core test.

Authored with AI assistance.
---
 aten/src/ATen/Version.cpp               |  3 ++
 aten/src/ATen/native/DispatchStub.cpp   | 39 ++++++++++++++++++++++
 aten/src/ATen/native/DispatchStub.h     | 32 +++++++++++++++++-
 aten/src/ATen/native/cpu/LerpKernel.cpp |  2 +-
 cmake/Codegen.cmake                     |  6 ++++
 cmake/Dependencies.cmake                |  1 +
 cmake/Modules/FindRVV.cmake             | 44 +++++++++++++++++++++++++
 7 files changed, 125 insertions(+), 2 deletions(-)
 create mode 100644 cmake/Modules/FindRVV.cmake

diff --git a/aten/src/ATen/Version.cpp b/aten/src/ATen/Version.cpp
index 53a43985bbd98..dc1c904e9dac2 100644
--- a/aten/src/ATen/Version.cpp
+++ b/aten/src/ATen/Version.cpp
@@ -107,6 +107,9 @@ std::string get_cpu_capability() {
       return "SVE128";
     case native::CPUCapability::SVE256:
       return "SVE256";
+#elif defined(HAVE_RVV_CPU_DEFINITION)
+    case native::CPUCapability::RVV:
+      return "RVV";
 #else
     case native::CPUCapability::AVX2:
       return "AVX2";
diff --git a/aten/src/ATen/native/DispatchStub.cpp b/aten/src/ATen/native/DispatchStub.cpp
index 515d8baeec502..e73ad23aca522 100644
--- a/aten/src/ATen/native/DispatchStub.cpp
+++ b/aten/src/ATen/native/DispatchStub.cpp
@@ -62,6 +62,10 @@ static CPUCapability compute_cpu_capability() {
         return CPUCapability::DEFAULT;
       }
     }
+#elif defined(HAVE_RVV_CPU_DEFINITION)
+    if (envar == "rvv") {
+      return CPUCapability::RVV;
+    }
 #else
 #ifdef HAVE_AVX512_CPU_DEFINITION
     if (envar == "avx512") {
@@ -116,6 +120,11 @@ static CPUCapability compute_cpu_capability() {
       return CPUCapability::SVE128;
   }
 #endif
+#if defined(__linux__) && defined(HAVE_RVV_CPU_DEFINITION)
+  if (cpuinfo_initialize() && cpuinfo_has_riscv_v()) {
+    return CPUCapability::RVV;
+  }
+#endif
 #ifdef HAVE_VSX_CPU_DEFINITION
   return CPUCapability::VSX;
 #else
@@ -147,6 +156,9 @@ DispatchResult DispatchStubImpl::try_get_call_ptr(
   , void *SVE128
   , void *SVE256
 #endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+  , void *RVV
+#endif
 ) {
   constexpr auto supported_devices = std::to_array<c10::DeviceType>(
         {c10::DeviceType::CPU,
@@ -185,6 +197,9 @@ DispatchResult DispatchStubImpl::try_get_call_ptr(
 #ifdef HAVE_SVE_CPU_DEFINITION
           , SVE128
           , SVE256
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+          , RVV
 #endif
         );
         if (!std::holds_alternative<ErrorType>(result)) {
@@ -243,6 +258,9 @@ void* DispatchStubImpl::get_call_ptr(
   , void *SVE128
   , void *SVE256
 #endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+  , void *RVV
+#endif
 ) {
 
   auto result = try_get_call_ptr(
@@ -269,6 +287,10 @@ void* DispatchStubImpl::get_call_ptr(
       SVE128
       ,
       SVE256
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+      ,
+      RVV
 #endif
   );
   if (std::holds_alternative<ErrorType>(result)) {
@@ -303,6 +325,9 @@ DispatchResult DispatchStubImpl::try_choose_cpu_impl(
 #ifdef HAVE_SVE_CPU_DEFINITION
     , void *SVE128
     , void *SVE256
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+    , void *RVV
 #endif
   ){
 
@@ -349,6 +374,11 @@ DispatchResult DispatchStubImpl::try_choose_cpu_impl(
     }
     return DispatchResult(SVE256);
   }
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+  if (capability >= static_cast<int>(CPUCapability::RVV)) {
+    return RVV != nullptr ? DispatchResult(RVV) : ErrorType::MissingDeviceKernel;
+  }
 #endif
   return DEFAULT != nullptr ? DispatchResult(DEFAULT) : ErrorType::MissingDeviceKernel;
 }
@@ -371,6 +401,9 @@ void* DispatchStubImpl::choose_cpu_impl(
   , void *SVE128
   , void *SVE256
 #endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+  , void *RVV
+#endif
 ) {
   auto capability = static_cast<int>(get_cpu_capability());
   (void)capability;
@@ -421,6 +454,12 @@ void* DispatchStubImpl::choose_cpu_impl(
     }
     return SVE256;
   }
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+  if (capability >= static_cast<int>(CPUCapability::RVV)) {
+    TORCH_INTERNAL_ASSERT(RVV, "DispatchStub: missing RVV kernel");
+    return RVV;
+  }
 #endif
   TORCH_INTERNAL_ASSERT(DEFAULT, "DispatchStub: missing default kernel");
   return DEFAULT;
diff --git a/aten/src/ATen/native/DispatchStub.h b/aten/src/ATen/native/DispatchStub.h
index 73fbd1da1b9e0..eac3658010b03 100644
--- a/aten/src/ATen/native/DispatchStub.h
+++ b/aten/src/ATen/native/DispatchStub.h
@@ -67,6 +67,8 @@ enum class CPUCapability {
 #elif defined(HAVE_SVE_CPU_DEFINITION)
   SVE256 = 1,
   SVE128 = 2,
+#elif defined(HAVE_RVV_CPU_DEFINITION)
+  RVV = 1,
 #else
   AVX2 = 1,
   AVX512 = 2,
@@ -119,6 +121,9 @@ struct TORCH_API DispatchStubImpl {
 #ifdef HAVE_SVE_CPU_DEFINITION
       , void *SVE128
       , void *SVE256
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+      , void *RVV
 #endif
   );
 
@@ -141,6 +146,9 @@ struct TORCH_API DispatchStubImpl {
 #ifdef HAVE_SVE_CPU_DEFINITION
     , void *SVE128
     , void *SVE256
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+    , void *RVV
 #endif
   );
 
@@ -163,6 +171,9 @@ struct TORCH_API DispatchStubImpl {
 #ifdef HAVE_SVE_CPU_DEFINITION
       , void *SVE128
       , void *SVE256
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+      , void *RVV
 #endif
   );
 
@@ -188,6 +199,9 @@ struct TORCH_API DispatchStubImpl {
 #ifdef HAVE_SVE_CPU_DEFINITION
     , void *SVE128
     , void *SVE256
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+    , void *RVV
 #endif
   );
 
@@ -246,6 +260,9 @@ struct DispatchStub<rT (*)(Args...), T> {
 #ifdef HAVE_SVE_CPU_DEFINITION
       , reinterpret_cast<void*>(SVE128)
       , reinterpret_cast<void*>(SVE256)
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+      , reinterpret_cast<void*>(RVV)
 #endif
       )
     );
@@ -308,6 +325,9 @@ struct DispatchStub<rT (*)(Args...), T> {
 #ifdef HAVE_SVE_CPU_DEFINITION
       , reinterpret_cast<void*>(SVE128)
       , reinterpret_cast<void*>(SVE256)
+#endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+      , reinterpret_cast<void*>(RVV)
 #endif
       );
     if (std::holds_alternative<ErrorType>(result)){
@@ -333,6 +353,9 @@ struct DispatchStub<rT (*)(Args...), T> {
   static TORCH_API FnPtr SVE128;
   static TORCH_API FnPtr SVE256;
 #endif
+#ifdef HAVE_RVV_CPU_DEFINITION
+  static TORCH_API FnPtr RVV;
+#endif
 private:
   DispatchStubImpl impl;
 };
@@ -442,6 +465,12 @@ struct RegisterPRIVATEUSE1Dispatch {
 #define REGISTER_SVE256_DISPATCH(name, fn)
 #endif
 
+#ifdef HAVE_RVV_CPU_DEFINITION
+#define REGISTER_RVV_DISPATCH(name, fn) REGISTER_ARCH_DISPATCH(name, RVV, fn)
+#else
+#define REGISTER_RVV_DISPATCH(name, fn)
+#endif
+
 // Macro to register the same kernel for all CPU arch types. This is useful
 // if a kernel does not benefit from being recompiled across different arch types.
 #define REGISTER_ALL_CPU_DISPATCH(name, fn)                                    \
@@ -451,7 +480,8 @@ struct RegisterPRIVATEUSE1Dispatch {
   REGISTER_VSX_DISPATCH(name, fn)                                              \
   REGISTER_ZVECTOR_DISPATCH(name, fn)                                          \
   REGISTER_SVE128_DISPATCH(name, fn)                                           \
-  REGISTER_SVE256_DISPATCH(name, fn)
+  REGISTER_SVE256_DISPATCH(name, fn)                                           \
+  REGISTER_RVV_DISPATCH(name, fn)
 
 #define REGISTER_NO_CPU_DISPATCH(name)                                         \
   REGISTER_ALL_CPU_DISPATCH(name, nullptr)
diff --git a/aten/src/ATen/native/cpu/LerpKernel.cpp b/aten/src/ATen/native/cpu/LerpKernel.cpp
index 6881eddfd674b..a22e2344b097d 100644
--- a/aten/src/ATen/native/cpu/LerpKernel.cpp
+++ b/aten/src/ATen/native/cpu/LerpKernel.cpp
@@ -19,7 +19,7 @@ Vectorized<scalar_t> is_lerp_weight_small(Vectorized<scalar_t> weight) {
 // is_lerp_weight_small doesn't work for complex because z.abs() returns a
 // complex vector which can't be compared. Either implement it with z.abs_2_(),
 // or fallback to the scalar function.
-#if !(defined(CPU_CAPABILITY_DEFAULT) || defined(_MSC_VER) || defined(CPU_CAPABILITY_SVE256) || defined(CPU_CAPABILITY_SVE128))
+#if !(defined(CPU_CAPABILITY_DEFAULT) || defined(_MSC_VER) || defined(CPU_CAPABILITY_SVE256) || defined(CPU_CAPABILITY_SVE128) || defined(CPU_CAPABILITY_RVV))
 template <typename value_t>
 Vectorized<c10::complex<value_t>> is_lerp_weight_small(Vectorized<c10::complex<value_t>> weight) {
   using vec_reg_t = decltype(weight.abs_2_());
diff --git a/cmake/Codegen.cmake b/cmake/Codegen.cmake
index ca7ed49de6a8f..c1d7ab40c3b25 100644
--- a/cmake/Codegen.cmake
+++ b/cmake/Codegen.cmake
@@ -442,6 +442,12 @@ if(INTERN_BUILD_ATEN_OPS)
     list(APPEND CPU_CAPABILITY_FLAGS "${OPT_FLAG} -march=armv8-a+sve+bf16 -D__ARM_FEATURE_BF16 -msve-vector-bits=128")
   endif()
 
+  if(CXX_RVV_FOUND AND NOT "$ENV{USE_CPU_VECTORIZATION}" STREQUAL "0")
+    add_compile_definitions("HAVE_RVV_CPU_DEFINITION")
+    list(APPEND CPU_CAPABILITY_NAMES "RVV")
+    list(APPEND CPU_CAPABILITY_FLAGS "${OPT_FLAG} ${CXX_RVV_FLAGS}")
+  endif(CXX_RVV_FOUND)
+
   list(LENGTH CPU_CAPABILITY_NAMES NUM_CPU_CAPABILITY_NAMES)
   math(EXPR NUM_CPU_CAPABILITY_NAMES "${NUM_CPU_CAPABILITY_NAMES}-1")
 
diff --git a/cmake/Dependencies.cmake b/cmake/Dependencies.cmake
index a2dd4dacc4328..805ef7a694be2 100644
--- a/cmake/Dependencies.cmake
+++ b/cmake/Dependencies.cmake
@@ -1653,6 +1653,7 @@ if(NOT INTERN_BUILD_MOBILE)
   add_definitions(-DMINIZ_DISABLE_ZIP_READER_CRC32_CHECKS)
 
   find_package(ZVECTOR) # s390x simd support
+  find_package(RVV) # riscv vector simd support
 endif()
 
 #
diff --git a/cmake/Modules/FindRVV.cmake b/cmake/Modules/FindRVV.cmake
new file mode 100644
index 0000000000000..094ea7079ac03
--- /dev/null
+++ b/cmake/Modules/FindRVV.cmake
@@ -0,0 +1,44 @@
+# Check RISC-V Vector (RVV) extension availability for compile-time support.
+IF(CMAKE_SYSTEM_NAME MATCHES "Linux")
+  INCLUDE(CheckCXXSourceCompiles)
+  message("-- <FindRVV>")
+
+  # The kernel code gates RVV intrinsics on v0.12 or newer
+  # (__riscv_v_intrinsic >= 12000), matching the oneDNN RVV detection in
+  # third_party/ideep/mkl-dnn/cmake/platform.cmake.
+  SET(RVV_CODE "
+    #if !defined(__riscv) || !defined(__riscv_v)
+    #error \"RISC-V or vector extension (RVV) is not supported by the compiler\"
+    #endif
+    #if !defined(__riscv_v_intrinsic) || __riscv_v_intrinsic < 12000
+    #error \"RISC-V intrinsics v0.12 or higher is required\"
+    #endif
+    #include <riscv_vector.h>
+    int main() {
+      size_t vl = __riscv_vsetvl_e32m1(4);
+      float a[4] = {1.f, 2.f, 3.f, 4.f};
+      float b[4] = {5.f, 6.f, 7.f, 8.f};
+      float c[4] = {0.f};
+      vfloat32m1_t va = __riscv_vle32_v_f32m1(a, vl);
+      vfloat32m1_t vb = __riscv_vle32_v_f32m1(b, vl);
+      vfloat32m1_t vc = __riscv_vfadd_vv_f32m1(va, vb, vl);
+      __riscv_vse32_v_f32m1(c, vc, vl);
+      return (c[0] == 6.0f) ? 0 : -1;
+    }
+  ")
+
+  SET(RVV_TEST_FLAGS "-march=rv64gcv")
+  SET(CMAKE_REQUIRED_FLAGS_SAVE ${CMAKE_REQUIRED_FLAGS})
+  SET(CMAKE_REQUIRED_FLAGS "${RVV_TEST_FLAGS}")
+  # Do compilation check instead of runtime check in case of cross-compilation.
+  CHECK_CXX_SOURCE_COMPILES("${RVV_CODE}" COMPILE_OUT_RVV)
+  SET(CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS_SAVE})
+  if(COMPILE_OUT_RVV)
+    message("-- RVV flags were set.")
+    set(CXX_RVV_FOUND TRUE)
+    SET(CXX_RVV_FLAGS "${RVV_TEST_FLAGS}")
+  else()
+    message("-- RVV flags were NOT set.")
+  endif()
+  message("-- </FindRVV>")
+endif()