diff --git a/README.md b/README.md index 403fafbd2..f7f025081 100644 --- a/README.md +++ b/README.md @@ -4,7 +4,7 @@ ## What version of Zig to use -`0.17.0-dev.1158+1d1193aa7` +`0.17.0-dev.1471+ff10b90bc` ## Getting Started With MicroZig diff --git a/build.zig.zon b/build.zig.zon index 6b2515b59..b7d23b95b 100644 --- a/build.zig.zon +++ b/build.zig.zon @@ -3,7 +3,7 @@ // Note: This should be changed if you fork microzig! .fingerprint = 0x605a83a849186d0f, .version = "0.15.2", - .minimum_zig_version = "0.17.0-dev.1158+1d1193aa7", + .minimum_zig_version = "0.17.0-dev.1471+ff10b90bc", .dependencies = .{ .@"build-internals" = .{ .path = "build-internals" }, .core = .{ .path = "core" }, diff --git a/core/src/core/arm_semihosting.zig b/core/src/core/arm_semihosting.zig index 6314497b0..73e121e65 100644 --- a/core/src/core/arm_semihosting.zig +++ b/core/src/core/arm_semihosting.zig @@ -183,7 +183,7 @@ pub const Debug = struct { /// NOTE: It is possible for the debugger to request that the application continues by performing an RDI_Execute request or equivalent. pub fn panic(reason: PanicCodes, subcode: usize) void { const data = PanicData{ - .reason = @intFromEnum(reason) + 0x20000, + .reason = @backingInt(reason) + 0x20000, .subcode = subcode, }; @@ -417,7 +417,7 @@ pub const fs = struct { .path_len = path.len, }; const ret = sys_open(&file); - return if (ret < 0) FileError.OpenFail else @enumFromInt(@as(usize, @bitCast(ret))); + return if (ret < 0) FileError.OpenFail else @fromBackingInt(@as(usize, @bitCast(ret))); } pub fn remove(path: [:0]const u8) FileError!void { diff --git a/core/src/core/usb.zig b/core/src/core/usb.zig index 588c91db8..ba239913e 100644 --- a/core/src/core/usb.zig +++ b/core/src/core/usb.zig @@ -30,12 +30,12 @@ pub const DescriptorAllocator = struct { } pub fn next_ep(self: *@This(), dir: types.Dir) types.Endpoint { - const idx: u1 = @intFromEnum(dir); + const idx: u1 = @backingInt(dir); const ret = self.next_ep_num[idx]; self.next_ep_num[idx] += 1; if (self.unique_endpoints) self.next_ep_num[idx ^ 1] += 1; - return .{ .dir = dir, .num = @enumFromInt(ret) }; + return .{ .dir = dir, .num = @fromBackingInt(ret) }; } pub fn next_itf(self: *@This()) u8 { @@ -328,8 +328,8 @@ pub fn DeviceController(config: Config, driver_args: config.DriverArgs()) type { switch (field_type) { // Register handler for endpoints descriptor.Endpoint => { - const ep_dir = @intFromEnum(desc.endpoint.dir); - const ep_num = @intFromEnum(desc.endpoint.num); + const ep_dir = @backingInt(desc.endpoint.dir); + const ep_num = @backingInt(desc.endpoint.num); if (ep_handler_types[ep_dir][ep_num] != void) @compileError(std.fmt.comptimePrint( @@ -369,8 +369,8 @@ pub fn DeviceController(config: Config, driver_args: config.DriverArgs()) type { const const_ep_handlers = ep_handlers; const DriverConfig = @Struct(.@"extern", null, &field_names, &field_types, &field_attrs); - const idx_in = @intFromEnum(types.Dir.In); - const idx_out = @intFromEnum(types.Dir.Out); + const idx_in = @backingInt(types.Dir.In); + const idx_out = @backingInt(types.Dir.Out); break :blk .{ .device_descriptor = desc_device, .config_descriptor = extern struct { @@ -464,8 +464,8 @@ pub fn DeviceController(config: Config, driver_args: config.DriverArgs()) type { pub fn on_buffer(self: *@This(), device_itf: *DeviceInterface, comptime ep: types.Endpoint) void { log.debug("on_buffer {t} {t}", .{ ep.num, ep.dir }); - const driver_opt = comptime handlers_ep.drv[@intFromEnum(ep.dir)][@intFromEnum(ep.num)]; - const handler = comptime @field(handlers_ep.han, @tagName(ep.dir))[@intFromEnum(ep.num)]; + const driver_opt = comptime handlers_ep.drv[@backingInt(ep.dir)][@backingInt(ep.num)]; + const handler = comptime @field(handlers_ep.han, @tagName(ep.dir))[@backingInt(ep.num)]; if (comptime ep == types.Endpoint.in(.ep0)) { // We use this opportunity to finish the delayed @@ -513,7 +513,7 @@ pub fn DeviceController(config: Config, driver_args: config.DriverArgs()) type { fn process_device_setup(self: *@This(), device_itf: *DeviceInterface, setup: *const types.SetupPacket) ?[]const u8 { switch (setup.request_type.type) { .Standard => { - const request: types.SetupRequest = @enumFromInt(setup.request); + const request: types.SetupRequest = @fromBackingInt(setup.request); log.debug("Device setup: {any}", .{request}); switch (request) { .GetStatus => { @@ -525,7 +525,7 @@ pub fn DeviceController(config: Config, driver_args: config.DriverArgs()) type { .SetConfiguration => self.process_set_config(device_itf, setup.value.into()), .GetDescriptor => return get_descriptor(setup.value.into()), .SetFeature => { - const feature: types.FeatureSelector = @enumFromInt(setup.value.into() >> 8); + const feature: types.FeatureSelector = @fromBackingInt(setup.value.into() >> 8); switch (feature) { .DeviceRemoteWakeup, .EndpointHalt => {}, // TODO: https://github.com/ZigEmbeddedGroup/microzig/issues/453 @@ -563,7 +563,7 @@ pub fn DeviceController(config: Config, driver_args: config.DriverArgs()) type { // Return the appropriate descriptor type as determined by the top 8 bits of the value. fn get_descriptor(value: u16) ?[]const u8 { const asBytes = std.mem.asBytes; - const desc_type: descriptor.Type = @enumFromInt(value >> 8); + const desc_type: descriptor.Type = @fromBackingInt(value >> 8); const desc_idx: u8 = @truncate(value); log.debug("Request for {any} descriptor {}", .{ desc_type, desc_idx }); return switch (desc_type) { diff --git a/core/src/core/usb/descriptor.zig b/core/src/core/usb/descriptor.zig index 8de639808..81e21aa5f 100644 --- a/core/src/core/usb/descriptor.zig +++ b/core/src/core/usb/descriptor.zig @@ -155,14 +155,14 @@ pub const String = struct { length: u8 = @sizeOf(@This()), descriptor_type: Type = .String, lang: types.U16_Le align(1), - } = comptime &.{ .lang = .from(@intFromEnum(lang)) }; + } = comptime &.{ .lang = .from(@backingInt(lang)) }; return .{ .data = std.mem.asBytes(ret) }; } pub fn from_str(comptime string: []const u8) @This() { @setEvalBranchQuota(10000); const encoded: []const u8 = std.mem.sliceAsBytes(std.unicode.utf8ToUtf16LeStringLiteral(string)); - return .{ .data = &[2]u8{ encoded.len + 2, @intFromEnum(Type.String) } ++ encoded }; + return .{ .data = &[2]u8{ encoded.len + 2, @backingInt(Type.String) } ++ encoded }; } }; diff --git a/core/src/core/usb/drivers/CDC.zig b/core/src/core/usb/drivers/CDC.zig index e99e869a5..7712e5dcb 100644 --- a/core/src/core/usb/drivers/CDC.zig +++ b/core/src/core/usb/drivers/CDC.zig @@ -247,7 +247,7 @@ pub fn init(self: *@This(), desc: *const Descriptor, device: *usb.DeviceInterfac /// Handle class-specific SETUP requests where recipient=Interface /// Called by DeviceController when the interface number matches this driver. pub fn class_request(self: *@This(), setup: *const usb.types.SetupPacket) ?[]const u8 { - const mgmt_request: ManagementRequestType = @enumFromInt(setup.request); + const mgmt_request: ManagementRequestType = @fromBackingInt(setup.request); log.debug("cdc setup: {any} {} {}", .{ mgmt_request, setup.length.into(), setup.value.into() }); return switch (mgmt_request) { diff --git a/core/src/core/usb/drivers/hid.zig b/core/src/core/usb/drivers/hid.zig index c9548e9f4..8a29886c8 100644 --- a/core/src/core/usb/drivers/hid.zig +++ b/core/src/core/usb/drivers/hid.zig @@ -63,7 +63,7 @@ pub const ReportItem = union(enum) { pub fn local(self: @This()) i32 { return switch (self) { - inline else => |x| @intFromEnum(x), + inline else => |x| @backingInt(x), .vendor => |x| x, }; } @@ -275,7 +275,7 @@ pub const ReportItem = union(enum) { inline else => |payload| blk: { const data: []const u8 = switch (@TypeOf(payload)) { void => "", - Collection, UsagePage => encode_int(@intFromEnum(payload)), + Collection, UsagePage => encode_int(@backingInt(payload)), u31, i32, ?i32 => encode_int(payload), InputOutput => &.{@bitCast(payload)}, else => |T| @compileError(@typeName(T) ++ " cannot be turned into a HID report"), @@ -397,8 +397,8 @@ pub fn InterruptDriver(options: InterruptDriverOptions) type { log.debug("class_request {any}", .{setup}); switch (setup.request_type.type) { .Standard => { - const hid_desc_type: usb.descriptor.HID.CsType = @enumFromInt(setup.value.into() >> 8); - const request_code: usb.types.SetupRequest = @enumFromInt(setup.request); + const hid_desc_type: usb.descriptor.HID.CsType = @fromBackingInt(setup.value.into() >> 8); + const request_code: usb.types.SetupRequest = @fromBackingInt(setup.request); if (request_code == .GetDescriptor and hid_desc_type == .HID) return std.mem.asBytes(&self.descriptor.hid) @@ -406,7 +406,7 @@ pub fn InterruptDriver(options: InterruptDriverOptions) type { return report_descriptor; }, .Class => { - const hid_request_type: RequestType = @enumFromInt(setup.request); + const hid_request_type: RequestType = @fromBackingInt(setup.request); switch (hid_request_type) { .SetIdle => { // TODO: https://github.com/ZigEmbeddedGroup/microzig/issues/454 diff --git a/core/src/core/usb/types.zig b/core/src/core/usb/types.zig index 97af35667..ec7f2ea2e 100644 --- a/core/src/core/usb/types.zig +++ b/core/src/core/usb/types.zig @@ -277,8 +277,8 @@ pub const ClassSubclassProtocol = extern struct { ) @This() { return .{ .class = class, - .subclass = @intFromEnum(subclass), - .protocol = @intFromEnum(protocol), + .subclass = @backingInt(subclass), + .protocol = @backingInt(protocol), }; } }; diff --git a/core/src/cpus/cortex_m.zig b/core/src/cpus/cortex_m.zig index 9242fc466..6e892acae 100644 --- a/core/src/cpus/cortex_m.zig +++ b/core/src/cpus/cortex_m.zig @@ -135,7 +135,7 @@ pub const interrupt = struct { } fn assert_not_exception(comptime int: Interrupt) void { - if (@intFromEnum(int) < 0) { + if (@backingInt(int) < 0) { @compileError("expected interrupt, got exception: " ++ @tagName(int)); } } @@ -327,8 +327,8 @@ pub const interrupt = struct { /// Note: Although the Priority values are 0 - 15, some platforms may /// only use the most significant bits. pub fn set_priority(comptime excpt: Exception, priority: Priority) void { - const num: u2 = @intCast(@intFromEnum(excpt) / 4); - const shift: u5 = @as(u5, @intCast(@intFromEnum(excpt))) % 4 * 8; + const num: u2 = @intCast(@backingInt(excpt) / 4); + const shift: u5 = @as(u5, @intCast(@backingInt(excpt))) % 4 * 8; // The code below is safe since the switch is compile-time resolved. // The any SHPRn register which is unavailable on a platform will @@ -340,22 +340,22 @@ pub const interrupt = struct { }, 1 => { ppb.SHPR1.raw &= ~(@as(u32, 0xFF) << shift); - ppb.SHPR1.raw |= @as(u32, @intFromEnum(priority)) << shift; + ppb.SHPR1.raw |= @as(u32, @backingInt(priority)) << shift; }, 2 => { ppb.SHPR2.raw &= ~(@as(u32, 0xFF) << shift); - ppb.SHPR2.raw |= @as(u32, @intFromEnum(priority)) << shift; + ppb.SHPR2.raw |= @as(u32, @backingInt(priority)) << shift; }, 3 => { ppb.SHPR3.raw &= ~(@as(u32, 0xFF) << shift); - ppb.SHPR3.raw |= @as(u32, @intFromEnum(priority)) << shift; + ppb.SHPR3.raw |= @as(u32, @backingInt(priority)) << shift; }, } } pub fn get_priority(comptime excpt: Exception) Priority { - const num: u2 = @intCast(@intFromEnum(excpt) / 4); - const shift: u5 = @as(u5, @intCast(@intFromEnum(excpt))) % 4 * 8; + const num: u2 = @intCast(@backingInt(excpt) / 4); + const shift: u5 = @as(u5, @intCast(@backingInt(excpt))) % 4 * 8; const raw: u8 = (switch (num) { 0 => @compileError("Cannot get the priority for the exception"), @@ -364,14 +364,14 @@ pub const interrupt = struct { 3 => ppb.SHPR3.raw, } >> shift) & 0xFF; - return @enumFromInt(raw); + return @fromBackingInt(raw); } }; const nvic = peripherals.nvic; pub fn is_enabled(comptime int: ExternalInterrupt) bool { - const num: comptime_int = @intFromEnum(int); + const num: comptime_int = @backingInt(int); switch (cortex_m) { .cortex_m0, .cortex_m0plus, @@ -392,7 +392,7 @@ pub const interrupt = struct { } pub fn enable(comptime int: ExternalInterrupt) void { - const num: comptime_int = @intFromEnum(int); + const num: comptime_int = @backingInt(int); switch (cortex_m) { .cortex_m0, .cortex_m0plus, @@ -413,7 +413,7 @@ pub const interrupt = struct { } pub fn disable(comptime int: ExternalInterrupt) void { - const num: comptime_int = @intFromEnum(int); + const num: comptime_int = @backingInt(int); switch (cortex_m) { .cortex_m0, .cortex_m0plus, @@ -434,7 +434,7 @@ pub const interrupt = struct { } pub fn is_pending(comptime int: ExternalInterrupt) bool { - const num: comptime_int = @intFromEnum(int); + const num: comptime_int = @backingInt(int); switch (cortex_m) { .cortex_m0, .cortex_m0plus, @@ -455,7 +455,7 @@ pub const interrupt = struct { } pub fn set_pending(comptime int: ExternalInterrupt) void { - const num: comptime_int = @intFromEnum(int); + const num: comptime_int = @backingInt(int); switch (cortex_m) { .cortex_m0, .cortex_m0plus, @@ -476,7 +476,7 @@ pub const interrupt = struct { } pub fn clear_pending(comptime int: ExternalInterrupt) void { - const num: comptime_int = @intFromEnum(int); + const num: comptime_int = @backingInt(int); switch (cortex_m) { .cortex_m0, .cortex_m0plus, @@ -497,11 +497,11 @@ pub const interrupt = struct { } pub fn set_priority(comptime int: ExternalInterrupt, priority: Priority) void { - nvic.IPR[@intFromEnum(int)] = @intFromEnum(priority); + nvic.IPR[@backingInt(int)] = @backingInt(priority); } pub fn get_priority(comptime int: ExternalInterrupt) Priority { - return @enumFromInt(peripherals.nvic.IPR[@intFromEnum(int)]); + return @fromBackingInt(peripherals.nvic.IPR[@backingInt(int)]); } }; diff --git a/core/src/cpus/cortex_m/m7_utils.zig b/core/src/cpus/cortex_m/m7_utils.zig index acfbdab44..504a31a22 100644 --- a/core/src/cpus/cortex_m/m7_utils.zig +++ b/core/src/cpus/cortex_m/m7_utils.zig @@ -31,7 +31,7 @@ pub fn init_swo(config: struct { peripherals.itm.TER[config.stim_port].modify(.{ .STIMENA = 1 }); // Configure Serial Wire Output (SWO): - peripherals.tpiu.SPPR.modify(.{ .TXMODE = @intFromEnum(config.tx_mode) }); + peripherals.tpiu.SPPR.modify(.{ .TXMODE = @backingInt(config.tx_mode) }); // SWO output clock = Asynchronous_Reference_Clock/(SWOSCALAR +1)\ // SWOSCALAR = (Asynchronous_Reference_Clock)/(SWO output clock) - 1 diff --git a/core/src/cpus/msp430.zig b/core/src/cpus/msp430.zig index c0ddf51b9..52860873b 100644 --- a/core/src/cpus/msp430.zig +++ b/core/src/cpus/msp430.zig @@ -67,7 +67,7 @@ const vector_table: VectorTable = vector_table: { // Apply interrupts for (@typeInfo(@TypeOf(microzig.options.interrupts)).@"struct".field_names) |field_name| { const maybe_handler = @field(microzig.options.interrupts, field_name); - tmp.table[@intFromEnum(@field(Interrupt, field_name))] = + tmp.table[@backingInt(@field(Interrupt, field_name))] = maybe_handler orelse .{ .c = interrupt.unhandled }; } diff --git a/core/src/mmio.zig b/core/src/mmio.zig index 641d75a50..aed1d81b5 100644 --- a/core/src/mmio.zig +++ b/core/src/mmio.zig @@ -67,8 +67,8 @@ pub fn Mmio(comptime Packed: type) type { // same as for the .Int case, but casting to and from the u... tag type U of the enum FieldType const U = enum_info.tag_type; @field(val, field_name) = - @as(FieldType, @enumFromInt(@as(U, @intFromEnum(@field(val, field_name))) ^ - @as(U, @intFromEnum(@as(FieldType, value))))); + @as(FieldType, @fromBackingInt(@as(U, @backingInt(@field(val, field_name)) ^ + @as(U, @backingInt(@as(FieldType, value)))))); }, else => |T| { @compileError("unsupported register field type '" ++ @typeName(T) ++ "'"); diff --git a/drivers/src/base/ClockDevice.zig b/drivers/src/base/ClockDevice.zig index 569b9f2c2..b9236c0d6 100644 --- a/drivers/src/base/ClockDevice.zig +++ b/drivers/src/base/ClockDevice.zig @@ -104,7 +104,7 @@ pub const TestDevice = struct { pub fn get_time_since_boot_fn(ctx: *anyopaque) mdf.time.Absolute { const dev: *TestDevice = @ptrCast(@alignCast(ctx)); - return @enumFromInt(dev.time); + return @fromBackingInt(dev.time); } pub fn sleep_fn(ctx: *anyopaque, time_us: u64) void { diff --git a/drivers/src/base/DateTime.zig b/drivers/src/base/DateTime.zig index 9ae7f0374..aa7e1fe2b 100644 --- a/drivers/src/base/DateTime.zig +++ b/drivers/src/base/DateTime.zig @@ -332,7 +332,7 @@ pub const Timezone = enum(i16) { minute_offset = -minute_offset; } - return @enumFromInt(minute_offset); + return @fromBackingInt(minute_offset); } /// Convert a Timezone to a string like "+00:00" or "-00:00" @@ -345,9 +345,9 @@ pub const Timezone = enum(i16) { pub fn to_string(self: Timezone, out_string: []u8, separator: ?[]const u8) Error!usize { if (out_string.len < 5 + (separator orelse @as([]const u8, ":")).len) return error.NotEnoughSpace; - const minus = @intFromEnum(self) < 0; + const minus = @backingInt(self) < 0; - var m = @abs(@intFromEnum(self)); + var m = @abs(@backingInt(self)); const h = m / 60; m = m % 60; @@ -383,8 +383,8 @@ pub const Timezone = enum(i16) { /// This number is the number of milliseconds to add to a time in the this timezone /// to get the time in the other timezone pub fn offset(self: Timezone, other: Timezone) i64 { - var delta: i64 = @intFromEnum(other); - delta -= @intFromEnum(self); + var delta: i64 = @backingInt(other); + delta -= @backingInt(self); delta *= 60_000; return delta; } @@ -575,7 +575,7 @@ pub fn day_of_week(self: DateTime) DayOfWeek { var dow: i32 = (13 * (m + 1) / 5) + y + (y / 4) + (c / 4) + self.day; dow -= 2 * c; - return @enumFromInt(@mod(dow, 7) - 1); + return @fromBackingInt(@intCast(@mod(dow, 7) - 1)); } /// Convert the DateTime to an ISO 8601 string. @@ -656,20 +656,20 @@ pub fn to_string(self: DateTime, out_string: []u8, format: []const u8, localizat if (f >= format.len) break; switch (format[f]) { 'a' => { - const val = l10n.day_abbr[@intFromEnum(self.day_of_week())]; + const val = l10n.day_abbr[@backingInt(self.day_of_week())]; if (i + val.len > out_string.len) return error.NotEnoughSpace; std.mem.copyForwards(u8, out_string[i..], val); i += val.len; }, 'A' => { - const val = l10n.day_names[@intFromEnum(self.day_of_week())]; + const val = l10n.day_names[@backingInt(self.day_of_week())]; if (i + val.len > out_string.len) return error.NotEnoughSpace; std.mem.copyForwards(u8, out_string[i..], val); i += val.len; }, 'w' => { if (i + 1 > out_string.len) return error.NotEnoughSpace; - i += int_to_string_padded(out_string[i..], @intFromEnum(self.day_of_week()), 1); + i += int_to_string_padded(out_string[i..], @backingInt(self.day_of_week()), 1); }, 'd' => { if (i + 2 > out_string.len) return error.NotEnoughSpace; diff --git a/drivers/src/base/Digital_IO.zig b/drivers/src/base/Digital_IO.zig index 3c2af379c..ffda44901 100644 --- a/drivers/src/base/Digital_IO.zig +++ b/drivers/src/base/Digital_IO.zig @@ -29,11 +29,11 @@ pub const State = enum(u1) { high = 1, pub inline fn invert(state: State) State { - return @as(State, @enumFromInt(~@intFromEnum(state))); + return @as(State, @fromBackingInt(~@backingInt(state))); } pub inline fn value(state: State) u1 { - return @intFromEnum(state); + return @backingInt(state); } }; pub const Direction = enum { input, output }; diff --git a/drivers/src/base/I2C_Device.zig b/drivers/src/base/I2C_Device.zig index ddaf60434..fd4d0ed38 100644 --- a/drivers/src/base/I2C_Device.zig +++ b/drivers/src/base/I2C_Device.zig @@ -25,7 +25,7 @@ pub const InterfaceError = Error || error{Unsupported}; pub const Address = enum(u7) { _, /// The general call addresses all devices on the bus using the I²C address 0. - pub const general_call: Address = @enumFromInt(0x00); + pub const general_call: Address = @fromBackingInt(0x00); pub const Error = error{ GeneralCall, @@ -45,7 +45,7 @@ pub const Address = enum(u7) { /// /// See more here: https://www.i2c-bus.org/addressing/ pub fn check_reserved(addr: Address) Address.Error!void { - const value: u7 = @intFromEnum(addr); + const value: u7 = @backingInt(addr); switch (value) { 0b0000000 => return Address.Error.GeneralCall, @@ -62,7 +62,7 @@ pub const Address = enum(u7) { pub fn format(addr: Address, fmt: []const u8, options: std.fmt.FormatOptions, writer: anytype) !void { _ = fmt; _ = options; - try writer.print("I2C(0x{X:0>2})", .{@intFromEnum(addr)}); + try writer.print("I2C(0x{X:0>2})", .{@backingInt(addr)}); } }; @@ -159,7 +159,7 @@ pub const TestDevice = struct { .write_enabled = write_enabled, - .addr = @enumFromInt(0), + .addr = @fromBackingInt(0), }; } @@ -293,7 +293,7 @@ test "Address.check_reserved returns correct error types" { }; for (test_cases) |test_case| { - const addr: Address = @enumFromInt(test_case.address); + const addr: Address = @fromBackingInt(test_case.address); if (test_case.expected_error) |expected_error| { std.testing.expectError(expected_error, addr.check_reserved()) catch |err| { std.debug.print( @@ -325,7 +325,7 @@ test TestDevice { var buffer: [16]u8 = undefined; const id = td.i2c_device(); - const addr: Address = @enumFromInt(0); + const addr: Address = @fromBackingInt(0); { // The first input datagram will be received here: diff --git a/drivers/src/display/hd44780.zig b/drivers/src/display/hd44780.zig index 130fc34d1..d8f4c7a2a 100644 --- a/drivers/src/display/hd44780.zig +++ b/drivers/src/display/hd44780.zig @@ -91,7 +91,7 @@ pub fn HD44780(comptime config: HD44780_Config) type { //LCD functions fn set_rs_pin(lcd: *Self, value: u1) !void { - try lcd.io_interface.RS.write(@enumFromInt(value)); + try lcd.io_interface.RS.write(@fromBackingInt(value)); } fn pulse_en_pin(lcd: *Self) !void { @@ -125,7 +125,7 @@ pub fn HD44780(comptime config: HD44780_Config) type { for (0..4) |index| { const pin_bit: u3 = @as(u3, @intCast(index)) + 4; const value: u1 = if (data & (@as(u8, 1) << pin_bit) != 0) 1 else 0; - try lcd.io_interface.high_pins[index].write(@enumFromInt(value)); + try lcd.io_interface.high_pins[index].write(@fromBackingInt(value)); } if (lcd.full_bus) { @@ -133,7 +133,7 @@ pub fn HD44780(comptime config: HD44780_Config) type { //load lower-bits for (0..4) |index| { const value: u1 = if (data & (@as(u8, 1) << @intCast(index)) != 0) 1 else 0; - try pins[index].write(@enumFromInt(value)); + try pins[index].write(@fromBackingInt(value)); } } else { return error.UnsupportedBus; @@ -174,7 +174,7 @@ pub fn HD44780(comptime config: HD44780_Config) type { //low level command function pub inline fn command(lcd: *Self, cmd: LCD_Commands) !void { - try lcd.send(@intFromEnum(cmd), 0); + try lcd.send(@backingInt(cmd), 0); } pub fn screen_clear(lcd: *Self) !void { @@ -266,7 +266,7 @@ pub fn HD44780(comptime config: HD44780_Config) type { pub fn set_backlight(lcd: *Self, value: u1) !void { if (lcd.io_interface.BK) |bk| { - try bk.write(@enumFromInt(value)); + try bk.write(@fromBackingInt(value)); return; } return error.NoBacklight; @@ -287,9 +287,9 @@ pub fn HD44780(comptime config: HD44780_Config) type { } pub fn init_device(lcd: *Self, device_config: DeviceConfig) !void { - lcd.function_set = (1 << 5) + (@as(u6, @intFromEnum(device_config.bus)) << 4) + (@as(u6, @intFromEnum(device_config.lines)) << 3) + (@as(u6, @intFromEnum(device_config.char_size)) << 2); - lcd.entry_mode = (1 << 2) + (@as(u3, @intFromEnum(device_config.shift_direction)) << 1) + @intFromEnum(device_config.display_shift); - lcd.display_control = (1 << 3) + (@as(u4, @intFromEnum(device_config.display)) << 2) + (@as(u4, @intFromEnum(device_config.cursor)) << 1) + @intFromEnum(device_config.cursor_blink); + lcd.function_set = (1 << 5) + (@as(u6, @backingInt(device_config.bus)) << 4) + (@as(u6, @backingInt(device_config.lines)) << 3) + (@as(u6, @backingInt(device_config.char_size)) << 2); + lcd.entry_mode = (1 << 2) + (@as(u3, @backingInt(device_config.shift_direction)) << 1) + @backingInt(device_config.display_shift); + lcd.display_control = (1 << 3) + (@as(u4, @backingInt(device_config.display)) << 2) + (@as(u4, @backingInt(device_config.cursor)) << 1) + @backingInt(device_config.cursor_blink); lcd.full_bus = !(device_config.bus == .four); if (!device_config.skip_begin_delay) { lcd.internal_delay(55000); //wait time = power on time + init time (datasheet: power up time = >40ms | begin time = >15ms) diff --git a/drivers/src/display/sh1106.zig b/drivers/src/display/sh1106.zig index 34307b5c5..b9c943cb5 100644 --- a/drivers/src/display/sh1106.zig +++ b/drivers/src/display/sh1106.zig @@ -205,15 +205,15 @@ pub fn SH1106(comptime options: Options) type { } pub fn entire_display_on(self: Self, mode: DisplayOnMode) !void { - try self.execute_command(@intFromEnum(mode), &.{}); + try self.execute_command(@backingInt(mode), &.{}); } pub fn set_normal_or_inverse_color(self: Self, mode: NormalOrInverseDisplay) !void { - try self.execute_command(@intFromEnum(mode), &.{}); + try self.execute_command(@backingInt(mode), &.{}); } pub fn set_display(self: Self, mode: DisplayMode) !void { - try self.execute_command(@intFromEnum(mode), &.{}); + try self.execute_command(@backingInt(mode), &.{}); } pub fn set_lower_column_address(self: Self, addr: u2) !void { @@ -301,7 +301,7 @@ pub fn SH1106(comptime options: Options) type { @"8.0", @"9.0", }) !void { - const cmd: u8 = 0x30 | @as(u8, @intFromEnum(voltage)); + const cmd: u8 = 0x30 | @as(u8, @backingInt(voltage)); try self.execute_command(cmd, &.{}); } diff --git a/drivers/src/display/sharp_memory_lcd.zig b/drivers/src/display/sharp_memory_lcd.zig index ba259e3ad..fcb234de2 100644 --- a/drivers/src/display/sharp_memory_lcd.zig +++ b/drivers/src/display/sharp_memory_lcd.zig @@ -127,10 +127,10 @@ pub fn SharpMemory_LCD(comptime config: Config) type { if (comptime config.vcom_mode == .software) { // Toggle VCOM state self.vcom_state = !self.vcom_state; - return @intFromEnum(base_cmd) | if (self.vcom_state) @intFromEnum(Cmd.VCOM) else 0; + return @backingInt(base_cmd) | if (self.vcom_state) @backingInt(Cmd.VCOM) else 0; } // No VCOM overhead for displays that don't need it - return @intFromEnum(base_cmd); + return @backingInt(base_cmd); } /// Clear the entire display to white diff --git a/drivers/src/display/ssd1306.zig b/drivers/src/display/ssd1306.zig index f574bac23..24f70e3cb 100644 --- a/drivers/src/display/ssd1306.zig +++ b/drivers/src/display/ssd1306.zig @@ -233,15 +233,15 @@ pub fn SSD1306_Generic(comptime options: SSD1306_Options) type { } pub fn entire_display_on(self: Self, mode: DisplayOnMode) !void { - try self.execute_command(@intFromEnum(mode), &.{}); + try self.execute_command(@backingInt(mode), &.{}); } pub fn set_normal_or_inverse_display(self: Self, mode: NormalOrInverseDisplay) !void { - try self.execute_command(@intFromEnum(mode), &.{}); + try self.execute_command(@backingInt(mode), &.{}); } pub fn set_display(self: Self, mode: DisplayMode) !void { - try self.execute_command(@intFromEnum(mode), &.{}); + try self.execute_command(@backingInt(mode), &.{}); } // Scrolling Commands @@ -249,7 +249,7 @@ pub fn SSD1306_Generic(comptime options: SSD1306_Options) type { if (end_page < start_page) return PageError.EndPageIsSmallerThanStartPage; - try self.execute_command(@intFromEnum(direction), &.{ + try self.execute_command(@backingInt(direction), &.{ 0x00, // Dummy byte @as(u8, start_page), @as(u8, frame_frequency), @@ -260,7 +260,7 @@ pub fn SSD1306_Generic(comptime options: SSD1306_Options) type { } pub fn continuous_vertical_and_horizontal_scroll_setup(self: Self, direction: VerticalAndHorizontalScrollDirection, start_page: u3, end_page: u3, frame_frequency: u3, vertical_scrolling_offset: u6) !void { - try self.execute_command(@intFromEnum(direction), &.{ + try self.execute_command(@backingInt(direction), &.{ 0x00, // Dummy byte @as(u8, start_page), @as(u8, frame_frequency), @@ -283,13 +283,13 @@ pub fn SSD1306_Generic(comptime options: SSD1306_Options) type { // Addressing Setting Commands pub fn set_column_start_address_for_page_addressing_mode(self: Self, column: Column, address: u4) !void { - const cmd = (@as(u8, @intFromEnum(column)) << 4) | @as(u8, address); + const cmd = (@as(u8, @backingInt(column)) << 4) | @as(u8, address); try self.execute_command(cmd, &.{}); } pub fn set_memory_addressing_mode(self: Self, mode: MemoryAddressingMode) !void { - try self.execute_command(0x20, &.{@as(u8, @intFromEnum(mode))}); + try self.execute_command(0x20, &.{@as(u8, @backingInt(mode))}); } pub fn set_column_address(self: Self, start: u7, end: u7) !void { @@ -618,7 +618,7 @@ pub fn SSD1306_Generic(comptime options: SSD1306_Options) type { var td = TestDevice.init_receiver_only(); defer td.deinit(); - const expected_data = &[_]u8{ 0x00, 0x20, @as(u8, @intFromEnum(mode)) }; + const expected_data = &[_]u8{ 0x00, 0x20, @as(u8, @backingInt(mode)) }; // Act const driver = try SSD1306_I2C.init(td.datagram_device()); try driver.set_memory_addressing_mode(mode); diff --git a/drivers/src/display/st77xx.zig b/drivers/src/display/st77xx.zig index 27d94dfc4..083b35022 100644 --- a/drivers/src/display/st77xx.zig +++ b/drivers/src/display/st77xx.zig @@ -326,7 +326,7 @@ pub fn ST77xx_Generic(driver_cfg: DriverConfig, display_cfg: DisplayConfig) type try dri.dd.connect(); defer dri.dd.disconnect(); - try dri.dd.write(&[_]u8{@intFromEnum(cmd)}); + try dri.dd.write(&[_]u8{@backingInt(cmd)}); try dri.set_spi_mode(.data); try dri.dd.write(params); diff --git a/drivers/src/input/keyboard_matrix.zig b/drivers/src/input/keyboard_matrix.zig index 87659ab9f..1c2b7cd21 100644 --- a/drivers/src/input/keyboard_matrix.zig +++ b/drivers/src/input/keyboard_matrix.zig @@ -145,13 +145,13 @@ pub const Key = enum(u16) { row: u8, pub fn from_key(key: Key) Encoding { - const int: u16 = @intFromEnum(key); + const int: u16 = @backingInt(key); return @bitCast(int); } pub fn to_key(enc: Encoding) Key { const int: u16 = @bitCast(enc); - return @enumFromInt(int); + return @fromBackingInt(int); } }; }; diff --git a/drivers/src/io_expander/pca9685.zig b/drivers/src/io_expander/pca9685.zig index dff75f721..290dd9820 100644 --- a/drivers/src/io_expander/pca9685.zig +++ b/drivers/src/io_expander/pca9685.zig @@ -75,7 +75,7 @@ pub fn PCA9685(comptime config: PCA9685_Config) type { std.mem.writeInt(u16, &buff_off, off, .little); try self.dd.writev(&.{ - &.{@intFromEnum(Register.Led0OnL) + 4 * channel}, + &.{@backingInt(Register.Led0OnL) + 4 * channel}, &buffer_on, &buff_off, }); @@ -99,7 +99,7 @@ pub fn PCA9685(comptime config: PCA9685_Config) type { std.mem.writeInt(u16, &buff_off, off, .little); try self.dd.writev(&.{ - &.{@intFromEnum(Register.AllLedOnL)}, + &.{@backingInt(Register.AllLedOnL)}, &buffer_on, &buff_off, }); @@ -127,11 +127,11 @@ pub fn PCA9685(comptime config: PCA9685_Config) type { } pub fn write_register(self: Self, register: Register, value: u8) !void { - try self.dd.write(&.{ @intFromEnum(register), value }); + try self.dd.write(&.{ @backingInt(register), value }); } pub fn read_register(self: Self, register: Register) !u8 { - try self.dd.write(&.{@intFromEnum(register)}); + try self.dd.write(&.{@backingInt(register)}); var value: [1]u8 = undefined; _ = try self.dd.read(&value); return value[0]; diff --git a/drivers/src/root.zig b/drivers/src/root.zig index 75a375724..a2e52ea78 100644 --- a/drivers/src/root.zig +++ b/drivers/src/root.zig @@ -93,11 +93,11 @@ pub const time = struct { _, pub fn from_us(us: u64) Absolute { - return @as(Absolute, @enumFromInt(us)); + return @as(Absolute, @fromBackingInt(us)); } pub fn to_us(abs: Absolute) u64 { - return @intFromEnum(abs); + return @backingInt(abs); } pub fn is_reached_by(deadline: Absolute, point: Absolute) bool { @@ -123,7 +123,7 @@ pub const time = struct { _, pub fn from_us(us: u64) Duration { - return @as(Duration, @enumFromInt(us)); + return @as(Duration, @fromBackingInt(us)); } pub fn from_ms(ms: u64) Duration { @@ -131,7 +131,7 @@ pub const time = struct { } pub fn to_us(duration: Duration) u64 { - return @intFromEnum(duration); + return @backingInt(duration); } pub fn less_than(self: Duration, other: Duration) bool { @@ -197,11 +197,11 @@ pub const time = struct { }; pub fn make_timeout(since: Absolute, timeout: Duration) Absolute { - return @as(Absolute, @enumFromInt(since.to_us() + timeout.to_us())); + return @as(Absolute, @fromBackingInt(since.to_us() + timeout.to_us())); } pub fn make_timeout_us(since: Absolute, timeout_us: u64) Absolute { - return @as(Absolute, @enumFromInt(since.to_us() + timeout_us)); + return @as(Absolute, @fromBackingInt(since.to_us() + timeout_us)); } }; diff --git a/drivers/src/sensor/AS5600.zig b/drivers/src/sensor/AS5600.zig index 524db7487..9237bd429 100644 --- a/drivers/src/sensor/AS5600.zig +++ b/drivers/src/sensor/AS5600.zig @@ -9,7 +9,7 @@ const mdf = @import("../root.zig"); pub const AS5600 = struct { const Self = @This(); - const address: mdf.base.I2C_Device.Address = @enumFromInt(0x36); + const address: mdf.base.I2C_Device.Address = @fromBackingInt(0x36); dev: mdf.base.I2C_Device, const register = enum(u8) { @@ -85,7 +85,7 @@ pub const AS5600 = struct { } pub fn read1_raw(self: *const Self, reg: Self.register) !u8 { - try self.dev.write(Self.address, &[_]u8{@intFromEnum(reg)}); + try self.dev.write(Self.address, &[_]u8{@backingInt(reg)}); var buf: [1]u8 = undefined; const size = try self.dev.read(Self.address, &buf); if (size != 1) return error.ReadError; @@ -93,7 +93,7 @@ pub const AS5600 = struct { } pub fn read2_raw(self: *const Self, reg: Self.register) !u16 { - try self.dev.write(Self.address, &[_]u8{@intFromEnum(reg)}); + try self.dev.write(Self.address, &[_]u8{@backingInt(reg)}); var buf: [2]u8 = undefined; const size = try self.dev.read(Self.address, &buf); if (size != 2) return error.ReadError; @@ -103,7 +103,7 @@ pub const AS5600 = struct { pub fn write_raw(self: *const Self, reg: Self.register, v: u16) !void { return self.dev.write( Self.address, - &([1]u8{@intFromEnum(reg)} ++ @as([2]u8, @bitCast(std.mem.nativeToBig(u16, v)))), + &([1]u8{@backingInt(reg)} ++ @as([2]u8, @bitCast(std.mem.nativeToBig(u16, v)))), ); } diff --git a/drivers/src/sensor/DS18B20.zig b/drivers/src/sensor/DS18B20.zig index b57941f9c..314079cd1 100644 --- a/drivers/src/sensor/DS18B20.zig +++ b/drivers/src/sensor/DS18B20.zig @@ -66,7 +66,7 @@ pub const DS18B20 = struct { } fn from_int(value: u2) Resolution { - return @enumFromInt(value); + return @fromBackingInt(value); } }; @@ -172,7 +172,7 @@ pub const DS18B20 = struct { }; const th, const tl, const config = result; - const new_config: u8 = if (args.resolution) |res| (@as(u8, @intFromEnum(res)) << 5) else config; + const new_config: u8 = if (args.resolution) |res| (@as(u8, @backingInt(res)) << 5) else config; if (!(try self.reset())) return error.DeviceNotFound; try self.select_target(args.target); @@ -273,7 +273,7 @@ pub const DS18B20 = struct { fn convert_temperature_to_celsius(lsb: u8, msb: u8, resolution: Resolution) f32 { var raw_temp: i16 = @bitCast(@as(u16, msb) << 8 | lsb); - raw_temp = raw_temp >> (3 - @intFromEnum(resolution)); + raw_temp = raw_temp >> (3 - @backingInt(resolution)); return @as(f32, @floatFromInt(raw_temp)) * resolution.factor(); } @@ -326,7 +326,7 @@ pub const DS18B20 = struct { } pub fn write_command(self: *const DS18B20, command: Command) !void { - try self.write_byte(@intFromEnum(command)); + try self.write_byte(@backingInt(command)); } pub fn write_byte(self: *const DS18B20, data: u8) !void { diff --git a/drivers/src/sensor/HTS221.zig b/drivers/src/sensor/HTS221.zig index 974ea1bad..1adc1886d 100644 --- a/drivers/src/sensor/HTS221.zig +++ b/drivers/src/sensor/HTS221.zig @@ -18,7 +18,7 @@ pub const Config = struct { }; pub const HTS221 = struct { - const address: mdf_base.I2C_Device.Address = @enumFromInt(0b1011111); + const address: mdf_base.I2C_Device.Address = @fromBackingInt(0b1011111); const RegsAddr = enum(u8) { WHO_AM_I = 0x0F, AV_CONF = 0x10, @@ -39,11 +39,11 @@ pub const HTS221 = struct { T1_OUT = 0x3E, fn v(self: @This()) u8 { - return @intFromEnum(self); + return @backingInt(self); } fn auto_v(self: @This()) u8 { - return @intFromEnum(self) | 0x80; + return @backingInt(self) | 0x80; } }; diff --git a/drivers/src/sensor/ICM_20948.zig b/drivers/src/sensor/ICM_20948.zig index 81b1fc9fd..7ee9bbb49 100644 --- a/drivers/src/sensor/ICM_20948.zig +++ b/drivers/src/sensor/ICM_20948.zig @@ -169,7 +169,7 @@ pub const ICM_20948 = struct { inline fn value(self: @This()) u8 { // This peels off the outer union to get access to the inner enum return switch (self) { - inline else => |e| @intFromEnum(e), + inline else => |e| @backingInt(e), }; } inline fn bank(self: @This()) u2 { @@ -523,8 +523,8 @@ pub const ICM_20948 = struct { reserved_6: u2 = 0, }{ .ACCEL_FCHOICE = if (config.accel_dlp == .disabled) 0 else 1, - .ACCEL_FS_SEL = @intFromEnum(config.accel_range), - .ACCEL_DLPFCFG = @truncate(@intFromEnum(config.accel_dlp)), + .ACCEL_FS_SEL = @backingInt(config.accel_range), + .ACCEL_DLPFCFG = @truncate(@backingInt(config.accel_dlp)), }; try self.write_byte(.{ .bank2 = .accel_config }, @bitCast(reg)); @@ -595,8 +595,8 @@ pub const ICM_20948 = struct { reserved_6: u2 = 0, }{ .GYRO_FCHOICE = if (config.gyro_dlp == .disabled) 0 else 1, - .GYRO_FS_SEL = @intFromEnum(config.gyro_range), - .GYRO_DLPFCFG = @truncate(@intFromEnum(config.gyro_dlp)), + .GYRO_FS_SEL = @backingInt(config.gyro_range), + .GYRO_DLPFCFG = @truncate(@backingInt(config.gyro_dlp)), }; try self.write_byte(.{ .bank2 = .gyro_config_1 }, @bitCast(reg)); @@ -797,7 +797,7 @@ pub const ICM_20948 = struct { try self.set_mag_read(); self.clock.sleep_us(MAG_WRITE_DELAY_US); // Set register to read from - try self.write_byte(.{ .bank3 = .i2c_slv0_reg }, @intFromEnum(reg)); + try self.write_byte(.{ .bank3 = .i2c_slv0_reg }, @backingInt(reg)); // Configure master to auto-read into SENS_DATA regs try self.write_byte(.{ .bank3 = .i2c_slv0_ctrl }, @bitCast(i2c_slv0_ctrl{ .i2c_slv0_leng = @truncate(buf.len), @@ -818,7 +818,7 @@ pub const ICM_20948 = struct { pub inline fn mag_write_byte(self: *Self, reg: MagRegister, val: u8) Error!void { try self.set_mag_write(); self.clock.sleep_us(MAG_WRITE_DELAY_US); - try self.write_byte(.{ .bank3 = .i2c_slv0_reg }, @intFromEnum(reg)); + try self.write_byte(.{ .bank3 = .i2c_slv0_reg }, @backingInt(reg)); try self.write_byte(.{ .bank3 = .i2c_slv0_do }, val); try self.write_byte(.{ .bank3 = .i2c_slv0_ctrl }, @bitCast(i2c_slv0_ctrl{ .i2c_slv0_leng = 1, @@ -850,7 +850,7 @@ pub const ICM_20948 = struct { // NOTE: We set the address to the byte before hxl, and set the length to 9 bytes so // that we read status1 which we can check, but more importantly, we read out // status2, which MUST BE READ between reads otherwise the values won't get updated. - try self.write_byte(.{ .bank3 = .i2c_slv0_reg }, @intFromEnum(MagRegister.status1)); + try self.write_byte(.{ .bank3 = .i2c_slv0_reg }, @backingInt(MagRegister.status1)); try self.write_byte(.{ .bank3 = .i2c_slv0_ctrl }, @bitCast(i2c_slv0_ctrl{ .i2c_slv0_en = 1, .i2c_slv0_leng = 9, @@ -905,7 +905,7 @@ test "set_bank" { defer d.deinit(); const id = d.i2c_device(); - var dev = try ICM_20948.init(id, @enumFromInt(0), ttd.clock_device(), .{}); + var dev = try ICM_20948.init(id, @fromBackingInt(0), ttd.clock_device(), .{}); // Nothing is sent in init try d.expect_sent(&.{}); @@ -933,7 +933,7 @@ test "reset" { defer d.deinit(); const id = d.i2c_device(); - var dev = try ICM_20948.init(id, @enumFromInt(0), ttd.clock_device(), .{}); + var dev = try ICM_20948.init(id, @fromBackingInt(0), ttd.clock_device(), .{}); // Nothing is sent in init try d.expect_sent(&.{}); @@ -951,7 +951,7 @@ test "read_byte" { defer d.deinit(); const id = d.i2c_device(); - var dev = try ICM_20948.init(id, @enumFromInt(0), ttd.clock_device(), .{}); + var dev = try ICM_20948.init(id, @fromBackingInt(0), ttd.clock_device(), .{}); // Read byte will set the bank // -- Put in the values it expects to read @@ -968,7 +968,7 @@ test "error handling in setup" { defer d.deinit(); const id = d.i2c_device(); - var dev = try ICM_20948.init(id, @enumFromInt(0), ttd.clock_device(), .{}); + var dev = try ICM_20948.init(id, @fromBackingInt(0), ttd.clock_device(), .{}); // Test wrong WHO_AM_I response, first byte is read during reset() d.input_sequence = &.{ &.{0x00}, &.{0xFF} }; // Wrong ID after reset @@ -982,7 +982,7 @@ test "device responsiveness check" { defer d.deinit(); const id = d.i2c_device(); - var dev = try ICM_20948.init(id, @enumFromInt(0), ttd.clock_device(), .{}); + var dev = try ICM_20948.init(id, @fromBackingInt(0), ttd.clock_device(), .{}); // Test with correct WHO_AM_I d.input_sequence = &.{&.{ICM_20948.WHOAMI}}; diff --git a/drivers/src/sensor/MLX90640.zig b/drivers/src/sensor/MLX90640.zig index 35958fb5d..17fcca0c3 100644 --- a/drivers/src/sensor/MLX90640.zig +++ b/drivers/src/sensor/MLX90640.zig @@ -109,7 +109,7 @@ pub const MLX90640 = struct { } fn write(self: *Self, reg: Self.registers, val: u16) !void { - const addr: u16 = @intFromEnum(reg); + const addr: u16 = @backingInt(reg); const req = struct { addr_be: u16, val_be: u16 }{ .addr_be = std.mem.nativeToBig(u16, addr), .val_be = std.mem.nativeToBig(u16, val), @@ -120,7 +120,7 @@ pub const MLX90640 = struct { } fn write_then_read(self: *Self, reg: Self.registers, buf: []u16) !void { - const addr: u16 = std.mem.nativeToBig(u16, @intFromEnum(reg)); + const addr: u16 = std.mem.nativeToBig(u16, @backingInt(reg)); const req = std.mem.asBytes(&addr); try self.i2c.write_then_read(self.address, req, self.frame_data[0 .. buf.len * 2]); for (0.., buf) |i, _| { @@ -974,7 +974,7 @@ test "control_register_values" { var tc = TestClock.init(); - var camera = try MLX90640.init(.{ .i2c = td.i2c_device(), .address = @enumFromInt(0x7f), .clock = tc.clock_device() }); + var camera = try MLX90640.init(.{ .i2c = td.i2c_device(), .address = @fromBackingInt(0x7f), .clock = tc.clock_device() }); const rr = try camera.refresh_rate(); try std.testing.expectEqual(5, rr); @@ -1016,7 +1016,7 @@ test "temperature" { var tc = TestClock.init(); - var camera = try MLX90640.init(.{ .i2c = td.i2c_device(), .address = @enumFromInt(0x7f), .clock = tc.clock_device() }); + var camera = try MLX90640.init(.{ .i2c = td.i2c_device(), .address = @fromBackingInt(0x7f), .clock = tc.clock_device() }); var temp: [834]f32 = undefined; try camera.temperature(&temp); diff --git a/drivers/src/sensor/MPU_6050.zig b/drivers/src/sensor/MPU_6050.zig index 2bb31f3e7..8414f3052 100644 --- a/drivers/src/sensor/MPU_6050.zig +++ b/drivers/src/sensor/MPU_6050.zig @@ -362,7 +362,7 @@ pub const MPU_6050 = struct { try self.dev.connect(); defer self.dev.disconnect(); - try self.dev.write(&.{ @intFromEnum(reg), value }); + try self.dev.write(&.{ @backingInt(reg), value }); } fn read_byte(self: MPU_6050, reg: Register) Error!u8 { @@ -370,7 +370,7 @@ pub const MPU_6050 = struct { defer self.dev.disconnect(); var value: u8 = undefined; - try self.dev.write_then_read(&.{@intFromEnum(reg)}, (&value)[0..1]); + try self.dev.write_then_read(&.{@backingInt(reg)}, (&value)[0..1]); return value; } @@ -379,7 +379,7 @@ pub const MPU_6050 = struct { defer self.dev.disconnect(); var buf: [2 * n]u8 = undefined; - try self.dev.write_then_read(&.{@intFromEnum(reg)}, &buf); + try self.dev.write_then_read(&.{@backingInt(reg)}, &buf); var out: [n]i16 = undefined; inline for (0..n) |i| { out[i] = @bitCast(@as(u16, buf[2 * i]) << 8 | buf[2 * i + 1]); diff --git a/drivers/src/sensor/TLV493D.zig b/drivers/src/sensor/TLV493D.zig index f1e2dcfd1..9976e342a 100644 --- a/drivers/src/sensor/TLV493D.zig +++ b/drivers/src/sensor/TLV493D.zig @@ -11,8 +11,8 @@ const I2C_Device = mdf.base.I2C_Device; const ClockDevice = mdf.base.ClockDevice; /// TLV493D I2C addresses -pub const ADDRESS0: I2C_Device.Address = @enumFromInt(0x1F); -pub const ADDRESS1: I2C_Device.Address = @enumFromInt(0x5E); // Default +pub const ADDRESS0: I2C_Device.Address = @fromBackingInt(0x1F); +pub const ADDRESS1: I2C_Device.Address = @fromBackingInt(0x5E); // Default /// Startup delay in milliseconds pub const STARTUPDELAY_MS: u32 = 40; @@ -283,7 +283,7 @@ pub const TLV493D = struct { /// Set access mode pub fn set_access_mode(self: *Self, mode: AccessMode) Error!void { - const mode_config = &ACCESS_MODE_CONFIGS[@intFromEnum(mode)]; + const mode_config = &ACCESS_MODE_CONFIGS[@backingInt(mode)]; self.write_data.FAST = mode_config.fast; self.write_data.LOWPOWER = mode_config.lp; @@ -322,7 +322,7 @@ pub const TLV493D = struct { /// Get measurement delay (in ms) for current mode pub fn get_measurement_delay(self: *Self) u16 { - return ACCESS_MODE_CONFIGS[@intFromEnum(self.mode)].measurement_time; + return ACCESS_MODE_CONFIGS[@backingInt(self.mode)].measurement_time; } /// Update sensor data diff --git a/drivers/src/sensor/TMP117.zig b/drivers/src/sensor/TMP117.zig index b44317a45..f4a8fdd7e 100644 --- a/drivers/src/sensor/TMP117.zig +++ b/drivers/src/sensor/TMP117.zig @@ -51,7 +51,7 @@ pub const TMP117 = struct { } pub inline fn read_raw(self: *const Self, reg: Self.register) !u16 { - try self.dev.write(self.address, &[_]u8{@intFromEnum(reg)}); + try self.dev.write(self.address, &[_]u8{@backingInt(reg)}); var buf: [2]u8 = undefined; const size = try self.dev.read(self.address, &buf); if (size != 2) return error.ReadError; @@ -61,7 +61,7 @@ pub const TMP117 = struct { pub inline fn write_raw(self: *const Self, reg: Self.register, v: u16) !void { return self.dev.write( self.address, - &([1]u8{@intFromEnum(reg)} ++ @as([2]u8, @bitCast(std.mem.nativeToBig(u16, v)))), + &([1]u8{@backingInt(reg)} ++ @as([2]u8, @bitCast(std.mem.nativeToBig(u16, v)))), ); } diff --git a/drivers/src/stepper/ULN2003.zig b/drivers/src/stepper/ULN2003.zig index 5a9c5aebb..047622232 100644 --- a/drivers/src/stepper/ULN2003.zig +++ b/drivers/src/stepper/ULN2003.zig @@ -180,7 +180,7 @@ pub const ULN2003 = struct { } // Update all pins based on the bit pattern for (0.., self.in) |i, pin| { - try pin.write(@enumFromInt(@intFromBool((pattern & (@as(u4, 1) << @intCast(i))) != 0))); + try pin.write(@fromBackingInt(@intFromBool((pattern & (@as(u4, 1) << @intCast(i))) != 0))); } } diff --git a/drivers/src/stepper/common.zig b/drivers/src/stepper/common.zig index 05acd00c4..32a3015d0 100644 --- a/drivers/src/stepper/common.zig +++ b/drivers/src/stepper/common.zig @@ -4,9 +4,9 @@ const mdf = @import("../root.zig"); /// Calculate the duration of a step pulse for a stepper with `steps` steps, `microsteps` /// microsteps, at `rpm` rpm. pub inline fn get_step_pulse(steps: i32, microsteps: u8, rpm: f64) mdf.time.Duration { - return @enumFromInt(@as(u64, @intFromFloat(60.0 * 1000000 / + return @fromBackingInt(@intCast(@as(u64, @intFromFloat(60.0 * 1000000 / @as(f64, @floatFromInt(steps)) / - @as(f64, @floatFromInt(microsteps)) / rpm))); + @as(f64, @floatFromInt(microsteps)) / rpm)))); } pub inline fn calc_steps_for_rotation(steps: i32, microsteps: u8, deg: i32) i32 { diff --git a/drivers/src/stepper/stepper.zig b/drivers/src/stepper/stepper.zig index ae3a4c687..27f9f7c16 100644 --- a/drivers/src/stepper/stepper.zig +++ b/drivers/src/stepper/stepper.zig @@ -171,9 +171,9 @@ pub fn Stepper(comptime Driver: type) type { // Get index of table for microsteps const i = @as(u3, @intCast(std.math.log2(new_microsteps))); const mask = Driver.MS_TABLE[i]; - try self.ms1_pin.?.write(@enumFromInt(@intFromBool((mask & 1) != 0))); - try self.ms2_pin.?.write(@enumFromInt(@intFromBool((mask & 2) != 0))); - try self.ms3_pin.?.write(@enumFromInt(@intFromBool((mask & 4) != 0))); + try self.ms1_pin.?.write(@fromBackingInt(@intFromBool((mask & 1) != 0))); + try self.ms2_pin.?.write(@fromBackingInt(@intFromBool((mask & 2) != 0))); + try self.ms3_pin.?.write(@fromBackingInt(@intFromBool((mask & 4) != 0))); return self.microsteps; } @@ -210,7 +210,7 @@ pub fn Stepper(comptime Driver: type) type { const decel_f: f64 = @floatFromInt(p.decel); // speed is in [steps/s] var speed: f64 = (self.rpm * @as(f64, @floatFromInt(self.motor_steps))) / 60; - if (@intFromEnum(time) > 0) { + if (@backingInt(time) > 0) { // Calculate a new speed to finish in the time requested const t: f64 = @as(f64, @floatFromInt(time.to_us())) / 1e+6; // convert to seconds const d: f64 = @as(f64, @floatFromInt(self.steps_remaining)) / microstep_f; // convert to full steps @@ -229,16 +229,16 @@ pub fn Stepper(comptime Driver: type) type { self.steps_to_brake = self.steps_remaining - self.steps_to_cruise; } // Initial pulse (c0) including error correction factor 0.676 [us] - self.step_pulse = @enumFromInt(@as(u64, @intFromFloat((1e+6) * 0.676 * std.math.sqrt(2.0 / accel_f / microstep_f)))); + self.step_pulse = @fromBackingInt(@as(u64, @intFromFloat((1e+6) * 0.676 * std.math.sqrt(2.0 / accel_f / microstep_f)))); // Save cruise timing since we will no longer have the calculated target speed later - self.cruise_step_pulse = @enumFromInt(@as(u64, @intFromFloat(1e+6 / speed / microstep_f))); + self.cruise_step_pulse = @fromBackingInt(@as(u64, @intFromFloat(1e+6 / speed / microstep_f))); }, .constant_speed => { self.steps_to_cruise = 0; self.steps_to_brake = 0; self.step_pulse = common.get_step_pulse(self.motor_steps, self.microsteps, self.rpm); // If we have a deadline, we might have to shorten the pulses to finish in time - if (@intFromEnum(time) > self.steps_remaining * @intFromEnum(self.step_pulse)) { + if (@backingInt(time) > self.steps_remaining * @backingInt(self.step_pulse)) { self.step_pulse = .from_us(@intFromFloat(@as(f64, @floatFromInt(time.to_us())) / @as(f64, @floatFromInt(self.steps_remaining)))); } @@ -258,13 +258,13 @@ pub fn Stepper(comptime Driver: type) type { switch (self.get_current_state()) { .accelerating => { if (self.step_count < self.steps_to_cruise) { - var numerator = 2 * @intFromEnum(self.step_pulse) + @intFromEnum(self.remainder); + var numerator = 2 * @backingInt(self.step_pulse) + @backingInt(self.remainder); const denominator = 4 * self.step_count + 1; // Pulse shrinks as we are nearer to cruising speed, based on step_count - self.step_pulse = self.step_pulse.minus(@enumFromInt(numerator / denominator)); + self.step_pulse = self.step_pulse.minus(@fromBackingInt(numerator / denominator)); // Update based on new step_pulse - numerator = 2 * @intFromEnum(self.step_pulse) + @intFromEnum(self.remainder); - self.remainder = @enumFromInt(numerator % denominator); + numerator = 2 * @backingInt(self.step_pulse) + @backingInt(self.remainder); + self.remainder = @fromBackingInt(numerator % denominator); } else { // The series approximates target, set the final value to what it should be instead self.step_pulse = self.cruise_step_pulse; @@ -272,13 +272,13 @@ pub fn Stepper(comptime Driver: type) type { } }, .decelerating => { - var numerator = 2 * @intFromEnum(self.step_pulse) + @intFromEnum(self.remainder); + var numerator = 2 * @backingInt(self.step_pulse) + @backingInt(self.remainder); const denominator = 4 * self.steps_remaining + 1; // Pulse grows as we are near stopped, based on steps_remaining - self.step_pulse = self.step_pulse.plus(@enumFromInt(numerator / denominator)); + self.step_pulse = self.step_pulse.plus(@fromBackingInt(numerator / denominator)); // Update based on new step_pulse - numerator = 2 * @intFromEnum(self.step_pulse) + @intFromEnum(self.remainder); - self.remainder = @enumFromInt(numerator % denominator); + numerator = 2 * @backingInt(self.step_pulse) + @backingInt(self.remainder); + self.remainder = @fromBackingInt(numerator % denominator); }, // If not accelerating or decelerating, we are either stopped // or cruising, in which case, the step_pulse is already diff --git a/drivers/src/wireless/cyw43439/ioctl.zig b/drivers/src/wireless/cyw43439/ioctl.zig index b057851e7..911aede7d 100644 --- a/drivers/src/wireless/cyw43439/ioctl.zig +++ b/drivers/src/wireless/cyw43439/ioctl.zig @@ -170,7 +170,7 @@ pub const Response = struct { return if (self.cdc_hdr) |cdc_hdr| cdc_hdr else blk: { - _ = self.reader.discard(@enumFromInt(self.padding())) catch unreachable; + _ = self.reader.discard(@fromBackingInt(self.padding())) catch unreachable; self.cdc_hdr = self.reader.takeStruct(CDC_Header, .little) catch unreachable; break :blk self.cdc_hdr.?; }; @@ -181,7 +181,7 @@ pub const Response = struct { return if (self.bdc_hdr) |bdc_hdr| bdc_hdr else blk: { - _ = self.reader.discard(@enumFromInt(self.padding())) catch unreachable; + _ = self.reader.discard(@fromBackingInt(self.padding())) catch unreachable; self.bdc_hdr = self.reader.takeStruct(BDC_Header, .little) catch unreachable; break :blk self.bdc_hdr.?; }; @@ -658,7 +658,7 @@ pub const EventType = enum(u32) { pub fn mask(events: []const EventType) [26]u8 { var m: [26]u8 = @splat(0); for (events) |event| { - const e: u32 = @intFromEnum(event); + const e: u32 = @backingInt(event); m[4 + e / 8] |= @as(u8, 1) << @as(u3, @truncate(e & 7)); } return m; diff --git a/examples/espressif/esp/src/i2c_bus_scan.zig b/examples/espressif/esp/src/i2c_bus_scan.zig index f4214419e..ac5618b82 100644 --- a/examples/espressif/esp/src/i2c_bus_scan.zig +++ b/examples/espressif/esp/src/i2c_bus_scan.zig @@ -44,7 +44,7 @@ pub fn main() !void { try i2c0.apply(100_000); for (0..std.math.maxInt(u7)) |addr| { - const a: i2c.Address = @enumFromInt(addr); + const a: i2c.Address = @fromBackingInt(addr); var rx_data: [1]u8 = undefined; _ = i2c0.read_blocking(a, &rx_data, time.Duration.from_ms(100)) catch continue; diff --git a/examples/espressif/esp/src/i2c_display_sh1106.zig b/examples/espressif/esp/src/i2c_display_sh1106.zig index 250a05ea3..b65258c88 100644 --- a/examples/espressif/esp/src/i2c_display_sh1106.zig +++ b/examples/espressif/esp/src/i2c_display_sh1106.zig @@ -46,7 +46,7 @@ pub fn main() !void { try i2c0.apply(400_000); // Create i2c datagram device - const i2c_device = I2C_DatagramDevice.init(i2c0, @enumFromInt(0x3C), null); + const i2c_device = I2C_DatagramDevice.init(i2c0, @fromBackingInt(0x3C), null); // Pass i2c device to driver to create display instance const display_driver = SH1106(.{ .mode = .i2c, diff --git a/examples/espressif/esp/src/i2c_temp.zig b/examples/espressif/esp/src/i2c_temp.zig index 2a2ee3a08..5c7bf8f4d 100644 --- a/examples/espressif/esp/src/i2c_temp.zig +++ b/examples/espressif/esp/src/i2c_temp.zig @@ -48,7 +48,7 @@ pub fn main() !void { // Create i2c datagram device var i2c_device = I2C_Device.init(i2c0, null); // Pass i2c device to driver to create sensor instance - const temp_sensor = try TMP117.init(i2c_device.i2c_device(), @enumFromInt(0x48)); + const temp_sensor = try TMP117.init(i2c_device.i2c_device(), @fromBackingInt(0x48)); // Configure device try temp_sensor.write_configuration(.{}); diff --git a/examples/espressif/esp/src/lwip/exports.zig b/examples/espressif/esp/src/lwip/exports.zig index 04c68f670..f39b7fcb7 100644 --- a/examples/espressif/esp/src/lwip/exports.zig +++ b/examples/espressif/esp/src/lwip/exports.zig @@ -195,6 +195,6 @@ export fn sys_thread_new(name: [*:0]u8, thread: c.lwip_thread_fn, arg: ?*anyopaq return rtos.spawn(gpa, task_wrapper, .{ thread, arg }, .{ .name = std.mem.span(name), .stack_size = 4096, - .priority = @enumFromInt(2), + .priority = @fromBackingInt(2), }) catch @panic("failed to allocate lwip task"); } diff --git a/examples/nordic/nrf5x/src/i2c_accel.zig b/examples/nordic/nrf5x/src/i2c_accel.zig index e6d995cde..83599f533 100644 --- a/examples/nordic/nrf5x/src/i2c_accel.zig +++ b/examples/nordic/nrf5x/src/i2c_accel.zig @@ -47,7 +47,7 @@ pub fn main() !void { // Pass devices to driver to create sensor instance var dev = try ICM_20948.init( i2c_device.i2c_device(), - @enumFromInt(0x69), + @fromBackingInt(0x69), nrf.drivers.clock_device(), .{ .accel_dlp = .@"6Hz", diff --git a/examples/nordic/nrf5x/src/i2c_bus_scan.zig b/examples/nordic/nrf5x/src/i2c_bus_scan.zig index 9dd14e2d0..139650777 100644 --- a/examples/nordic/nrf5x/src/i2c_bus_scan.zig +++ b/examples/nordic/nrf5x/src/i2c_bus_scan.zig @@ -43,7 +43,7 @@ pub fn main() !void { .sda_pin = gpio.num(0, 10), }); for (0..std.math.maxInt(u7)) |addr| { - const a: i2c.Address = @enumFromInt(addr); + const a: i2c.Address = @fromBackingInt(addr); var rx_data: [1]u8 = undefined; _ = i2c0.read_blocking(a, &rx_data, null) catch |e| { @@ -65,7 +65,7 @@ pub fn main() !void { .sda_pin = gpio.num(0, 10), }); for (0..std.math.maxInt(u7)) |addr| { - const a: i2cdma.Address = @enumFromInt(addr); + const a: i2cdma.Address = @fromBackingInt(addr); var rx_data: [1]u8 = undefined; _ = i2c0dma.read_blocking(a, &rx_data, null) catch |e| { diff --git a/examples/nordic/nrf5x/src/i2c_hall_effect.zig b/examples/nordic/nrf5x/src/i2c_hall_effect.zig index 0162a4a28..5b3fdd951 100644 --- a/examples/nordic/nrf5x/src/i2c_hall_effect.zig +++ b/examples/nordic/nrf5x/src/i2c_hall_effect.zig @@ -48,7 +48,7 @@ pub fn main() !void { // Pass i2c and clock device to driver to create sensor instance var dev = try TLV493D.init( i2c_device.i2c_device(), - @enumFromInt(0x5E), + @fromBackingInt(0x5E), nrf.drivers.clock_device(), .{}, ); diff --git a/examples/nordic/nrf5x/src/i2c_temp.zig b/examples/nordic/nrf5x/src/i2c_temp.zig index d3f5861e3..b0fab411f 100644 --- a/examples/nordic/nrf5x/src/i2c_temp.zig +++ b/examples/nordic/nrf5x/src/i2c_temp.zig @@ -49,7 +49,7 @@ pub fn main() !void { // Create i2c device var i2c_device = I2C_Device.init(i2c0, null); // Pass i2c device to driver to create sensor instance - const temp_sensor = try TMP117.init(i2c_device.i2c_device(), @enumFromInt(0x48)); + const temp_sensor = try TMP117.init(i2c_device.i2c_device(), @fromBackingInt(0x48)); const temp_sensor_address = 0x48; var temp_buf: [2]u8 = undefined; @@ -78,12 +78,12 @@ pub fn main() !void { }); std.log.info("Writing config", .{}); - try i2c0.writev_blocking(@enumFromInt(temp_sensor_address), &.{&cbuf}, null); + try i2c0.writev_blocking(@fromBackingInt(temp_sensor_address), &.{&cbuf}, null); std.log.info("Reading temp", .{}); for (0..5) |_| { const write_buf = [_]u8{0}; // Read temperature register - try i2c0.writev_then_readv_blocking(@enumFromInt(temp_sensor_address), &.{&write_buf}, &.{&temp_buf}, null); + try i2c0.writev_then_readv_blocking(@fromBackingInt(temp_sensor_address), &.{&write_buf}, &.{&temp_buf}, null); const temp_u = std.mem.readInt(u16, &temp_buf, .big); const temp = @as(f32, @floatFromInt(temp_u)) * 7.8125E-3; std.log.info("Temp: {d:0.2}°C", .{temp}); @@ -100,12 +100,12 @@ pub fn main() !void { }); std.log.info("Writing config", .{}); - try i2c0dma.write_blocking(@enumFromInt(temp_sensor_address), &cbuf, null); + try i2c0dma.write_blocking(@fromBackingInt(temp_sensor_address), &cbuf, null); std.log.info("Reading temp", .{}); for (0..5) |_| { const write_buf = [_]u8{0}; // Read temperature register - try i2c0dma.write_then_read_blocking(@enumFromInt(temp_sensor_address), &write_buf, &temp_buf, null); + try i2c0dma.write_then_read_blocking(@fromBackingInt(temp_sensor_address), &write_buf, &temp_buf, null); const temp_u = std.mem.readInt(u16, &temp_buf, .big); const temp = @as(f32, @floatFromInt(temp_u)) * 7.8125E-3; std.log.info("Temp: {d:0.2}°C", .{temp}); diff --git a/examples/nordic/nrf5x/src/semihosting.zig b/examples/nordic/nrf5x/src/semihosting.zig index ebdc350c8..8e7b41459 100644 --- a/examples/nordic/nrf5x/src/semihosting.zig +++ b/examples/nordic/nrf5x/src/semihosting.zig @@ -46,7 +46,7 @@ pub fn main() void { clock, host_time, file_name, - @intFromEnum(file), + @backingInt(file), }); const f_size = file.size() catch return; diff --git a/examples/nxp/mcx/src/lp_i2c.zig b/examples/nxp/mcx/src/lp_i2c.zig index 8146d5b5d..45c745f59 100644 --- a/examples/nxp/mcx/src/lp_i2c.zig +++ b/examples/nxp/mcx/src/lp_i2c.zig @@ -49,12 +49,12 @@ pub fn main() !void { // Recommended: // Using microzig's I2C_Device interface to write const i2c_device = i2c.i2c_device(); - try i2c_device.write(@enumFromInt(0x10), data); + try i2c_device.write(@fromBackingInt(0x10), data); // and read var buffer: [4]u8 = undefined; - _ = try i2c_device.read(@enumFromInt(0x10), &buffer); + _ = try i2c_device.read(@fromBackingInt(0x10), &buffer); // or do both - try i2c_device.write_then_read(@enumFromInt(0x10), data, &buffer); + try i2c_device.write_then_read(@fromBackingInt(0x10), data, &buffer); } diff --git a/examples/raspberrypi/rp2xxx/src/i2c_accel.zig b/examples/raspberrypi/rp2xxx/src/i2c_accel.zig index 3f0e78634..3eceb3ae2 100644 --- a/examples/raspberrypi/rp2xxx/src/i2c_accel.zig +++ b/examples/raspberrypi/rp2xxx/src/i2c_accel.zig @@ -52,7 +52,7 @@ pub fn main() !void { // Pass devices to driver to create sensor instance var dev = try ICM_20948.init( i2c_device.i2c_device(), - @enumFromInt(0x69), + @fromBackingInt(0x69), rp2xxx.drivers.clock_device(), .{ .accel_dlp = .@"6Hz", diff --git a/examples/raspberrypi/rp2xxx/src/i2c_bus_scan.zig b/examples/raspberrypi/rp2xxx/src/i2c_bus_scan.zig index 876758c73..08d14b198 100644 --- a/examples/raspberrypi/rp2xxx/src/i2c_bus_scan.zig +++ b/examples/raspberrypi/rp2xxx/src/i2c_bus_scan.zig @@ -42,7 +42,7 @@ pub fn main() !void { }); for (0..std.math.maxInt(u7)) |addr| { - const a: i2c.Address = @enumFromInt(addr); + const a: i2c.Address = @fromBackingInt(addr); var rx_data: [1]u8 = undefined; _ = i2c0.read_blocking(a, &rx_data, null) catch |e| { diff --git a/examples/raspberrypi/rp2xxx/src/i2c_hall_effect.zig b/examples/raspberrypi/rp2xxx/src/i2c_hall_effect.zig index 175c5c7a2..9146084ba 100644 --- a/examples/raspberrypi/rp2xxx/src/i2c_hall_effect.zig +++ b/examples/raspberrypi/rp2xxx/src/i2c_hall_effect.zig @@ -53,7 +53,7 @@ pub fn main() !void { // Pass i2c and clock_device to driver to create sensor instance var dev = try TLV493D.init( i2c_device.i2c_device(), - @enumFromInt(0x5E), + @fromBackingInt(0x5E), rp2xxx.drivers.clock_device(), .{}, ); diff --git a/examples/raspberrypi/rp2xxx/src/mlx90640.zig b/examples/raspberrypi/rp2xxx/src/mlx90640.zig index 1f9108ce1..32d4a4544 100644 --- a/examples/raspberrypi/rp2xxx/src/mlx90640.zig +++ b/examples/raspberrypi/rp2xxx/src/mlx90640.zig @@ -36,7 +36,7 @@ pub fn main() !void { var camera = try MLX90640.init(.{ .i2c = i2c_device.i2c_device(), - .address = @enumFromInt(0x33), + .address = @fromBackingInt(0x33), .clock = rp2xxx.drivers.clock_device(), }); diff --git a/examples/raspberrypi/rp2xxx/src/mlx90640_hottest_point.zig b/examples/raspberrypi/rp2xxx/src/mlx90640_hottest_point.zig index bca6c9f6e..6bc94642a 100644 --- a/examples/raspberrypi/rp2xxx/src/mlx90640_hottest_point.zig +++ b/examples/raspberrypi/rp2xxx/src/mlx90640_hottest_point.zig @@ -37,13 +37,13 @@ pub fn main() !void { var camera = try MLX90640.init(.{ .i2c = i2c_device.i2c_device(), - .address = @enumFromInt(0x33), + .address = @fromBackingInt(0x33), .clock = rp2xxx.drivers.clock_device(), }); try camera.set_refresh_rate(0b101); - const i2c_dd = rp2xxx.drivers.I2C_DatagramDevice.init(i2c0, @enumFromInt(0x3C), null); + const i2c_dd = rp2xxx.drivers.I2C_DatagramDevice.init(i2c0, @fromBackingInt(0x3C), null); const lcd = try display.ssd1306.init(.i2c, i2c_dd, null); try lcd.clear_screen(false); diff --git a/examples/raspberrypi/rp2xxx/src/mlx90640_image.zig b/examples/raspberrypi/rp2xxx/src/mlx90640_image.zig index 5930aecf5..7c03acf94 100644 --- a/examples/raspberrypi/rp2xxx/src/mlx90640_image.zig +++ b/examples/raspberrypi/rp2xxx/src/mlx90640_image.zig @@ -37,13 +37,13 @@ pub fn main() !void { var camera = try MLX90640.init(.{ .i2c = i2c_device.i2c_device(), - .address = @enumFromInt(0x33), + .address = @fromBackingInt(0x33), .clock = rp2xxx.drivers.clock_device(), }); try camera.set_refresh_rate(0b101); - const i2c_dd = rp2xxx.drivers.I2C_DatagramDevice.init(i2c0, @enumFromInt(0x3C), null); + const i2c_dd = rp2xxx.drivers.I2C_DatagramDevice.init(i2c0, @fromBackingInt(0x3C), null); const lcd = try display.ssd1306.init(.i2c, i2c_dd, null); try lcd.clear_screen(false); diff --git a/examples/raspberrypi/rp2xxx/src/rp2040_only/hd44780.zig b/examples/raspberrypi/rp2xxx/src/rp2040_only/hd44780.zig index 37385de08..9790de174 100644 --- a/examples/raspberrypi/rp2xxx/src/rp2040_only/hd44780.zig +++ b/examples/raspberrypi/rp2xxx/src/rp2040_only/hd44780.zig @@ -39,7 +39,7 @@ pub fn main() !void { i2c0.apply(.{ .clock_config = rp2040.clock_config, }); - var expander = PCF8574(.{ .I2C_Device = I2C_Device }).init(i2c_device, @enumFromInt(0x27)); + var expander = PCF8574(.{ .I2C_Device = I2C_Device }).init(i2c_device, @fromBackingInt(0x27)); const pins_config = lcd(.{}).pins_struct{ .high_pins = .{ expander.digital_IO(4), diff --git a/examples/raspberrypi/rp2xxx/src/rp2040_only/i2c_slave.zig b/examples/raspberrypi/rp2xxx/src/rp2040_only/i2c_slave.zig index 05ec9ab3e..02c8d30a6 100644 --- a/examples/raspberrypi/rp2xxx/src/rp2040_only/i2c_slave.zig +++ b/examples/raspberrypi/rp2xxx/src/rp2040_only/i2c_slave.zig @@ -37,7 +37,7 @@ pub const microzig_options: microzig.Options = .{ }; var i2c_buffer: [10]u8 = undefined; -var slave_addr: i2c.Address = @enumFromInt(0x42); +var slave_addr: i2c.Address = @fromBackingInt(0x42); pub fn main() !void { // init uart logging diff --git a/examples/raspberrypi/rp2xxx/src/rp2040_only/pcf8574.zig b/examples/raspberrypi/rp2xxx/src/rp2040_only/pcf8574.zig index ab55d1dc5..fece58d4d 100644 --- a/examples/raspberrypi/rp2xxx/src/rp2040_only/pcf8574.zig +++ b/examples/raspberrypi/rp2xxx/src/rp2040_only/pcf8574.zig @@ -34,7 +34,7 @@ pub fn main() !void { i2c0.apply(.{ .clock_config = rp2040.clock_config, }); - var expander = PCF8574(.{ .I2C_Device = I2C_Device }).init(i2c_device, @enumFromInt(0x27)); + var expander = PCF8574(.{ .I2C_Device = I2C_Device }).init(i2c_device, @fromBackingInt(0x27)); var led = expander.digital_IO(3); while (true) { try led.write(State.high); diff --git a/examples/raspberrypi/rp2xxx/src/rp2040_only/tiles.zig b/examples/raspberrypi/rp2xxx/src/rp2040_only/tiles.zig index 2ad4b0d42..ec805fd93 100644 --- a/examples/raspberrypi/rp2xxx/src/rp2040_only/tiles.zig +++ b/examples/raspberrypi/rp2xxx/src/rp2040_only/tiles.zig @@ -80,7 +80,7 @@ comptime { pub fn main() !void { pio.gpio_init(led_pin); - sm_set_consecutive_pindirs(pio, sm, @intFromEnum(led_pin), 1, true); + sm_set_consecutive_pindirs(pio, sm, @backingInt(led_pin), 1, true); const cycles_per_bit: comptime_int = ws2812_program.defines[0].value + //T1 ws2812_program.defines[1].value + //T2 diff --git a/examples/raspberrypi/rp2xxx/src/ssd1306_oled.zig b/examples/raspberrypi/rp2xxx/src/ssd1306_oled.zig index 658289163..26f2fc60c 100644 --- a/examples/raspberrypi/rp2xxx/src/ssd1306_oled.zig +++ b/examples/raspberrypi/rp2xxx/src/ssd1306_oled.zig @@ -34,7 +34,7 @@ pub fn main() void { rp2xxx.i2c.I2C.apply(i2c0, .{ .baud_rate = 400_000, .clock_config = rp2xxx.clock_config }); - const i2c_dd = rp2xxx.drivers.I2C_DatagramDevice.init(i2c0, @enumFromInt(0x3C), null); + const i2c_dd = rp2xxx.drivers.I2C_DatagramDevice.init(i2c0, @fromBackingInt(0x3C), null); const lcd = microzig.drivers.display.ssd1306.init(.i2c, i2c_dd, null) catch unreachable; const print_val = four_rows ++ " WELCOME"; diff --git a/examples/stmicro/stm32/src/semihosting.zig b/examples/stmicro/stm32/src/semihosting.zig index b261545c1..eeef50547 100644 --- a/examples/stmicro/stm32/src/semihosting.zig +++ b/examples/stmicro/stm32/src/semihosting.zig @@ -43,7 +43,7 @@ pub fn main() void { clock, host_time, file_name, - @intFromEnum(file), + @backingInt(file), }); const f_size = file.size() catch return; diff --git a/examples/stmicro/stm32/src/stm32f1xx/hd44780.zig b/examples/stmicro/stm32/src/stm32f1xx/hd44780.zig index fa076227d..c3b454efc 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/hd44780.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/hd44780.zig @@ -54,7 +54,7 @@ pub fn main() !void { i2c.apply(config); - var expander = PCF8574(.{}).init(i2c_device.i2c_device(), @enumFromInt(0x27)); + var expander = PCF8574(.{}).init(i2c_device.i2c_device(), @fromBackingInt(0x27)); const pins_config = lcd(.{}).pins_struct{ .high_pins = .{ expander.digital_IO(4), diff --git a/examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig b/examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig index 5aef66ca1..f845a3ae3 100644 --- a/examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig +++ b/examples/stmicro/stm32/src/stm32f1xx/usb_cdc.zig @@ -172,8 +172,8 @@ const Encoding = struct { const parity = pkg[5]; const db = pkg[6]; enc.baudrate = (baudbyte_1) | (baudbyte_2 << 8) | (baudbyte_3 << 16) | (baudbyte_4 << 24); - enc.stopbits = @enumFromInt(stp); - enc.parity = @enumFromInt(parity); + enc.stopbits = @fromBackingInt(stp); + enc.parity = @fromBackingInt(parity); enc.data = db; return enc; } diff --git a/examples/wch/ch32v/src/i2c_bus_scan.zig b/examples/wch/ch32v/src/i2c_bus_scan.zig index dda1b4f34..956a5eb07 100644 --- a/examples/wch/ch32v/src/i2c_bus_scan.zig +++ b/examples/wch/ch32v/src/i2c_bus_scan.zig @@ -46,7 +46,7 @@ pub fn main() !void { instance.apply(.{}); for (0..std.math.maxInt(u7)) |addr| { - const a: i2c.Address = @enumFromInt(addr); + const a: i2c.Address = @fromBackingInt(addr); var rx_data: [1]u8 = undefined; _ = instance.read_blocking(a, &rx_data, null) catch |e| { diff --git a/examples/wch/ch32v/src/i2c_eeprom.zig b/examples/wch/ch32v/src/i2c_eeprom.zig index 873b4cff6..a6f4d26b2 100644 --- a/examples/wch/ch32v/src/i2c_eeprom.zig +++ b/examples/wch/ch32v/src/i2c_eeprom.zig @@ -53,7 +53,7 @@ pub fn main() !void { const instance = i2c.instance.I2C1; instance.apply(.{}); - const eeprom_address: i2c.Address = @enumFromInt(0x50); + const eeprom_address: i2c.Address = @fromBackingInt(0x50); // AT24C256 has 32KB (256Kbit), requiring 2-byte addresses // Read first 256 bytes as a test diff --git a/modules/freertos/build.zig.zon b/modules/freertos/build.zig.zon index 25f18eb6f..a43de3bca 100644 --- a/modules/freertos/build.zig.zon +++ b/modules/freertos/build.zig.zon @@ -19,8 +19,8 @@ .path = "../foundation-libc/", }, .translate_c = .{ - .url = "git+https://codeberg.org/ziglang/translate-c#1b33d1d273f7035a16c45457efdf2afda7cf0925", - .hash = "translate_c-0.0.0-Q_BUWrI7BwCBn0jcYDTs1UP047kxSYoFpV6vD6Vuy9Vo", + .url = "git+https://codeberg.org/ziglang/translate-c#2a6613bcc09c74296d785e660fe98d2eb310d760", + .hash = "translate_c-0.0.0-Q_BUWjQ7BwAhlMt3Zf4l3Jw-y0_TOpJWgcK8rk4d0aWv", }, }, .paths = .{ "build.zig", "build.zig.zon", "src", "config" }, diff --git a/modules/freertos/src/notification.zig b/modules/freertos/src/notification.zig index 0315db84d..69fb47ce1 100644 --- a/modules/freertos/src/notification.zig +++ b/modules/freertos/src/notification.zig @@ -53,7 +53,7 @@ pub fn notify(task_handle: TaskHandle, value: u32, action: Action) Error!void { task_handle, 0, // index value, - @intFromEnum(action), + @backingInt(action), null, // don't care about previous value ); if (rc != c.pdPASS) return error.Failure; @@ -65,7 +65,7 @@ pub fn notify_indexed(task_handle: TaskHandle, index: u32, value: u32, action: A task_handle, @intCast(index), value, - @intFromEnum(action), + @backingInt(action), null, ); if (rc != c.pdPASS) return error.Failure; @@ -78,7 +78,7 @@ pub fn notify_and_query(task_handle: TaskHandle, value: u32, action: Action) Err task_handle, 0, value, - @intFromEnum(action), + @backingInt(action), &previous, ); if (rc != c.pdPASS) return error.Failure; @@ -99,7 +99,7 @@ pub fn notify_from_isr(task_handle: TaskHandle, value: u32, action: Action) ISR_ task_handle, 0, value, - @intFromEnum(action), + @backingInt(action), null, &woken, ); diff --git a/modules/riscv32-common/src/riscv32_common.zig b/modules/riscv32-common/src/riscv32_common.zig index 33a95bc25..cb1d4dc39 100644 --- a/modules/riscv32-common/src/riscv32_common.zig +++ b/modules/riscv32-common/src/riscv32_common.zig @@ -164,10 +164,10 @@ pub const csr = struct { ube: u1 = 0, mpie: u1 = 0, spp: u1 = 0, - vs: VS = @enumFromInt(0), - mpp: MPP = @enumFromInt(0), - fs: FS = @enumFromInt(0), - xs: XS = @enumFromInt(0), + vs: VS = @fromBackingInt(0), + mpp: MPP = @fromBackingInt(0), + fs: FS = @fromBackingInt(0), + xs: XS = @fromBackingInt(0), mprv: u1 = 0, reserved18: u13 = 0, sd: u1 = 0, @@ -560,27 +560,27 @@ pub const utilities = struct { return struct { pub fn is_enabled(int: CoreInterruptEnum) bool { - return csr.mie.read() & (@as(u32, 1) << @intFromEnum(int)) != 0; + return csr.mie.read() & (@as(u32, 1) << @backingInt(int)) != 0; } pub fn enable(int: CoreInterruptEnum) void { - csr.mie.set(@as(u32, 1) << @intFromEnum(int)); + csr.mie.set(@as(u32, 1) << @backingInt(int)); } pub fn disable(int: CoreInterruptEnum) void { - csr.mie.clear(@as(u32, 1) << @intFromEnum(int)); + csr.mie.clear(@as(u32, 1) << @backingInt(int)); } pub fn is_pending(int: CoreInterruptEnum) bool { - return csr.mip.read() & (@as(u32, 1) << @intFromEnum(int)) != 0; + return csr.mip.read() & (@as(u32, 1) << @backingInt(int)) != 0; } pub fn set_pending(int: CoreInterruptEnum) void { - csr.mip.set(@as(u32, 1) << @intFromEnum(int)); + csr.mip.set(@as(u32, 1) << @backingInt(int)); } pub fn clear_pending(int: CoreInterruptEnum) void { - csr.mip.clear(@as(u32, 1) << @intFromEnum(int)); + csr.mip.clear(@as(u32, 1) << @backingInt(int)); } }; } diff --git a/modules/rtt/src/lock.zig b/modules/rtt/src/lock.zig index 0551e1816..4555efdc1 100644 --- a/modules/rtt/src/lock.zig +++ b/modules/rtt/src/lock.zig @@ -144,19 +144,19 @@ pub const default = struct { else => return GenericLock(*Context, ErrorLock.error_lock_unlock, ErrorLock.error_lock_unlock), } - if (builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v6m)) or builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v8m))) { + if (builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v6m)) or builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v8m))) { return GenericLock( *Context, ArmV6mV8m.lock, ArmV6mV8m.unlock, ); - } else if (builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v7m)) or builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v7em)) or builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v8m_main))) { + } else if (builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v7m)) or builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v7em)) or builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v8m_main))) { return GenericLock( *Context, ArmV7mV7emV8mMain.lock, ArmV7mV7emV8mMain.unlock, ); - } else if (builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v7a)) or builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v7r))) { + } else if (builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v7a)) or builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v7r))) { return GenericLock( *Context, ArmV7aV7r.lock, diff --git a/modules/rtt/src/memory_barrier.zig b/modules/rtt/src/memory_barrier.zig index 7d286f1a7..d7c93e9be 100644 --- a/modules/rtt/src/memory_barrier.zig +++ b/modules/rtt/src/memory_barrier.zig @@ -22,13 +22,13 @@ pub fn resolve_memory_barrier() struct { memory_barrier_fn: MemoryBarrierFn } { } // All currently supported ARM chips - if (builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v6m)) or - builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v8m)) or - builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v7m)) or - builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v7em)) or - builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v8m_main)) or - builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v7a)) or - builtin.cpu.features.isEnabled(@intFromEnum(std.Target.arm.Feature.v7r))) + if (builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v6m)) or + builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v8m)) or + builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v7m)) or + builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v7em)) or + builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v8m_main)) or + builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v7a)) or + builtin.cpu.features.isEnabled(@backingInt(std.Target.arm.Feature.v7r))) { // Something to note here is not all Cortex-M chips need a DMB instruction since some // don't support CPU reordering of instructions. However, these end up getting ignored diff --git a/modules/rtt/src/rtt.zig b/modules/rtt/src/rtt.zig index 358e6274a..c20d90992 100644 --- a/modules/rtt/src/rtt.zig +++ b/modules/rtt/src/rtt.zig @@ -91,11 +91,11 @@ pub const channel = struct { } fn mode(self: *Self) Mode { - return @enumFromInt(self.flags & 3); + return @fromBackingInt(self.flags & 3); } fn set_mode(self: *Self, mode_: Mode) void { - self.flags = (self.flags & ~@as(usize, 3)) | @intFromEnum(mode_); + self.flags = (self.flags & ~@as(usize, 3)) | @backingInt(mode_); } /// Writes up to available space left in buffer for reading by probe, returning number of bytes @@ -305,11 +305,11 @@ pub const channel = struct { } pub fn mode(self: *Self) Mode { - return @enumFromInt(self.mode & 3); + return @fromBackingInt(self.mode & 3); } pub fn set_mode(self: *Self, mode_: Mode) void { - self.flags = (self.flags & ~@as(usize, 3)) | @intFromEnum(mode_); + self.flags = (self.flags & ~@as(usize, 3)) | @backingInt(mode_); } /// Reads up to a number of bytes from probe non-blocking. Reading less than the requested number of bytes diff --git a/modules/virtual-io/src/root.zig b/modules/virtual-io/src/root.zig index abb3a75bc..356e23f4c 100644 --- a/modules/virtual-io/src/root.zig +++ b/modules/virtual-io/src/root.zig @@ -33,7 +33,7 @@ pub const Dir = struct { } pub fn get(id: ID, vio: *const VirtualIo) !*Dir { - const node = vio.nodes.getPtr(@intFromEnum(id)) orelse + const node = vio.nodes.getPtr(@backingInt(id)) orelse return error.Unexpected; return switch (node.*) { .dir => |*ret| ret, @@ -66,7 +66,7 @@ pub const Dir = struct { if (node == null or node.? != T.kind) return error.Unexpected; - return @enumFromInt(id); + return @fromBackingInt(id); } pub fn create(dir: *Dir, vio: *VirtualIo, name: []const u8, T: type) !ResultID(T) { @@ -95,7 +95,7 @@ pub const Dir = struct { result.value_ptr.* = T.empty; } else |_| return error.NoSpaceLeft; - return @enumFromInt(id); + return @fromBackingInt(id); } }; @@ -118,7 +118,7 @@ pub const File = struct { } pub fn get(id: ID, vio: *const VirtualIo) !*File { - const node = vio.nodes.getPtr(@intFromEnum(id)) orelse + const node = vio.nodes.getPtr(@backingInt(id)) orelse return error.Unexpected; return switch (node.*) { .file => |*ret| ret, @@ -244,7 +244,7 @@ pub const VirtualIo = struct { var ret: VirtualIo = .{ .gpa = gpa, .nodes = .empty, - .last_id = @intFromEnum(Dir.ID.root), + .last_id = @backingInt(Dir.ID.root), }; try ret.nodes.put(gpa, ret.last_id, Dir.empty); return ret; @@ -277,7 +277,7 @@ pub fn from_handle(T: type, handle: std.posix.fd_t) !T { .windows => @intFromPtr(handle), else => handle, })) |int| - @enumFromInt(int) + @fromBackingInt(int) else error.Unexpected; } @@ -285,7 +285,7 @@ pub fn from_handle(T: type, handle: std.posix.fd_t) !T { pub fn to_handle(id: anytype) std.posix.fd_t { // const ID = @TypeOf(id); return switch (builtin.os.tag) { - .windows => @ptrFromInt(@intFromEnum(id)), - else => @intFromEnum(id), + .windows => @ptrFromInt(@backingInt(id)), + else => @backingInt(id), }; } diff --git a/port/espressif/esp/src/cpus/esp_riscv.zig b/port/espressif/esp/src/cpus/esp_riscv.zig index 89b803641..6249d33be 100644 --- a/port/espressif/esp/src/cpus/esp_riscv.zig +++ b/port/espressif/esp/src/cpus/esp_riscv.zig @@ -92,27 +92,27 @@ pub const interrupt = struct { const INTERRUPT_CORE0 = microzig.chip.peripherals.INTERRUPT_CORE0; pub fn is_enabled(int: Interrupt) bool { - return INTERRUPT_CORE0.CPU_INT_ENABLE.raw & (@as(u32, 1) << @intFromEnum(int)) != 0; + return INTERRUPT_CORE0.CPU_INT_ENABLE.raw & (@as(u32, 1) << @backingInt(int)) != 0; } pub fn enable(int: Interrupt) void { - INTERRUPT_CORE0.CPU_INT_ENABLE.raw |= @as(u32, 1) << @intFromEnum(int); + INTERRUPT_CORE0.CPU_INT_ENABLE.raw |= @as(u32, 1) << @backingInt(int); } pub fn disable(int: Interrupt) void { - INTERRUPT_CORE0.CPU_INT_ENABLE.raw &= ~(@as(u32, 1) << @intFromEnum(int)); + INTERRUPT_CORE0.CPU_INT_ENABLE.raw &= ~(@as(u32, 1) << @backingInt(int)); } /// Checks if a given interrupt is pending. pub fn is_pending(int: Interrupt) bool { - return INTERRUPT_CORE0.CPU_INT_EIP_STATUS.raw & (@as(u32, 1) << @intFromEnum(int)) != 0; + return INTERRUPT_CORE0.CPU_INT_EIP_STATUS.raw & (@as(u32, 1) << @backingInt(int)) != 0; } /// Clears the pending state of claimed (executing) edge-type interrupt only. /// NOTE: Pending state of an unclaimed (not executing) edge type interrupt can be flushed, /// if required, by first disabling it and only then call clearing it. pub fn clear_pending(int: Interrupt) void { - INTERRUPT_CORE0.CPU_INT_CLEAR.raw |= @as(u32, 1) << @intFromEnum(int); + INTERRUPT_CORE0.CPU_INT_CLEAR.raw |= @as(u32, 1) << @backingInt(int); } pub const Priority = enum(u4) { @@ -127,18 +127,18 @@ pub const interrupt = struct { /// Sets the priority of an interrupt. Interrupts with priorities zero or less than the priority /// threshold value in are masked. pub fn set_priority(int: Interrupt, priority: Priority) void { - get_priority_register_for(int).* = @intFromEnum(priority); + get_priority_register_for(int).* = @backingInt(priority); } pub fn get_priority(int: Interrupt) Priority { - return @enumFromInt(get_priority_register_for(int).*); + return @fromBackingInt(get_priority_register_for(int).*); } fn get_priority_register_for(int: Interrupt) *volatile u32 { // using CPU_INT_PRI_0 (which should be reserved because interrupts start from one) here so // that when I offset the register I don't have to subtract one from the interrupt number. const base: usize = @intFromPtr(&INTERRUPT_CORE0.CPU_INT_PRI_0); - const reg: *volatile u32 = @ptrFromInt(base + @sizeOf(u32) * @as(usize, @intFromEnum(int))); + const reg: *volatile u32 = @ptrFromInt(base + @sizeOf(u32) * @as(usize, @backingInt(int))); return reg; } @@ -146,12 +146,12 @@ pub const interrupt = struct { /// higher than this threshold, the cpu will respond to this interrupt. pub fn set_priority_threshold(priority: Priority) void { INTERRUPT_CORE0.CPU_INT_THRESH.write(.{ - .CPU_INT_THRESH = @intFromEnum(priority), + .CPU_INT_THRESH = @backingInt(priority), }); } pub fn get_priority_threshold() Priority { - return @enumFromInt(INTERRUPT_CORE0.CPU_INT_THRESH.read().CPU_INT_THRESH); + return @fromBackingInt(INTERRUPT_CORE0.CPU_INT_THRESH.read().CPU_INT_THRESH); } pub const Type = enum(u1) { @@ -160,7 +160,7 @@ pub const interrupt = struct { }; pub fn set_type(int: Interrupt, typ: Type) void { - const num = @intFromEnum(int); + const num = @backingInt(int); switch (typ) { .level => INTERRUPT_CORE0.CPU_INT_TYPE.raw &= ~(@as(u32, 1) << num), .edge => INTERRUPT_CORE0.CPU_INT_TYPE.raw |= @as(u32, 1) << num, @@ -168,8 +168,8 @@ pub const interrupt = struct { } pub fn get_type(int: Interrupt) Type { - const num = @intFromEnum(int); - return @enumFromInt(INTERRUPT_CORE0.CPU_INT_TYPE.raw & (@as(u32, 1) << num) >> num); + const num = @backingInt(int); + return @fromBackingInt(INTERRUPT_CORE0.CPU_INT_TYPE.raw & (@as(u32, 1) << num) >> num); } pub const Source = enum(u6) { @@ -238,13 +238,13 @@ pub const interrupt = struct { }; pub fn map(source: Source, maybe_int: ?Interrupt) void { - get_source_map_register_for(source).* = if (maybe_int) |int| @intFromEnum(int) else 0; + get_source_map_register_for(source).* = if (maybe_int) |int| @backingInt(int) else 0; } pub fn get_mapped_interrupt(source: Source) ?Interrupt { const source_raw: u4 = @truncate(get_source_map_register_for(source).*); if (source_raw != 0) { - return @enumFromInt(source_raw); + return @fromBackingInt(source_raw); } else { return null; } @@ -253,7 +253,7 @@ pub const interrupt = struct { fn get_source_map_register_for(source: Source) *volatile u32 { // using MAC_INTR_MAP here as it's the first map register. const base: usize = @intFromPtr(&INTERRUPT_CORE0.MAC_INTR_MAP); - return @ptrFromInt(base + @sizeOf(u32) * @as(usize, @intFromEnum(source))); + return @ptrFromInt(base + @sizeOf(u32) * @as(usize, @backingInt(source))); } pub const Status = struct { @@ -267,7 +267,7 @@ pub const interrupt = struct { } pub fn is_set(status: Status, source: Source) bool { - return status.reg & (@as(u61, 1) << @intFromEnum(source)) != 0; + return status.reg & (@as(u61, 1) << @backingInt(source)) != 0; } }; @@ -519,7 +519,7 @@ fn unhandled(_: *TrapFrame) linksection(".ram_text") callconv(.c) void { if (mcause.is_interrupt != 0) { std.log.err("unhandled interrupt {} occurred!", .{mcause.code}); } else { - const exception: Exception = @enumFromInt(mcause.code); + const exception: Exception = @fromBackingInt(mcause.code); std.log.err("unhandled exception {s} occurred at {x}!", .{ @tagName(exception), csr.mepc.read_raw() }); switch (exception) { @@ -541,17 +541,17 @@ fn _handle_interrupt( if (mcause.is_interrupt != 0) { // interrupt - const int: Interrupt = @enumFromInt(mcause.code); + const int: Interrupt = @fromBackingInt(mcause.code); const priority = interrupt.get_priority(int); // low priority interrupts can be preempted by higher priority interrupts - if (@intFromEnum(priority) < 15) { + if (@backingInt(priority) < 15) { const mepc = csr.mepc.read_raw(); const mstatus = csr.mstatus.read_raw(); const mtval = csr.mtval.read_raw(); const prev_thresh = interrupt.get_priority_threshold(); - interrupt.set_priority_threshold(@enumFromInt(@intFromEnum(priority) + 1)); + interrupt.set_priority_threshold(@fromBackingInt(@backingInt(priority) + 1)); interrupt.enable_interrupts(); diff --git a/port/espressif/esp/src/hal/drivers.zig b/port/espressif/esp/src/hal/drivers.zig index 183c5a687..cd4cf5a73 100644 --- a/port/espressif/esp/src/hal/drivers.zig +++ b/port/espressif/esp/src/hal/drivers.zig @@ -414,7 +414,7 @@ pub const GPIO_Device = struct { } pub fn read(dio: GPIO_Device) ReadError!State { - return @enumFromInt(dio.pin.read()); + return @fromBackingInt(dio.pin.read()); } const vtable = Digital_IO.VTable{ diff --git a/port/espressif/esp/src/hal/gpio.zig b/port/espressif/esp/src/hal/gpio.zig index ff3bfef9a..cb6a643fa 100644 --- a/port/espressif/esp/src/hal/gpio.zig +++ b/port/espressif/esp/src/hal/gpio.zig @@ -21,7 +21,7 @@ pub const DriveStrength = enum { /// Get the appropriate value of DriveStrength based on the pin number. /// See section 5.15.2 (IO MUX Registers) of the Technical Reference Manual fn to_value(strength: DriveStrength, pin: Pin) u2 { - return switch (@intFromEnum(pin)) { + return switch (@backingInt(pin)) { 2, 3, 5, 18, 19 => switch (strength) { .@"5mA" => 0, .@"10mA" => 2, @@ -218,7 +218,7 @@ pub const Mask = enum(u22) { pub fn num(n: u5) Pin { std.debug.assert(n < 22); - return @as(Pin, @enumFromInt(n)); + return @as(Pin, @fromBackingInt(n)); } pub const Pin = enum(u5) { @@ -240,7 +240,7 @@ pub const Pin = enum(u5) { }; fn assert_usb_disabled(self: Pin) void { - const n = @intFromEnum(self); + const n = @backingInt(self); // NOTE: Assert that the USB_SERIAL_JTAG peripheral which uses pins GPIO18 and GPIO19 // is disabled and USB pullup/down resistors are disabled. @@ -257,19 +257,19 @@ pub const Pin = enum(u5) { pub fn apply(self: Pin, config: Config) void { self.assert_usb_disabled(); - const n = @intFromEnum(self); + const n = @backingInt(self); - GPIO.FUNC_OUT_SEL_CFG[@intFromEnum(self)].modify(.{ - .OUT_SEL = @intFromEnum(OutputSignal.gpio), + GPIO.FUNC_OUT_SEL_CFG[@backingInt(self)].modify(.{ + .OUT_SEL = @backingInt(OutputSignal.gpio), }); IO_MUX.GPIO[n].modify(.{ .SLP_SEL = 0, .FUN_WPD = @intFromBool(config.pull == .down), .FUN_WPU = @intFromBool(config.pull == .up), - .FUN_DRV = @intFromEnum(config.drive_strength), + .FUN_DRV = @backingInt(config.drive_strength), .FUN_IE = @intFromBool(config.input_enable), - .MCU_SEL = @intFromEnum(AlternateFunction.function1), + .MCU_SEL = @backingInt(AlternateFunction.function1), .FILTER_EN = @intFromBool(config.input_filter_enable), }); @@ -293,8 +293,8 @@ pub const Pin = enum(u5) { pub fn connect_peripheral_to_output(self: Pin, options: ConnectToOutputOptions) void { self.assert_usb_disabled(); - GPIO.FUNC_OUT_SEL_CFG[@intFromEnum(self)].write(.{ - .OUT_SEL = @intFromEnum(options.signal), + GPIO.FUNC_OUT_SEL_CFG[@backingInt(self)].write(.{ + .OUT_SEL = @backingInt(options.signal), .OEN_SEL = @intFromBool(!options.output_enable_signal_controlled_by_peripheral), .INV_SEL = @intFromBool(options.invert), .OEN_INV_SEL = @intFromBool(options.invert_output_enable_signal), @@ -310,15 +310,15 @@ pub const Pin = enum(u5) { pub fn connect_input_to_peripheral(self: Pin, options: ConnectToInputOptions) void { self.assert_usb_disabled(); - GPIO.FUNC_IN_SEL_CFG[@intFromEnum(options.signal)].write(.{ - .IN_SEL = @intFromEnum(self), + GPIO.FUNC_IN_SEL_CFG[@backingInt(options.signal)].write(.{ + .IN_SEL = @backingInt(self), .IN_INV_SEL = @intFromBool(options.invert), .SEL = 1, }); } pub fn set_output_enabled(self: Pin, enable: bool) void { - const n = @intFromEnum(self); + const n = @backingInt(self); if (enable) { GPIO.ENABLE_W1TS.write(.{ .ENABLE_W1TS = @as(u26, 1) << n }); } else { @@ -327,48 +327,48 @@ pub const Pin = enum(u5) { } pub fn set_output_invert(self: Pin, invert: bool) void { - GPIO.FUNC_OUT_SEL_CFG[@intFromEnum(self)].write(.{ + GPIO.FUNC_OUT_SEL_CFG[@backingInt(self)].write(.{ .INV_SEL = @intFromBool(invert), }); } pub fn set_input_enabled(self: Pin, enable: bool) void { - IO_MUX.GPIO[@intFromEnum(self)].modify(.{ + IO_MUX.GPIO[@backingInt(self)].modify(.{ .FUN_IE = @intFromBool(enable), }); } pub fn set_input_invert(self: Pin, invert: bool) void { - GPIO.FUNC_IN_SEL_CFG[@intFromEnum(self)].write(.{ + GPIO.FUNC_IN_SEL_CFG[@backingInt(self)].write(.{ .IN_INV_SEL = @intFromBool(invert), }); } pub fn set_input_filter_enabled(self: Pin, enable: bool) void { - GPIO.FUNC_IN_SEL_CFG[@intFromEnum(self)].write(.{ + GPIO.FUNC_IN_SEL_CFG[@backingInt(self)].write(.{ .FILTER_EN = @intFromBool(enable), }); } pub fn set_pull(self: Pin, pull: Pull) void { - IO_MUX.GPIO[@intFromEnum(self)].modify(.{ + IO_MUX.GPIO[@backingInt(self)].modify(.{ .FUN_WPD = @intFromBool(pull == .down), .FUN_WPU = @intFromBool(pull == .up), }); } pub fn set_drive_strength(self: Pin, drive_strength: DriveStrength) void { - IO_MUX.GPIO[@intFromEnum(self)].modify(.{ - .FUN_DRV = @intFromEnum(drive_strength), + IO_MUX.GPIO[@backingInt(self)].modify(.{ + .FUN_DRV = @backingInt(drive_strength), }); } pub fn set_open_drain(self: Pin, open_drain: bool) void { - GPIO.PIN[@intFromEnum(self)].modify(.{ .PIN_PAD_DRIVER = @intFromBool(open_drain) }); + GPIO.PIN[@backingInt(self)].modify(.{ .PIN_PAD_DRIVER = @intFromBool(open_drain) }); } pub fn put(self: Pin, level: u1) void { - const n = @intFromEnum(self); + const n = @backingInt(self); switch (level) { 0 => GPIO.OUT_W1TC.write(.{ .OUT_W1TC = @as(u26, 1) << n }), 1 => GPIO.OUT_W1TS.write(.{ .OUT_W1TS = @as(u26, 1) << n }), @@ -376,9 +376,9 @@ pub const Pin = enum(u5) { } pub fn read(self: Pin) u1 { - std.debug.assert(IO_MUX.GPIO[@intFromEnum(self)].read().FUN_IE == 1); + std.debug.assert(IO_MUX.GPIO[@backingInt(self)].read().FUN_IE == 1); - return @intCast((GPIO.IN.raw >> @intFromEnum(self)) & 1); + return @intCast((GPIO.IN.raw >> @backingInt(self)) & 1); } pub fn toggle(self: Pin) void { diff --git a/port/espressif/esp/src/hal/i2c.zig b/port/espressif/esp/src/hal/i2c.zig index b9c0bb64f..09b7fe27d 100644 --- a/port/espressif/esp/src/hal/i2c.zig +++ b/port/espressif/esp/src/hal/i2c.zig @@ -76,7 +76,7 @@ const Command = union(enum) { .write => .WRITE, .read => .READ, }; - cmd |= @as(u14, @intFromEnum(opcode)) << 11; + cmd |= @as(u14, @backingInt(opcode)) << 11; // Set ack_check_en bit if (self == .write and self.write.ack_check_en) { @@ -424,7 +424,7 @@ pub const I2C = struct { // Load address and R/W bit if (start) - self.write_fifo(@as(u8, @intFromEnum(addr)) << 1 | @intFromEnum(OperationType.read)); + self.write_fifo(@as(u8, @backingInt(addr)) << 1 | @backingInt(OperationType.read)); } fn setup_write(self: I2C, addr: Address, bytes: []const u8, start: bool, cmd_start_idx: *usize) !void { @@ -444,7 +444,7 @@ pub const I2C = struct { // Load address and R/W bit if (start) - self.write_fifo(@as(u8, @intFromEnum(addr)) << 1 | @intFromEnum(OperationType.write)); + self.write_fifo(@as(u8, @backingInt(addr)) << 1 | @backingInt(OperationType.write)); // Load data bytes into FIFO for (bytes) |byte| diff --git a/port/espressif/esp/src/hal/ledc.zig b/port/espressif/esp/src/hal/ledc.zig index 251c9b0e1..2e0ac9b10 100644 --- a/port/espressif/esp/src/hal/ledc.zig +++ b/port/espressif/esp/src/hal/ledc.zig @@ -22,20 +22,20 @@ pub fn apply(clock_source: ClockSource) void { /// timers must be reconfigured. pub fn set_clock_source(clock_source: ClockSource) void { LEDC.CONF.modify(.{ - .APB_CLK_SEL = @intFromEnum(clock_source), + .APB_CLK_SEL = @backingInt(clock_source), }); } pub fn get_clock_source() ClockSource { - return @enumFromInt(LEDC.CONF.read().APB_CLK_SEL); + return @fromBackingInt(LEDC.CONF.read().APB_CLK_SEL); } pub fn timer(num: u4) Timer { - return @enumFromInt(num); + return @fromBackingInt(num); } pub fn channel(num: u4) Channel { - return @enumFromInt(num); + return @fromBackingInt(num); } inline fn comptime_fail_or_error(msg: []const u8, fmt_args: anytype, err: anytype) !void { @@ -148,7 +148,7 @@ pub const Channel = enum(u2) { regs.hpoint.write(.{ .HPOINT_LSCH0 = 0 }); regs.conf0.modify(.{ - .TIMER_SEL_LSCH0 = @intFromEnum(config.timer), + .TIMER_SEL_LSCH0 = @backingInt(config.timer), .SIG_OUT_EN_LSCH0 = 1, }); diff --git a/port/espressif/esp/src/hal/radio/osi.zig b/port/espressif/esp/src/hal/radio/osi.zig index 6173f2e77..2d12eb552 100644 --- a/port/espressif/esp/src/hal/radio/osi.zig +++ b/port/espressif/esp/src/hal/radio/osi.zig @@ -368,7 +368,7 @@ const RecursiveMutex = struct { while (mutex.owning_task) |owning_task| { // Owning task inherits the priority of the current task if it the // current task has a bigger priority. - if (@intFromEnum(current_task.priority) > @intFromEnum(owning_task.priority)) { + if (@backingInt(current_task.priority) > @backingInt(owning_task.priority)) { mutex.prev_priority = owning_task.priority; owning_task.priority = current_task.priority; var _hptw = false; @@ -613,7 +613,7 @@ fn task_create_common( const stack_size: usize = stack_depth + if (builtin.mode == .Debug) 6000 else 0; const task: *rtos.Task = rtos.spawn(gpa, task_wrapper, .{ task_entry, param }, .{ .name = std.mem.span(name), - .priority = @enumFromInt(prio), + .priority = @fromBackingInt(prio), .stack_size = stack_size, }) catch { log.warn("failed to create task", .{}); @@ -690,7 +690,7 @@ pub fn task_get_current_task() callconv(.c) ?*anyopaque { } pub fn task_get_max_priority() callconv(.c) i32 { - return @intFromEnum(rtos.Priority.highest); + return @backingInt(rtos.Priority.highest); } pub fn esp_event_post( diff --git a/port/espressif/esp/src/hal/radio/timer.zig b/port/espressif/esp/src/hal/radio/timer.zig index f912e7203..82849ba9a 100644 --- a/port/espressif/esp/src/hal/radio/timer.zig +++ b/port/espressif/esp/src/hal/radio/timer.zig @@ -190,7 +190,7 @@ fn find_next_wake_absolute() ?time.Absolute { var min_deadline: time.Deadline = .no_deadline; while (it) |node| : (it = node.next) { const timer: *Timer = @alignCast(@fieldParentPtr("node", node)); - if (@intFromEnum(timer.deadline.timeout) < @intFromEnum(min_deadline.timeout)) { + if (@backingInt(timer.deadline.timeout) < @backingInt(min_deadline.timeout)) { min_deadline = timer.deadline; } } diff --git a/port/espressif/esp/src/hal/radio/wifi.zig b/port/espressif/esp/src/hal/radio/wifi.zig index 476d3604a..e2b1ccbd4 100644 --- a/port/espressif/esp/src/hal/radio/wifi.zig +++ b/port/espressif/esp/src/hal/radio/wifi.zig @@ -292,11 +292,11 @@ pub const WifiMode = enum(u32) { pub fn get_mode() InternalError!WifiMode { var mode: c.wifi_mode_t = undefined; try c_err(c.esp_wifi_get_mode(&mode)); - return @enumFromInt(mode); + return @fromBackingInt(mode); } pub fn set_mode(mode: WifiMode) InternalError!void { - try c_err(c.esp_wifi_set_mode(@intFromEnum(mode))); + try c_err(c.esp_wifi_set_mode(@backingInt(mode))); } fn apply_access_point_config(config: Config.AccessPoint) ConfigError!void { @@ -310,7 +310,7 @@ fn apply_access_point_config(config: Config.AccessPoint) ConfigError!void { var ap_cfg: c_patched.wifi_ap_config_t = .{ .ssid_len = @intCast(config.ssid.len), .channel = config.channel, - .authmode = @intFromEnum(config.auth_method), + .authmode = @backingInt(config.auth_method), .ssid_hidden = @intFromBool(config.ssid_hidden), .max_connection = config.max_connections, .beacon_interval = 100, @@ -341,7 +341,7 @@ fn apply_station_config(config: Config.Station) ConfigError!void { } var sta_cfg: c_patched.wifi_sta_config_t = .{ - .scan_method = @intFromEnum(config.scan_method), + .scan_method = @backingInt(config.scan_method), .bssid_set = config.bssid != null, .bssid = config.bssid orelse @splat(0), .channel = config.channel, @@ -349,7 +349,7 @@ fn apply_station_config(config: Config.Station) ConfigError!void { .sort_method = c.WIFI_CONNECT_AP_BY_SIGNAL, .threshold = .{ .rssi = -99, - .authmode = @intFromEnum(config.auth_method), + .authmode = @backingInt(config.auth_method), .rssi_5g_adjustment = 0, }, .pmf_cfg = .{ @@ -374,7 +374,7 @@ pub const PowerSaveMode = enum(u32) { }; pub fn set_power_save_mode(mode: PowerSaveMode) InternalError!void { - try c_err(c.esp_wifi_set_ps(@intFromEnum(mode))); + try c_err(c.esp_wifi_set_ps(@backingInt(mode))); } pub const Protocol = enum(u8) { @@ -400,7 +400,7 @@ pub const Protocol = enum(u8) { pub fn set_protocol(protocols: []const Config.AccessPoint.Protocol) InternalError!void { var combined: u8 = 0; for (protocols) |protocol| { - combined |= @intFromEnum(protocol); + combined |= @backingInt(protocol); } const mode = try get_mode(); @@ -423,7 +423,7 @@ pub fn set_protocol(protocols: []const Config.AccessPoint.Protocol) InternalErro /// 300s. Must be at least 10s. pub fn set_inactive_time(interface: Interface, inactive_time: u32) InternalError!void { try c_err(c.esp_wifi_set_inactive_time( - @intFromEnum(interface), + @backingInt(interface), inactive_time, )); } @@ -662,7 +662,7 @@ pub const Event = union(EventType) { /// Internal function. Called by osi layer. pub fn on_event_post(id: i32, data: ?*anyopaque, data_size: usize) void { - const event_type: EventType = @enumFromInt(id); + const event_type: EventType = @fromBackingInt(id); log.debug("event received: {t}", .{event_type}); update_sta_state(event_type); @@ -749,7 +749,7 @@ pub const Interface = enum(u32) { }; pub fn send_packet(iface: Interface, data: []const u8) (error{TooManyPacketsInFlight} || InternalError)!void { - try c_err(c.esp_wifi_internal_tx(@intFromEnum(iface), @ptrCast(@constCast(data.ptr)), @intCast(data.len))); + try c_err(c.esp_wifi_internal_tx(@backingInt(iface), @ptrCast(@constCast(data.ptr)), @intCast(data.len))); } fn tx_done_cb( @@ -761,7 +761,7 @@ fn tx_done_cb( log.debug("tx_done_cb", .{}); if (wifi_options.on_packet_transmitted) |on_packet_transmitted| - on_packet_transmitted(@intFromEnum(iface_idx), data_ptr[0..data_len], status); + on_packet_transmitted(@backingInt(iface_idx), data_ptr[0..data_len], status); } fn recv_cb_ap(buf: ?*anyopaque, len: u16, eb: ?*anyopaque) callconv(.c) c.esp_err_t { diff --git a/port/espressif/esp/src/hal/rtos.zig b/port/espressif/esp/src/hal/rtos.zig index d087fb0fb..52e3421fd 100644 --- a/port/espressif/esp/src/hal/rtos.zig +++ b/port/espressif/esp/src/hal/rtos.zig @@ -39,7 +39,7 @@ pub const TickFrequency = enum(u32) { pub fn from_hz(v: u32) TickFrequency { assert(v < 100_000); // frequency too high - return @enumFromInt(v); + return @fromBackingInt(v); } pub fn from_khz(v: u32) TickFrequency { @@ -47,7 +47,7 @@ pub const TickFrequency = enum(u32) { } fn to_us(comptime freq: TickFrequency) u24 { - return @intFromFloat(1_000_000.0 / @as(f32, @floatFromInt(@intFromEnum(freq)))); + return @intFromFloat(1_000_000.0 / @as(f32, @floatFromInt(@backingInt(freq)))); } }; @@ -81,7 +81,7 @@ pub const Priority = enum(@Int(.unsigned, rtos_options.priority_bits)) { lowest = 1, _, - pub const highest: @This() = @enumFromInt(std.math.maxInt(@typeInfo(@This()).@"enum".tag_type)); + pub const highest: @This() = @fromBackingInt(std.math.maxInt(@typeInfo(@This()).@"enum".tag_type)); }; const ready_queue_use_buckets = !rtos_options.ready_queue_force_no_buckets and @bitSizeOf(@typeInfo(Priority).@"enum".tag_type) <= 5; @@ -290,7 +290,7 @@ pub fn make_ready(task: *Task, hptw: *bool) linksection(".ram_text") void { task.state = .ready; rtos_state.ready_queue.put(task); - hptw.* |= @intFromEnum(task.priority) > @intFromEnum(rtos_state.current_task.priority); + hptw.* |= @backingInt(task.priority) > @backingInt(rtos_state.current_task.priority); } pub fn change_priority(task: *Task, new_priority: Priority) void { @@ -661,7 +661,7 @@ pub fn log_task_info(task: *Task) void { log.debug("task {?s} with prio {} in state {t} uses {} bytes out of {} for stack", .{ task.name, - @intFromEnum(task.priority), + @backingInt(task.priority), task.state, stack_usage, task.stack.len, @@ -669,7 +669,7 @@ pub fn log_task_info(task: *Task) void { } else { log.debug("task {?s} with prio {} in state {t}", .{ task.name, - @intFromEnum(task.priority), + @backingInt(task.priority), task.state, }); } @@ -738,8 +738,8 @@ pub const ReadyTaskConstraint = union(enum) { switch (constraint) { .none => {}, inline else => |constraint_priority, tag| { - if ((tag == .at_least_prio and @intFromEnum(prio) < @intFromEnum(constraint_priority)) or - (tag == .more_than_prio and @intFromEnum(prio) <= @intFromEnum(constraint_priority))) + if ((tag == .at_least_prio and @backingInt(prio) < @backingInt(constraint_priority)) or + (tag == .more_than_prio and @backingInt(prio) <= @backingInt(constraint_priority))) { return false; } @@ -823,7 +823,7 @@ pub const ReadyPriorityQueue = if (ready_queue_use_buckets) struct { var maybe_node = pq.inner.first; while (maybe_node) |node| : (maybe_node = node.next) { const task: *Task = @alignCast(@fieldParentPtr("node", node)); - if (@intFromEnum(new_task.priority) > @intFromEnum(task.priority)) { + if (@backingInt(new_task.priority) > @backingInt(task.priority)) { pq.inner.insert_before(node, &new_task.node); break; } @@ -844,19 +844,19 @@ pub const Duration = enum(u32) { pub const ms_per_tick = @max(1, us_per_tick / 1_000); pub fn from_us(v: u32) Duration { - return @enumFromInt(v / us_per_tick); + return @fromBackingInt(v / us_per_tick); } pub fn from_ms(v: u32) Duration { - return @enumFromInt(v / ms_per_tick); + return @fromBackingInt(v / ms_per_tick); } pub fn from_ticks(v: u32) Duration { - return @enumFromInt(v); + return @fromBackingInt(v); } pub fn to_ticks(duration: Duration) u32 { - return @intFromEnum(duration); + return @backingInt(duration); } }; @@ -898,7 +898,7 @@ pub const PriorityWaitQueue = struct { var it = q.list.first; while (it) |current_node| : (it = current_node.next) { const current_waiter: *Waiter = @alignCast(@fieldParentPtr("node", current_node)); - if (@intFromEnum(waiter.priority) > @intFromEnum(current_waiter.priority)) { + if (@backingInt(waiter.priority) > @backingInt(current_waiter.priority)) { q.list.insert_before(¤t_waiter.node, &waiter.node); break; } @@ -936,7 +936,7 @@ pub const ResolvedTimeout = enum(u64) { .never => .never, .after => |duration| blk: { const current_ticks = (@as(u64, rtos_state.overflow_count) << 32) | rtos_state.current_ticks; - break :blk @enumFromInt(current_ticks + duration.to_ticks()); + break :blk @fromBackingInt(current_ticks + duration.to_ticks()); }, }; } @@ -947,7 +947,7 @@ pub const ResolvedTimeout = enum(u64) { .never => null, else => { const current_ticks = (@as(u64, rtos_state.overflow_count) << 32) | rtos_state.current_ticks; - const remaining = @intFromEnum(resolved_timeout) -| current_ticks; + const remaining = @backingInt(resolved_timeout) -| current_ticks; if (remaining == 0) return error.Timeout; return .from_ticks(@truncate(remaining)); }, @@ -977,7 +977,7 @@ pub const Mutex = struct { // Owning task inherits the priority of the current task if it the // current task has a bigger priority. - if (@intFromEnum(current_task.priority) > @intFromEnum(owning_task.priority)) { + if (@backingInt(current_task.priority) > @backingInt(owning_task.priority)) { if (mutex.prev_priority == null) mutex.prev_priority = owning_task.priority; change_priority(owning_task, current_task.priority); diff --git a/port/espressif/esp/src/hal/spi.zig b/port/espressif/esp/src/hal/spi.zig index e62aa9f6b..e3101d1d8 100644 --- a/port/espressif/esp/src/hal/spi.zig +++ b/port/espressif/esp/src/hal/spi.zig @@ -22,7 +22,7 @@ pub const instance = struct { pub const SPI2 = num(2); pub fn num(n: u2) SPI { std.debug.assert(n == 2); - return @enumFromInt(n); + return @fromBackingInt(n); } }; @@ -350,15 +350,15 @@ pub const SPI = enum(u2) { } inline fn get_regs(self: SPI) *volatile SPI_Regs { - std.debug.assert(@intFromEnum(self) == 2); + std.debug.assert(@backingInt(self) == 2); return microzig.chip.peripherals.SPI2; } fn set_bit_order(self: SPI, bit_order: BitOrder) void { const regs = self.get_regs(); regs.CTRL.modify(.{ - .RD_BIT_ORDER = @intFromEnum(bit_order), - .WR_BIT_ORDER = @intFromEnum(bit_order), + .RD_BIT_ORDER = @backingInt(bit_order), + .WR_BIT_ORDER = @backingInt(bit_order), }); } diff --git a/port/espressif/esp/src/hal/systimer.zig b/port/espressif/esp/src/hal/systimer.zig index 50388416a..04e3f16d6 100644 --- a/port/espressif/esp/src/hal/systimer.zig +++ b/port/espressif/esp/src/hal/systimer.zig @@ -9,12 +9,12 @@ pub fn ticks_per_us() u52 { } pub fn unit(num: u1) Unit { - return @enumFromInt(num); + return @fromBackingInt(num); } pub fn alarm(num: u2) Alarm { std.debug.assert(num <= 2); - return @enumFromInt(num); + return @fromBackingInt(num); } pub const Unit = enum(u1) { @@ -136,7 +136,7 @@ pub const Alarm = enum(u2) { pub fn set_unit(self: Alarm, unit_: Unit) void { const conf = self.target_conf_reg(); - conf.modify(.{ .TARGET0_TIMER_UNIT_SEL = @intFromEnum(unit_) }); + conf.modify(.{ .TARGET0_TIMER_UNIT_SEL = @backingInt(unit_) }); } pub const Mode = enum { diff --git a/port/espressif/esp/src/hal/time.zig b/port/espressif/esp/src/hal/time.zig index a30aa73ba..74ffa991b 100644 --- a/port/espressif/esp/src/hal/time.zig +++ b/port/espressif/esp/src/hal/time.zig @@ -8,7 +8,7 @@ pub fn init() void { } pub fn get_time_since_boot() time.Absolute { - return @enumFromInt(get_time()); + return @fromBackingInt(get_time()); } pub fn sleep_ms(time_ms: u32) void { diff --git a/port/gigadevice/gd32/src/hals/GD32VF103/gpio.zig b/port/gigadevice/gd32/src/hals/GD32VF103/gpio.zig index 7a4abee88..4a612f0be 100644 --- a/port/gigadevice/gd32/src/hals/GD32VF103/gpio.zig +++ b/port/gigadevice/gd32/src/hals/GD32VF103/gpio.zig @@ -112,14 +112,14 @@ pub const Pin = packed struct(u8) { } pub inline fn set_input_mode(gpio: Pin, mode: InputMode) void { - const m_mode = @as(u32, @intFromEnum(mode)); + const m_mode = @as(u32, @backingInt(mode)); const config: u32 = m_mode << 2; gpio.write_pin_config(config); } pub inline fn set_output_mode(gpio: Pin, mode: OutputMode, speed: Speed) void { - const s_speed = @as(u32, @intFromEnum(speed)); - const m_mode = @as(u32, @intFromEnum(mode)); + const s_speed = @as(u32, @backingInt(speed)); + const m_mode = @as(u32, @backingInt(mode)); const config: u32 = s_speed + (m_mode << 2); gpio.write_pin_config(config); } diff --git a/port/gigadevice/gd32/src/hals/GD32VF103/pins.zig b/port/gigadevice/gd32/src/hals/GD32VF103/pins.zig index 211317764..eb1056109 100644 --- a/port/gigadevice/gd32/src/hals/GD32VF103/pins.zig +++ b/port/gigadevice/gd32/src/hals/GD32VF103/pins.zig @@ -102,7 +102,7 @@ pub fn Pins(comptime config: GlobalConfiguration) type { for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { if (@field(port_config, field_name)) |pin_config| { field_names[i] = pin_config.name orelse field_name; - field_types[i] = GPIO(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name)), pin_config.mode orelse .{ .input = .{.floating} }); + field_types[i] = GPIO(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name)), pin_config.mode orelse .{ .input = .{.floating} }); field_attrs[i] = .{}; i += 1; @@ -169,7 +169,7 @@ pub const GlobalConfiguration = struct { comptime { for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| if (@field(port_config, field_name)) |pin_config| { - const gpio_num = @intFromEnum(@field(Pin, field_name)); + const gpio_num = @backingInt(@field(Pin, field_name)); switch (pin_config.get_mode()) { .input => input_gpios |= 1 << gpio_num, @@ -182,7 +182,7 @@ pub const GlobalConfiguration = struct { const used_gpios = comptime input_gpios | output_gpios; if (used_gpios != 0) { - const offset = @intFromEnum(@field(Port, port_field_name)) + 2; + const offset = @backingInt(@field(Port, port_field_name)) + 2; const bit = @as(u32, 1 << offset); RCU.APB2EN.raw |= bit; // Delay after setting @@ -191,7 +191,7 @@ pub const GlobalConfiguration = struct { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { if (@field(port_config, field_name)) |pin_config| { - var pin = gpio.Pin.init(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name))); + var pin = gpio.Pin.init(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name))); pin.set_mode(pin_config.mode.?); } } @@ -199,7 +199,7 @@ pub const GlobalConfiguration = struct { if (input_gpios != 0) { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| if (@field(port_config, field_name)) |pin_config| { - var pin = gpio.Pin.init(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name))); + var pin = gpio.Pin.init(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name))); const pull = pin_config.pull orelse continue; if (comptime pin_config.get_mode() != .input) @compileError("Only input pins can have pull up/down enabled"); diff --git a/port/microchip/attiny/src/hals/attiny1616/adc.zig b/port/microchip/attiny/src/hals/attiny1616/adc.zig index 9bb5275e7..fd39b2d10 100644 --- a/port/microchip/attiny/src/hals/attiny1616/adc.zig +++ b/port/microchip/attiny/src/hals/attiny1616/adc.zig @@ -72,11 +72,11 @@ pub const Config = struct { pub fn configure(config: Config) void { regs.write(regs.adc0_ctrla, 0); - regs.write(regs.vref_ctrla, @intFromEnum(config.reference)); - regs.write(regs.adc0_muxpos, @intFromEnum(config.channel)); - regs.write(regs.adc0_ctrlb, @intFromEnum(config.sample_count)); - regs.write(regs.adc0_ctrlc, @intFromEnum(config.prescaler) | if (config.sample_capacitance) regs.bit(regs.adc_bits.sample_capacitance) else 0); - regs.write(regs.adc0_ctrld, @intFromEnum(config.initial_delay)); + regs.write(regs.vref_ctrla, @backingInt(config.reference)); + regs.write(regs.adc0_muxpos, @backingInt(config.channel)); + regs.write(regs.adc0_ctrlb, @backingInt(config.sample_count)); + regs.write(regs.adc0_ctrlc, @backingInt(config.prescaler) | if (config.sample_capacitance) regs.bit(regs.adc_bits.sample_capacitance) else 0); + regs.write(regs.adc0_ctrld, @backingInt(config.initial_delay)); regs.write(regs.adc0_sampctrl, config.sample_control); var ctrla = regs.bit(regs.adc_bits.enable); diff --git a/port/microchip/attiny/src/hals/attiny1616/clock.zig b/port/microchip/attiny/src/hals/attiny1616/clock.zig index e169e151b..fb06d950c 100644 --- a/port/microchip/attiny/src/hals/attiny1616/clock.zig +++ b/port/microchip/attiny/src/hals/attiny1616/clock.zig @@ -25,7 +25,7 @@ pub fn protected_write(comptime address: u16, value: u8) void { } pub fn set_prescaler(prescaler: Prescaler) void { - protected_write(regs.clkctrl_mclkctrlb, @intFromEnum(prescaler)); + protected_write(regs.clkctrl_mclkctrlb, @backingInt(prescaler)); } pub fn use_default20_m_hz_div2() void { diff --git a/port/microchip/attiny/src/hals/attiny1616/eeprom.zig b/port/microchip/attiny/src/hals/attiny1616/eeprom.zig index c721cc755..dcc85f2ba 100644 --- a/port/microchip/attiny/src/hals/attiny1616/eeprom.zig +++ b/port/microchip/attiny/src/hals/attiny1616/eeprom.zig @@ -10,17 +10,17 @@ pub const Address = enum(u8) { _, pub fn from_int(value: u8) Address { - return @enumFromInt(value); + return @fromBackingInt(value); } }; pub fn read_byte(address: Address) u8 { - return regs.mem8(data_start + @as(u16, @intFromEnum(address))).*; + return regs.mem8(data_start + @as(u16, @backingInt(address))).*; } pub fn write_byte(address: Address, value: u8) void { busy_wait(); - regs.mem8(data_start + @as(u16, @intFromEnum(address))).* = value; + regs.mem8(data_start + @as(u16, @backingInt(address))).* = value; execute_command(command_page_erase_write); } @@ -31,7 +31,7 @@ pub fn update_byte(address: Address, value: u8) void { pub fn read_slice(comptime len: usize, start: Address) [len]u8 { var out: [len]u8 = undefined; for (&out, 0..) |*byte, offset| { - byte.* = read_byte(@enumFromInt(@intFromEnum(start) + offset)); + byte.* = read_byte(@fromBackingInt(@backingInt(start) + offset)); } return out; } diff --git a/port/microchip/attiny/src/hals/attiny1616/gpio.zig b/port/microchip/attiny/src/hals/attiny1616/gpio.zig index d5c42a25a..77142b415 100644 --- a/port/microchip/attiny/src/hals/attiny1616/gpio.zig +++ b/port/microchip/attiny/src/hals/attiny1616/gpio.zig @@ -101,7 +101,7 @@ pub fn configure_input(gpio_pin: Pin, pullup: bool, sense: Sense) void { // PORT PINnCTRL selects the per-pin input/sense mode used for pin interrupts. // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf set_direction(gpio_pin, .input); - var value: u8 = @intFromEnum(sense); + var value: u8 = @backingInt(sense); if (pullup) value |= regs.bit(regs.port_bits.pullupen); regs.write(port_registers(gpio_pin.port).pinctrl + gpio_pin.index, value); } diff --git a/port/microchip/attiny/src/hals/attiny1616/rtc_pit.zig b/port/microchip/attiny/src/hals/attiny1616/rtc_pit.zig index a16cbe3e1..75a8d7760 100644 --- a/port/microchip/attiny/src/hals/attiny1616/rtc_pit.zig +++ b/port/microchip/attiny/src/hals/attiny1616/rtc_pit.zig @@ -23,7 +23,7 @@ pub fn configure(period: Period, interrupt: bool) void { // check PIT synchronization, set PI if needed, select PERIOD, then set PITEN. // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf while (busy()) {} - regs.write(regs.rtc_pitctrla, @intFromEnum(period) | regs.bit(regs.rtc_bits.piten)); + regs.write(regs.rtc_pitctrla, @backingInt(period) | regs.bit(regs.rtc_bits.piten)); regs.write(regs.rtc_pitintctrl, if (interrupt) regs.bit(regs.rtc_bits.pi) else 0); } diff --git a/port/microchip/attiny/src/hals/attiny1616/tca0.zig b/port/microchip/attiny/src/hals/attiny1616/tca0.zig index ca267b040..c8e21d689 100644 --- a/port/microchip/attiny/src/hals/attiny1616/tca0.zig +++ b/port/microchip/attiny/src/hals/attiny1616/tca0.zig @@ -40,12 +40,12 @@ pub fn configure_pwm(config: PwmConfig) void { set_compare0(config.compare0); set_compare1(config.compare1); - var ctrlb: u8 = @intFromEnum(config.waveform); + var ctrlb: u8 = @backingInt(config.waveform); if (config.enable_compare0) ctrlb |= regs.bit(regs.tca_bits.cmp0en); if (config.enable_compare1) ctrlb |= regs.bit(regs.tca_bits.cmp1en); regs.write(regs.tca0_single_ctrlb, ctrlb); - regs.write(regs.tca0_single_ctrla, @intFromEnum(config.clock) | regs.bit(regs.tca_bits.enable)); + regs.write(regs.tca0_single_ctrla, @backingInt(config.clock) | regs.bit(regs.tca_bits.enable)); } pub fn stop() void { diff --git a/port/microchip/attiny/src/hals/attiny1616/watchdog.zig b/port/microchip/attiny/src/hals/attiny1616/watchdog.zig index 7f9e60eb1..db087b9c5 100644 --- a/port/microchip/attiny/src/hals/attiny1616/watchdog.zig +++ b/port/microchip/attiny/src/hals/attiny1616/watchdog.zig @@ -22,7 +22,7 @@ pub fn reset() void { pub fn configure(period: Period) void { while (busy()) {} - clock.protected_write(regs.wdt_ctrla, @intFromEnum(period)); + clock.protected_write(regs.wdt_ctrla, @backingInt(period)); } pub fn stop() void { diff --git a/port/microchip/attiny/src/hals/attiny1634/adc.zig b/port/microchip/attiny/src/hals/attiny1634/adc.zig index bdc153b7e..e313311d8 100644 --- a/port/microchip/attiny/src/hals/attiny1634/adc.zig +++ b/port/microchip/attiny/src/hals/attiny1634/adc.zig @@ -31,9 +31,9 @@ pub fn configure_internal1v1(channel: Channel, prescaler: Prescaler) void { // ATtiny1634 datasheet section 17.13.1, page 177: ADMUX selects reference // and channel; ADCSRA starts/enables auto-triggered conversions. // https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8303-8-bit-AVR-Microcontroller-tinyAVR-ATtiny1634_Datasheet.pdf - regs.write(regs.ADMUX, 0b1000_0000 | @as(u8, @intFromEnum(channel))); + regs.write(regs.ADMUX, 0b1000_0000 | @as(u8, @backingInt(channel))); regs.write(regs.ADCSRB, 1 << 4); - regs.write(regs.ADCSRA, (1 << 7) | (1 << 5) | (1 << 3) | @as(u8, @intFromEnum(prescaler))); + regs.write(regs.ADCSRA, (1 << 7) | (1 << 5) | (1 << 3) | @as(u8, @backingInt(prescaler))); } pub inline fn start() void { diff --git a/port/microchip/attiny/src/hals/attiny1634/eeprom.zig b/port/microchip/attiny/src/hals/attiny1634/eeprom.zig index cf0f9c0a9..cbebf4a69 100644 --- a/port/microchip/attiny/src/hals/attiny1634/eeprom.zig +++ b/port/microchip/attiny/src/hals/attiny1634/eeprom.zig @@ -5,7 +5,7 @@ pub const size = 256; pub const Address = enum(u8) { _ }; pub inline fn address(value: u8) Address { - return @enumFromInt(value); + return @fromBackingInt(value); } pub inline fn busy_wait() void { @@ -14,7 +14,7 @@ pub inline fn busy_wait() void { pub fn read_byte(addr: Address) u8 { busy_wait(); - regs.write(regs.EEARL, @intFromEnum(addr)); + regs.write(regs.EEARL, @backingInt(addr)); regs.write(regs.EEARH, 0); regs.set_bits(regs.EECR, regs.bit(regs.eeprom_bits.eere)); return regs.read(regs.EEDR); diff --git a/port/microchip/attiny/src/hals/attiny1634/timer0.zig b/port/microchip/attiny/src/hals/attiny1634/timer0.zig index d583ca287..1edf1fa3c 100644 --- a/port/microchip/attiny/src/hals/attiny1634/timer0.zig +++ b/port/microchip/attiny/src/hals/attiny1634/timer0.zig @@ -13,7 +13,7 @@ pub fn configure_phase_correct_pwm_a(prescaler: Prescaler) void { // ATtiny1634 datasheet section 11.7.3, page 83: phase-correct PWM on OC0A. // https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8303-8-bit-AVR-Microcontroller-tinyAVR-ATtiny1634_Datasheet.pdf regs.write(regs.TCCR0A, (1 << 7) | (1 << 0)); - regs.write(regs.TCCR0B, @intFromEnum(prescaler)); + regs.write(regs.TCCR0B, @backingInt(prescaler)); } pub inline fn set_compare_a(value: u8) void { diff --git a/port/microchip/attiny/src/hals/attiny1634/timer1.zig b/port/microchip/attiny/src/hals/attiny1634/timer1.zig index ebb33c384..e7338db5c 100644 --- a/port/microchip/attiny/src/hals/attiny1634/timer1.zig +++ b/port/microchip/attiny/src/hals/attiny1634/timer1.zig @@ -20,7 +20,7 @@ pub fn configure_phase_correct_dynamic(config: DynamicPwmConfig) void { // https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8303-8-bit-AVR-Microcontroller-tinyAVR-ATtiny1634_Datasheet.pdf regs.write(regs.TCCR1A, (1 << 7) | (1 << 5) | (1 << 1)); - regs.write(regs.TCCR1B, (1 << 4) | @as(u8, @intFromEnum(config.prescaler))); + regs.write(regs.TCCR1B, (1 << 4) | @as(u8, @backingInt(config.prescaler))); set_top(config.top); } diff --git a/port/microchip/attiny/src/hals/attiny1634/watchdog.zig b/port/microchip/attiny/src/hals/attiny1634/watchdog.zig index 6a2169c44..f39867ca3 100644 --- a/port/microchip/attiny/src/hals/attiny1634/watchdog.zig +++ b/port/microchip/attiny/src/hals/attiny1634/watchdog.zig @@ -48,7 +48,7 @@ pub fn stop() void { } fn control_value(mode: Mode, timeout: Timeout) u8 { - const raw: u4 = @intFromEnum(timeout); + const raw: u4 = @backingInt(timeout); const prescaler = (@as(u8, raw & 0b0111)) | ((@as(u8, raw >> 3) & 0x1) << regs.watchdog_bits.wdp3); return prescaler | switch (mode) { diff --git a/port/microchip/attiny/src/hals/attiny85/adc.zig b/port/microchip/attiny/src/hals/attiny85/adc.zig index 7779804fb..d01228f2c 100644 --- a/port/microchip/attiny/src/hals/attiny85/adc.zig +++ b/port/microchip/attiny/src/hals/attiny85/adc.zig @@ -38,14 +38,14 @@ pub const Config = struct { pub fn apply(config: Config) void { // ATtiny25/45/85 datasheet, section 17.13.1: ADMUX packs reference, // left-adjust, and channel selection in one register. - regs.write(regs.ADMUX, (@as(u8, @intFromEnum(config.reference)) << 4) | + regs.write(regs.ADMUX, (@as(u8, @backingInt(config.reference)) << 4) | (@as(u8, @intFromBool(config.left_adjust)) << 5) | - @as(u8, @intFromEnum(config.channel))); + @as(u8, @backingInt(config.channel))); regs.write(regs.ADCSRA, regs.bit(regs.adc_bits.aden) | (@as(u8, @intFromBool(config.auto_trigger)) << regs.adc_bits.adate) | (@as(u8, @intFromBool(config.interrupt)) << regs.adc_bits.adie) | - @as(u8, @intFromEnum(config.prescaler))); + @as(u8, @backingInt(config.prescaler))); } pub inline fn use_adc_noise_reduction_sleep() void { diff --git a/port/microchip/attiny/src/hals/attiny85/eeprom.zig b/port/microchip/attiny/src/hals/attiny85/eeprom.zig index be5cba4eb..c01e81e84 100644 --- a/port/microchip/attiny/src/hals/attiny85/eeprom.zig +++ b/port/microchip/attiny/src/hals/attiny85/eeprom.zig @@ -8,7 +8,7 @@ pub const Address = enum(u16) { }; pub inline fn address(value: u16) Address { - return @enumFromInt(value); + return @fromBackingInt(value); } pub inline fn is_ready() bool { @@ -43,21 +43,21 @@ pub fn update_byte(addr: Address, value: u8) void { } pub fn read_slice(addr: Address, dest: []u8) void { - const base = @intFromEnum(addr); + const base = @backingInt(addr); for (dest, 0..) |*byte, i| { byte.* = read_byte(address(base + @as(u16, @intCast(i)))); } } pub fn update_slice(addr: Address, src: []const u8) void { - const base = @intFromEnum(addr); + const base = @backingInt(addr); for (src, 0..) |byte, i| { update_byte(address(base + @as(u16, @intCast(i))), byte); } } fn set_address(addr: Address) void { - const raw: u16 = @intFromEnum(addr); + const raw: u16 = @backingInt(addr); regs.write(regs.EEARL, @truncate(raw)); regs.write(regs.EEARH, @truncate(raw >> 8)); } diff --git a/port/microchip/attiny/src/hals/attiny85/pcint.zig b/port/microchip/attiny/src/hals/attiny85/pcint.zig index 94260b798..42dc25e4d 100644 --- a/port/microchip/attiny/src/hals/attiny85/pcint.zig +++ b/port/microchip/attiny/src/hals/attiny85/pcint.zig @@ -10,11 +10,11 @@ pub const PinChange = enum(u3) { }; pub inline fn enable_pin(pin: PinChange) void { - regs.set_bits(regs.PCMSK, regs.bit(@intFromEnum(pin))); + regs.set_bits(regs.PCMSK, regs.bit(@backingInt(pin))); } pub inline fn disable_pin(pin: PinChange) void { - regs.clear_bits(regs.PCMSK, regs.bit(@intFromEnum(pin))); + regs.clear_bits(regs.PCMSK, regs.bit(@backingInt(pin))); } pub inline fn enable() void { diff --git a/port/microchip/attiny/src/hals/attiny85/sleep.zig b/port/microchip/attiny/src/hals/attiny85/sleep.zig index 553d1c776..199036e66 100644 --- a/port/microchip/attiny/src/hals/attiny85/sleep.zig +++ b/port/microchip/attiny/src/hals/attiny85/sleep.zig @@ -9,7 +9,7 @@ pub const Mode = enum(u2) { pub inline fn set_mode(mode: Mode) void { const mask = regs.bit(regs.sleep_bits.sm1) | regs.bit(regs.sleep_bits.sm0); regs.write(regs.MCUCR, (regs.read(regs.MCUCR) & ~mask) | - (@as(u8, @intFromEnum(mode)) << regs.sleep_bits.sm0)); + (@as(u8, @backingInt(mode)) << regs.sleep_bits.sm0)); } pub inline fn enable() void { diff --git a/port/microchip/attiny/src/hals/attiny85/timer0.zig b/port/microchip/attiny/src/hals/attiny85/timer0.zig index 25e3f9960..10d5d7163 100644 --- a/port/microchip/attiny/src/hals/attiny85/timer0.zig +++ b/port/microchip/attiny/src/hals/attiny85/timer0.zig @@ -35,12 +35,12 @@ pub const Config = struct { }; pub fn apply(config: Config) void { - const wgm: u3 = @intFromEnum(config.waveform); - regs.write(regs.TCCR0A, (@as(u8, @intFromEnum(config.compare_a)) << 6) | - (@as(u8, @intFromEnum(config.compare_b)) << 4) | + const wgm: u3 = @backingInt(config.waveform); + regs.write(regs.TCCR0A, (@as(u8, @backingInt(config.compare_a)) << 6) | + (@as(u8, @backingInt(config.compare_b)) << 4) | (@as(u8, wgm) & 0b011)); regs.write(regs.TCCR0B, ((@as(u8, wgm) & 0b100) << 1) | - @as(u8, @intFromEnum(config.prescaler))); + @as(u8, @backingInt(config.prescaler))); } pub inline fn set_compare_a(value: u8) void { diff --git a/port/microchip/attiny/src/hals/attiny85/timer1.zig b/port/microchip/attiny/src/hals/attiny85/timer1.zig index 5343d0a8d..97cb7cfbf 100644 --- a/port/microchip/attiny/src/hals/attiny85/timer1.zig +++ b/port/microchip/attiny/src/hals/attiny85/timer1.zig @@ -52,13 +52,13 @@ pub fn configure_fast_pwm(config: FastPwmConfig) void { switch (config.output) { .a => { regs.write(regs.TCCR1, 0x40 | - (@as(u8, @intFromEnum(config.compare)) << 4) | - @as(u8, @intFromEnum(config.prescaler))); + (@as(u8, @backingInt(config.compare)) << 4) | + @as(u8, @backingInt(config.prescaler))); regs.clear_bits(regs.GTCCR, 0b0111_0000); }, .b => { - regs.write(regs.TCCR1, @as(u8, @intFromEnum(config.prescaler))); - regs.write(regs.GTCCR, 0x40 | (@as(u8, @intFromEnum(config.compare)) << 4)); + regs.write(regs.TCCR1, @as(u8, @backingInt(config.prescaler))); + regs.write(regs.GTCCR, 0x40 | (@as(u8, @backingInt(config.compare)) << 4)); }, } } @@ -80,9 +80,9 @@ pub inline fn counter() u8 { } pub inline fn enable_interrupt(interrupt: Interrupt) void { - regs.set_bits(regs.TIMSK, @intFromEnum(interrupt)); + regs.set_bits(regs.TIMSK, @backingInt(interrupt)); } pub inline fn disable_interrupt(interrupt: Interrupt) void { - regs.clear_bits(regs.TIMSK, @intFromEnum(interrupt)); + regs.clear_bits(regs.TIMSK, @backingInt(interrupt)); } diff --git a/port/microchip/attiny/src/hals/attiny85/watchdog.zig b/port/microchip/attiny/src/hals/attiny85/watchdog.zig index 3b7005ca7..22b397cda 100644 --- a/port/microchip/attiny/src/hals/attiny85/watchdog.zig +++ b/port/microchip/attiny/src/hals/attiny85/watchdog.zig @@ -53,7 +53,7 @@ pub fn force_reset(timeout: Timeout) noreturn { } fn control_value(mode: Mode, timeout: Timeout) u8 { - const raw: u4 = @intFromEnum(timeout); + const raw: u4 = @backingInt(timeout); const prescaler = (@as(u8, raw & 0b0111)) | ((@as(u8, raw >> 3) & 0x1) << regs.watchdog_bits.wdp3); return prescaler | switch (mode) { diff --git a/port/nordic/nrf5x/src/hal/clocks.zig b/port/nordic/nrf5x/src/hal/clocks.zig index cbddea02d..171679582 100644 --- a/port/nordic/nrf5x/src/hal/clocks.zig +++ b/port/nordic/nrf5x/src/hal/clocks.zig @@ -79,7 +79,7 @@ pub const lfclk = struct { switch (version) { .nrf51 => { CLOCK.LFCLKSRC.write(.{ - .SRC = @enumFromInt(@intFromEnum(source)), + .SRC = @fromBackingInt(@backingInt(source)), }); }, .nrf52 => { @@ -93,8 +93,8 @@ pub const lfclk = struct { .Xtal => |x| { CLOCK.LFCLKSRC.write(.{ .SRC = .Xtal, - .BYPASS = @enumFromInt(@intFromBool(x.bypass)), - .EXTERNAL = @enumFromInt(@intFromBool(x.external)), + .BYPASS = @fromBackingInt(@intFromBool(x.bypass)), + .EXTERNAL = @fromBackingInt(@intFromBool(x.external)), }); }, .Synth => CLOCK.LFCLKSRC.write( diff --git a/port/nordic/nrf5x/src/hal/drivers.zig b/port/nordic/nrf5x/src/hal/drivers.zig index 2bfd87d48..3c269fd71 100644 --- a/port/nordic/nrf5x/src/hal/drivers.zig +++ b/port/nordic/nrf5x/src/hal/drivers.zig @@ -267,7 +267,7 @@ pub const ClockDevice = struct { fn get_time_since_boot_fn(td: *anyopaque) time.Absolute { _ = td; const t = hal.time.get_time_since_boot().to_us(); - return @enumFromInt(t); + return @fromBackingInt(t); } }; diff --git a/port/nordic/nrf5x/src/hal/gpio.zig b/port/nordic/nrf5x/src/hal/gpio.zig index 31bfc1adb..e14a2caa6 100644 --- a/port/nordic/nrf5x/src/hal/gpio.zig +++ b/port/nordic/nrf5x/src/hal/gpio.zig @@ -40,7 +40,7 @@ pub const Pull = Regs.Pull; pub const DriveStrength = Regs.DriveStrength; pub fn num(bank: u1, n: u5) Pin { - return @enumFromInt(@as(u6, bank) * 32 + n); + return @fromBackingInt(@as(u6, bank) * 32 + n); } // TODO: Do we want to follow the rp2350 design where we encode the package @@ -53,7 +53,7 @@ pub const Pin = enum(u6) { return switch (version) { .nrf51 => peripherals.GPIO, .nrf5283x => peripherals.P0, - .nrf52840 => if (@intFromEnum(pin) <= 31) + .nrf52840 => if (@backingInt(pin) <= 31) peripherals.P0 else peripherals.P1, @@ -62,13 +62,13 @@ pub const Pin = enum(u6) { /// Get the index of the pin, relative to its bank pub fn index(pin: Pin) u5 { - const n = @intFromEnum(pin); + const n = @backingInt(pin); return @truncate(if (n <= 31) n else (n - 32)); } /// Get the port of the pin pub fn port(pin: Pin) u1 { - const n = @intFromEnum(pin); + const n = @backingInt(pin); if (n <= 31) { return 0; } else return 1; @@ -95,7 +95,7 @@ pub const Pin = enum(u6) { pub inline fn set_sense(pin: Pin, sense: Sense) void { const regs = pin.get_regs(); - regs.PIN_CNF[@intFromEnum(pin)].modify(.{ + regs.PIN_CNF[@backingInt(pin)].modify(.{ .SENSE = switch (sense) { .disabled => .Disabled, .high => .High, @@ -106,7 +106,7 @@ pub const Pin = enum(u6) { pub inline fn set_input_buffer(pin: Pin, input_buffer: InputBuffer) void { const regs = pin.get_regs(); - regs.PIN_CNF[@intFromEnum(pin)].modify(.{ + regs.PIN_CNF[@backingInt(pin)].modify(.{ .INPUT = switch (input_buffer) { .connect => .Connect, .disconnect => .Disconnect, @@ -149,7 +149,7 @@ test "pin number" { }; inline for (tcs) |tc| { const pin = num(tc[0], tc[1]); - try std.testing.expectEqual(tc[2], @intFromEnum(pin)); + try std.testing.expectEqual(tc[2], @backingInt(pin)); } } diff --git a/port/nordic/nrf5x/src/hal/i2c.zig b/port/nordic/nrf5x/src/hal/i2c.zig index d9a685572..44c8d9edb 100644 --- a/port/nordic/nrf5x/src/hal/i2c.zig +++ b/port/nordic/nrf5x/src/hal/i2c.zig @@ -38,14 +38,14 @@ pub const AddressError = drivers.I2C_Device.Address.Error; pub const Error = drivers.I2C_Device.Error || error{Overrun}; pub fn num(n: u1) I2C { - return @as(I2C, @enumFromInt(n)); + return @as(I2C, @fromBackingInt(n)); } pub const I2C = enum(u1) { _, fn get_regs(i2c: I2C) *volatile I2cRegs { - return switch (@intFromEnum(i2c)) { + return switch (@backingInt(i2c)) { 0 => I2C0, 1 => I2C1, }; @@ -73,7 +73,7 @@ pub const I2C = enum(u1) { config.scl_pin.set_direction(.in); config.scl_pin.set_drive_strength(.SOD1); switch (version) { - .nrf5283x => regs.PSELSCL.raw = @intFromEnum(config.scl_pin), + .nrf5283x => regs.PSELSCL.raw = @backingInt(config.scl_pin), .nrf52840 => regs.PSEL.SCL.write(.{ .PIN = config.scl_pin.index(), .PORT = config.scl_pin.port(), @@ -84,7 +84,7 @@ pub const I2C = enum(u1) { config.sda_pin.set_direction(.in); config.sda_pin.set_drive_strength(.SOD1); switch (version) { - .nrf5283x => regs.PSELSDA.raw = @intFromEnum(config.sda_pin), + .nrf5283x => regs.PSELSDA.raw = @backingInt(config.sda_pin), .nrf52840 => regs.PSEL.SDA.write(.{ .PIN = config.sda_pin.index(), .PORT = config.sda_pin.port(), @@ -194,7 +194,7 @@ pub const I2C = enum(u1) { i2c.disable(); defer i2c.enable(); i2c.get_regs().ADDRESS.write(.{ - .ADDRESS = @intFromEnum(addr), + .ADDRESS = @backingInt(addr), }); } diff --git a/port/nordic/nrf5x/src/hal/i2cdma.zig b/port/nordic/nrf5x/src/hal/i2cdma.zig index 57bc261ce..0045ef7c6 100644 --- a/port/nordic/nrf5x/src/hal/i2cdma.zig +++ b/port/nordic/nrf5x/src/hal/i2cdma.zig @@ -46,14 +46,14 @@ pub const Error = drivers.I2C_Device.Error || error{ /// Create an I2C instance from a peripheral number (0 or 1). pub fn num(n: u1) I2C { - return @as(I2C, @enumFromInt(n)); + return @as(I2C, @fromBackingInt(n)); } pub const I2C = enum(u1) { _, fn get_regs(i2c: I2C) *volatile I2cRegs { - return switch (@intFromEnum(i2c)) { + return switch (@backingInt(i2c)) { 0 => I2C0, 1 => I2C1, }; @@ -173,7 +173,7 @@ pub const I2C = enum(u1) { i2c.disable(); defer i2c.enable(); i2c.get_regs().ADDRESS.write(.{ - .ADDRESS = @intFromEnum(addr), + .ADDRESS = @backingInt(addr), }); } diff --git a/port/nordic/nrf5x/src/hal/spim.zig b/port/nordic/nrf5x/src/hal/spim.zig index f410a26bc..157765740 100644 --- a/port/nordic/nrf5x/src/hal/spim.zig +++ b/port/nordic/nrf5x/src/hal/spim.zig @@ -61,14 +61,14 @@ pub const TransactionError = error{ }; pub fn num(n: u2) SPIM { - return @as(SPIM, @enumFromInt(n)); + return @as(SPIM, @fromBackingInt(n)); } pub const SPIM = enum(u1) { _, pub fn get_regs(spi: SPIM) *volatile SpimRegs { - return switch (@intFromEnum(spi)) { + return switch (@backingInt(spi)) { 0 => SPIM0, 1 => SPIM1, }; @@ -113,22 +113,22 @@ pub const SPIM = enum(u1) { // TODO: Does MOSI idle change here? switch (config.mode) { .mode0 => regs.CONFIG.write(.{ - .ORDER = @enumFromInt(@intFromBool(config.bit_order == .lsb_first)), + .ORDER = @fromBackingInt(@intFromBool(config.bit_order == .lsb_first)), .CPHA = .Leading, .CPOL = .ActiveHigh, }), .mode1 => regs.CONFIG.write(.{ - .ORDER = @enumFromInt(@intFromBool(config.bit_order == .lsb_first)), + .ORDER = @fromBackingInt(@intFromBool(config.bit_order == .lsb_first)), .CPHA = .Trailing, .CPOL = .ActiveHigh, }), .mode2 => regs.CONFIG.write(.{ - .ORDER = @enumFromInt(@intFromBool(config.bit_order == .lsb_first)), + .ORDER = @fromBackingInt(@intFromBool(config.bit_order == .lsb_first)), .CPHA = .Leading, .CPOL = .ActiveLow, }), .mode3 => regs.CONFIG.write(.{ - .ORDER = @enumFromInt(@intFromBool(config.bit_order == .lsb_first)), + .ORDER = @fromBackingInt(@intFromBool(config.bit_order == .lsb_first)), .CPHA = .Trailing, .CPOL = .ActiveLow, }), diff --git a/port/nordic/nrf5x/src/hal/time.zig b/port/nordic/nrf5x/src/hal/time.zig index f1f8ea0c0..cf285b6b7 100644 --- a/port/nordic/nrf5x/src/hal/time.zig +++ b/port/nordic/nrf5x/src/hal/time.zig @@ -110,7 +110,7 @@ pub fn get_time_since_boot() time.Absolute { const counter = rtc.COUNTER.read().COUNTER; const ticks = calc_ticks(p, counter); // RTC updates at 32768 hertz, so we can just multiply by 1M, then shift 15 - return @enumFromInt((ticks * 1_000_000) >> 15); + return @fromBackingInt((ticks * 1_000_000) >> 15); } pub fn sleep_ms(time_ms: u32) void { diff --git a/port/nordic/nrf5x/src/hal/uart.zig b/port/nordic/nrf5x/src/hal/uart.zig index c0c387e9f..01f861076 100644 --- a/port/nordic/nrf5x/src/hal/uart.zig +++ b/port/nordic/nrf5x/src/hal/uart.zig @@ -24,7 +24,7 @@ const version: enum { var uart_logger: ?UART.Writer = null; pub fn num(n: u1) UART { - return @enumFromInt(n); + return @fromBackingInt(n); } /// Set a specific uart instance to be used for logging. @@ -118,7 +118,7 @@ pub const UART = enum(u1) { const ReceiveError = error{}; inline fn get_regs(uart: UART) *volatile UART_Regs { - return switch (@intFromEnum(uart)) { + return switch (@backingInt(uart)) { 0 => peripherals.UART0, else => unreachable, }; @@ -161,7 +161,7 @@ pub const UART = enum(u1) { fn set_txd(uart: UART, pin: gpio.Pin) void { const regs = uart.get_regs(); switch (version) { - .nrf5283x => regs.PSELTXD.raw = @intFromEnum(pin), + .nrf5283x => regs.PSELTXD.raw = @backingInt(pin), .nrf52840 => regs.PSEL.TXD.write(.{ .PIN = pin.index(), .PORT = pin.port(), @@ -173,7 +173,7 @@ pub const UART = enum(u1) { fn set_rxd(uart: UART, pin: gpio.Pin) void { const regs = uart.get_regs(); switch (version) { - .nrf5283x => regs.PSELRXD.raw = @intFromEnum(pin), + .nrf5283x => regs.PSELRXD.raw = @backingInt(pin), .nrf52840 => regs.PSEL.RXD.write(.{ .PIN = pin.index(), .PORT = pin.port(), @@ -185,11 +185,11 @@ pub const UART = enum(u1) { fn set_cts(uart: UART, pin: gpio.Pin) void { const regs = uart.get_regs(); switch (version) { - .nrf5283x => regs.PSELCTS.raw = @intFromEnum(pin), + .nrf5283x => regs.PSELCTS.raw = @backingInt(pin), .nrf52840 => regs.PSEL.CTS.write(.{ .PIN = pin.index(), .PORT = pin.port(), - .CONNECT = @enumFromInt(0), // 0 means connected lol + .CONNECT = @fromBackingInt(0), // 0 means connected lol }), } } @@ -197,11 +197,11 @@ pub const UART = enum(u1) { fn set_rts(uart: UART, pin: gpio.Pin) void { const regs = uart.get_regs(); switch (version) { - .nrf5283x => regs.PSELRTS.raw = @intFromEnum(pin), + .nrf5283x => regs.PSELRTS.raw = @backingInt(pin), .nrf52840 => regs.PSEL.RTS.write(.{ .PIN = pin.index(), .PORT = pin.port(), - .CONNECT = @enumFromInt(0), // 0 means connected lol + .CONNECT = @fromBackingInt(0), // 0 means connected lol }), } } diff --git a/port/nordic/nrf5x/src/hal/usbd.zig b/port/nordic/nrf5x/src/hal/usbd.zig index f6ceb0640..fc58ee7f5 100644 --- a/port/nordic/nrf5x/src/hal/usbd.zig +++ b/port/nordic/nrf5x/src/hal/usbd.zig @@ -179,14 +179,14 @@ pub const USBD = struct { var status_in = status >> 1; inline for (1..8) |i| { if (status_in == 0) break; - if (status_in & 1 == 1) controller.on_buffer(&self.interface, .in(@enumFromInt(i))); + if (status_in & 1 == 1) controller.on_buffer(&self.interface, .in(@fromBackingInt(i))); status_in >>= 1; } // OUT endpoints (bits 17-23) var status_out = status >> 17; inline for (1..8) |i| { if (status_out == 0) break; - if (status_out & 1 == 1) controller.on_buffer(&self.interface, .out(@enumFromInt(i))); + if (status_out & 1 == 1) controller.on_buffer(&self.interface, .out(@fromBackingInt(i))); status_out >>= 1; } } @@ -272,7 +272,7 @@ pub const USBD = struct { return 0; } - const i = @intFromEnum(ep_num); + const i = @backingInt(ep_num); const scratch = &self.bufs_in[i]; const scratch_cap = @min(self.eps_in[i].max_packet_size, scratch.len); var scratch_slice: []align(1) u8 = scratch[0..scratch_cap]; @@ -329,7 +329,7 @@ pub const USBD = struct { log.debug("ep_readv {t}: ({} bytes)", .{ ep_num, total_len }); const self: *Self = @fieldParentPtr("interface", itf); - const i = @intFromEnum(ep_num); + const i = @backingInt(ep_num); const size = peripherals.USBD.SIZE.EPOUT[i].raw; const scratch_buf = &self.bufs_out[i]; @@ -374,7 +374,7 @@ pub const USBD = struct { fn ep_open(itf: *usb.DeviceInterface, desc: *const usb.descriptor.Endpoint) void { const self: *Self = @fieldParentPtr("interface", itf); const ep = desc.endpoint; - const i = @intFromEnum(ep.num); + const i = @backingInt(ep.num); const mask: u32 = @as(u32, 1) << i; switch (ep.dir) { .In => { diff --git a/port/nxp/lpc/src/hals/LPC176x5x.zig b/port/nxp/lpc/src/hals/LPC176x5x.zig index 00db7633f..e503f8737 100644 --- a/port/nxp/lpc/src/hals/LPC176x5x.zig +++ b/port/nxp/lpc/src/hals/LPC176x5x.zig @@ -63,7 +63,7 @@ pub fn parse_pin(comptime spec: []const u8) type { pub fn route_pin(comptime pin: type, function: PinTarget) void { var val = pin.regs.pinsel_reg.read(); - @field(val, pin.regs.pinsel_field) = @intFromEnum(function); + @field(val, pin.regs.pinsel_field) = @backingInt(function); pin.regs.pinsel_reg.write(val); } @@ -138,19 +138,19 @@ pub fn Uart(comptime index: usize, comptime pins: microzig.uart.Pins) type { switch (index) { 0 => { SYSCON.PCONP.modify(.{ .PCUART0 = 1 }); - SYSCON.PCLKSEL0.modify(.{ .PCLK_UART0 = @intFromEnum(uart.CClkDiv.four) }); + SYSCON.PCLKSEL0.modify(.{ .PCLK_UART0 = @backingInt(uart.CClkDiv.four) }); }, 1 => { SYSCON.PCONP.modify(.{ .PCUART1 = 1 }); - SYSCON.PCLKSEL0.modify(.{ .PCLK_UART1 = @intFromEnum(uart.CClkDiv.four) }); + SYSCON.PCLKSEL0.modify(.{ .PCLK_UART1 = @backingInt(uart.CClkDiv.four) }); }, 2 => { SYSCON.PCONP.modify(.{ .PCUART2 = 1 }); - SYSCON.PCLKSEL1.modify(.{ .PCLK_UART2 = @intFromEnum(uart.CClkDiv.four) }); + SYSCON.PCLKSEL1.modify(.{ .PCLK_UART2 = @backingInt(uart.CClkDiv.four) }); }, 3 => { SYSCON.PCONP.modify(.{ .PCUART3 = 1 }); - SYSCON.PCLKSEL1.modify(.{ .PCLK_UART3 = @intFromEnum(uart.CClkDiv.four) }); + SYSCON.PCLKSEL1.modify(.{ .PCLK_UART3 = @backingInt(uart.CClkDiv.four) }); }, else => unreachable, } @@ -158,10 +158,10 @@ pub fn Uart(comptime index: usize, comptime pins: microzig.uart.Pins) type { UARTn.LCR.modify(.{ // 8N1 - .WLS = @intFromEnum(config.data_bits), - .SBS = @intFromEnum(config.stop_bits), + .WLS = @backingInt(config.data_bits), + .SBS = @backingInt(config.stop_bits), .PE = if (config.parity != null) @as(u1, 1) else @as(u1, 0), - .PS = if (config.parity) |p| @intFromEnum(p) else @intFromEnum(uart.Parity.odd), + .PS = if (config.parity) |p| @backingInt(p) else @backingInt(uart.Parity.odd), .BC = 0, .DLAB = 1, }); diff --git a/port/nxp/mcx/src/mcxa153/hal/gpio.zig b/port/nxp/mcx/src/mcxa153/hal/gpio.zig index 8e50b97b6..f747cf9f4 100644 --- a/port/nxp/mcx/src/mcxa153/hal/gpio.zig +++ b/port/nxp/mcx/src/mcxa153/hal/gpio.zig @@ -4,7 +4,7 @@ const syscon = @import("./syscon.zig"); const chip = microzig.chip; pub fn num(comptime n: u2, comptime pin: u5) GPIO { - return @enumFromInt(@as(u7, n) << 5 | pin); + return @fromBackingInt(@as(u7, n) << 5 | pin); } pub const GPIO = enum(u7) { @@ -46,14 +46,14 @@ pub const GPIO = enum(u7) { pub fn set_direction(gpio: GPIO, direction: Direction) void { const regs = gpio.get_regs(); const old: u32 = regs.PDDR.raw; - const new = @as(u32, @intFromEnum(direction)) << gpio.get_pin(); + const new = @as(u32, @backingInt(direction)) << gpio.get_pin(); regs.PDDR.write_raw(old & ~gpio.get_mask() | new); } pub fn set_interrupt_config(gpio: GPIO, trigger: InterruptConfig) void { const regs = gpio.get_regs(); - const irqc = @as(u32, @intFromEnum(trigger)) << 16; + const irqc = @as(u32, @backingInt(trigger)) << 16; const isf = @as(u32, 1) << 24; regs.ICR[gpio.get_pin()].write_raw(irqc | isf); @@ -82,11 +82,11 @@ pub const GPIO = enum(u7) { } inline fn get_n(gpio: GPIO) u2 { - return @intCast(@intFromEnum(gpio) >> 5); + return @intCast(@backingInt(gpio) >> 5); } inline fn get_pin(gpio: GPIO) u5 { - return @intCast(@intFromEnum(gpio) & 0x1f); + return @intCast(@backingInt(gpio) & 0x1f); } inline fn get_mask(gpio: GPIO) u32 { diff --git a/port/nxp/mcx/src/mcxa153/hal/port.zig b/port/nxp/mcx/src/mcxa153/hal/port.zig index a8e46e71f..1d51c519c 100644 --- a/port/nxp/mcx/src/mcxa153/hal/port.zig +++ b/port/nxp/mcx/src/mcxa153/hal/port.zig @@ -3,14 +3,14 @@ const syscon = @import("./syscon.zig"); const gpio = @import("./gpio.zig"); pub fn num(comptime n: u2) Port { - return @enumFromInt(n); + return @fromBackingInt(n); } pub const Port = enum(u2) { _, pub fn init(comptime port: Port) void { - const tag = switch (@intFromEnum(port)) { + const tag = switch (@backingInt(port)) { 0 => .PORT0, 1 => .PORT1, 2 => .PORT2, @@ -22,6 +22,6 @@ pub const Port = enum(u2) { } pub fn get_gpio(comptime port: Port, comptime pin: u5) gpio.GPIO { - return gpio.num(@intFromEnum(port), pin); + return gpio.num(@backingInt(port), pin); } }; diff --git a/port/nxp/mcx/src/mcxn947/hal/flexcomm.zig b/port/nxp/mcx/src/mcxn947/hal/flexcomm.zig index ff81b6b53..0e0c5a690 100644 --- a/port/nxp/mcx/src/mcxn947/hal/flexcomm.zig +++ b/port/nxp/mcx/src/mcxn947/hal/flexcomm.zig @@ -37,7 +37,7 @@ pub const FlexComm = enum(u4) { /// `n` can be at most 9 (inclusive). pub fn num(n: u4) FlexComm { assert(n <= 9); - return @enumFromInt(n); + return @fromBackingInt(n); } /// Initialize a Uart / SPI / I2C interface on a given flexcomm interface. @@ -48,7 +48,7 @@ pub const FlexComm = enum(u4) { syscon.module_reset_release(module); syscon.module_enable_clock(module); - flexcomm.get_regs().PSELID.modify_one("PERSEL", @enumFromInt(@intFromEnum(ty))); + flexcomm.get_regs().PSELID.modify_one("PERSEL", @fromBackingInt(@backingInt(ty))); } /// Deinit the interface by disabling the clock and asserting the module's reset. @@ -72,11 +72,11 @@ pub const FlexComm = enum(u4) { const ClockTy = @FieldType(@TypeOf(chip.peripherals.SYSCON0.FCCLKSEL[0]).underlying_type, "SEL"); pub fn from(clk: ClockTy) Clock { - return @enumFromInt(@intFromEnum(clk)); + return @fromBackingInt(@backingInt(clk)); } pub fn to(clk: Clock) ClockTy { - return @enumFromInt(@intFromEnum(clk)); + return @fromBackingInt(@backingInt(clk)); } }; @@ -130,7 +130,7 @@ pub const FlexComm = enum(u4) { } fn get_n(flexcomm: FlexComm) u4 { - return @intFromEnum(flexcomm); + return @backingInt(flexcomm); } fn get_regs(flexcomm: FlexComm) RegTy { @@ -140,6 +140,6 @@ pub const FlexComm = enum(u4) { } fn get_module(flexcomm: FlexComm) syscon.Module { - return @enumFromInt(@intFromEnum(syscon.Module.FC0) + flexcomm.get_n()); + return @fromBackingInt(@backingInt(syscon.Module.FC0) + flexcomm.get_n()); } }; diff --git a/port/nxp/mcx/src/mcxn947/hal/flexcomm/LP_I2C.zig b/port/nxp/mcx/src/mcxn947/hal/flexcomm/LP_I2C.zig index 9c74160d3..a8a530f05 100644 --- a/port/nxp/mcx/src/mcxn947/hal/flexcomm/LP_I2C.zig +++ b/port/nxp/mcx/src/mcxn947/hal/flexcomm/LP_I2C.zig @@ -60,7 +60,7 @@ pub const LP_I2C = enum(u4) { pub fn init(interface: u4, config: Config) ConfigError!LP_I2C { FlexComm.num(interface).init(.I2C); - const i2c: LP_I2C = @enumFromInt(interface); + const i2c: LP_I2C = @fromBackingInt(interface); const regs = i2c.get_regs(); i2c.reset(); @@ -72,13 +72,13 @@ pub const LP_I2C = enum(u4) { .CIRFIFO = .DISABLED, .RDMO = .DISABLED, // TODO: address match - .RELAX = @enumFromInt(@intFromBool(config.relaxed)), + .RELAX = @fromBackingInt(@intFromBool(config.relaxed)), .ABORT = .DISABLED, }); regs.MCFGR1.write(.{ .PRESCALE = .DIVIDE_BY_1, .AUTOSTOP = .DISABLED, - .IGNACK = @enumFromInt(@intFromBool(config.ignore_nack)), + .IGNACK = @fromBackingInt(@intFromBool(config.ignore_nack)), .TIMECFG = .IF_SCL_LOW, .STARTCFG = .BOTH_I2C_AND_LPI2C_IDLE, .STOPCFG = .ANY_STOP, @@ -99,7 +99,7 @@ pub const LP_I2C = enum(u4) { try i2c.set_baudrate(config.mode, config.baudrate); if (config.bus_idle_timeout) |t| { - const prescaler: u8 = @as(u8, 1) << @intFromEnum(regs.MCFGR1.read().PRESCALE); + const prescaler: u8 = @as(u8, 1) << @backingInt(regs.MCFGR1.read().PRESCALE); regs.MCFGR2.modify_one("BUSIDLE", @intCast(t / ns_per_cycle / prescaler)); } @@ -155,7 +155,7 @@ pub const LP_I2C = enum(u4) { } fn get_n(i2c: LP_I2C) u4 { - return @intFromEnum(i2c); + return @backingInt(i2c); } pub fn get_regs(i2c: LP_I2C) RegTy { @@ -284,7 +284,7 @@ pub const LP_I2C = enum(u4) { defer i2c.set_enabled(enabled); regs.MCCR0.write(.{ .CLKLO = clk_lo, .CLKHI = clk_hi, .SETHOLD = @intCast(sethold), .DATAVD = @intCast(datavd) }); - regs.MCFGR1.modify_one("PRESCALE", @enumFromInt(prescale)); + regs.MCFGR1.modify_one("PRESCALE", @fromBackingInt(prescale)); } /// Computes the current baudrate. @@ -294,7 +294,7 @@ pub const LP_I2C = enum(u4) { const regs = i2c.get_regs(); const MCCR0 = regs.MCCR0.read(); const MCFGR1 = regs.MCFGR1.read(); - const prescale = @intFromEnum(MCFGR1.PRESCALE); + const prescale = @backingInt(MCFGR1.PRESCALE); const clk = i2c.get_flexcomm().get_clock(); const filt_scl: u8 = regs.MCFGR2.read().FILTSCL; @@ -353,7 +353,7 @@ pub const LP_I2C = enum(u4) { pub fn send_start_blocking(i2c: LP_I2C, address: u7, mode: enum(u2) { write = 0, read = 1 }) Error!void { try i2c.wait_for_tx_space(); - i2c.get_regs().MTDR.write(.{ .DATA = (@as(u8, address) << 1) | @intFromEnum(mode), .CMD = .GENERATE_START_AND_TRANSMIT_ADDRESS_IN_DATA_7_THROUGH_0 }); + i2c.get_regs().MTDR.write(.{ .DATA = (@as(u8, address) << 1) | @backingInt(mode), .CMD = .GENERATE_START_AND_TRANSMIT_ADDRESS_IN_DATA_7_THROUGH_0 }); } /// Sends a I2C stop. Blocks until the stop command has been sent. @@ -481,14 +481,14 @@ pub const LP_I2C = enum(u4) { } pub fn i2c_device(i2c: LP_I2C) I2C_Device { - return .{ .ptr = @ptrFromInt(@intFromEnum(i2c)), .vtable = &.{ .readv_fn = readv, .writev_fn = writev, .writev_then_readv_fn = writev_then_readv } }; + return .{ .ptr = @ptrFromInt(@backingInt(i2c)), .vtable = &.{ .readv_fn = readv, .writev_fn = writev, .writev_then_readv_fn = writev_then_readv } }; } }; // TODO: check for reserved addresses fn writev(d: *anyopaque, addr: I2C_Device.Address, datagrams: []const []const u8) I2C_Device.Error!void { - const dev: LP_I2C = @enumFromInt(@intFromPtr(d)); - const message: LP_I2C.I2C_Msg = .{ .address = @intFromEnum(addr), .flags = .{ .direction = .write }, .chunks = .{ .write = datagrams } }; + const dev: LP_I2C = @fromBackingInt(@intFromPtr(d)); + const message: LP_I2C.I2C_Msg = .{ .address = @backingInt(addr), .flags = .{ .direction = .write }, .chunks = .{ .write = datagrams } }; dev.transfer_blocking(&.{message}) catch |err| switch (err) { LP_I2C.Error.UnexpectedNack, LP_I2C.Error.FifoError, LP_I2C.Error.BusBusy, LP_I2C.Error.ArbitrationLost => { std.log.debug("ew: {}\n", .{err}); @@ -498,8 +498,8 @@ fn writev(d: *anyopaque, addr: I2C_Device.Address, datagrams: []const []const u8 }; } fn readv(d: *anyopaque, addr: I2C_Device.Address, datagrams: []const []u8) I2C_Device.Error!usize { - const dev: LP_I2C = @enumFromInt(@intFromPtr(d)); - const message: LP_I2C.I2C_Msg = .{ .address = @intFromEnum(addr), .flags = .{ .direction = .write }, .chunks = .{ .write = datagrams } }; + const dev: LP_I2C = @fromBackingInt(@intFromPtr(d)); + const message: LP_I2C.I2C_Msg = .{ .address = @backingInt(addr), .flags = .{ .direction = .write }, .chunks = .{ .write = datagrams } }; dev.transfer_blocking(&.{message}) catch |err| switch (err) { LP_I2C.Error.UnexpectedNack, LP_I2C.Error.FifoError, LP_I2C.Error.BusBusy, LP_I2C.Error.ArbitrationLost => { std.log.debug("er: {}\n", .{err}); @@ -517,8 +517,8 @@ fn writev_then_readv( write_chunks: []const []const u8, read_chunks: []const []u8, ) I2C_Device.Error!void { - const dev: LP_I2C = @enumFromInt(@intFromPtr(d)); - const messages: []const LP_I2C.I2C_Msg = &.{ .{ .address = @intFromEnum(addr), .flags = .{ .direction = .write }, .chunks = .{ .write = write_chunks } }, .{ .address = @intFromEnum(addr), .flags = .{ .direction = .read }, .chunks = .{ .read = read_chunks } } }; + const dev: LP_I2C = @fromBackingInt(@intFromPtr(d)); + const messages: []const LP_I2C.I2C_Msg = &.{ .{ .address = @backingInt(addr), .flags = .{ .direction = .write }, .chunks = .{ .write = write_chunks } }, .{ .address = @backingInt(addr), .flags = .{ .direction = .read }, .chunks = .{ .read = read_chunks } } }; dev.transfer_blocking(messages) catch |err| switch (err) { LP_I2C.Error.UnexpectedNack, LP_I2C.Error.FifoError, LP_I2C.Error.BusBusy, LP_I2C.Error.ArbitrationLost => { std.log.debug("erw: {}\n", .{err}); diff --git a/port/nxp/mcx/src/mcxn947/hal/flexcomm/LP_UART.zig b/port/nxp/mcx/src/mcxn947/hal/flexcomm/LP_UART.zig index 592eac7b9..1a6bdcbc1 100644 --- a/port/nxp/mcx/src/mcxn947/hal/flexcomm/LP_UART.zig +++ b/port/nxp/mcx/src/mcxn947/hal/flexcomm/LP_UART.zig @@ -55,7 +55,7 @@ pub const LP_UART = enum(u4) { pub fn init(interface: u4, config: Config) ConfigError!LP_UART { FlexComm.num(interface).init(.UART); - const uart: LP_UART = @enumFromInt(interface); + const uart: LP_UART = @fromBackingInt(interface); const regs = uart.get_regs(); uart.reset(); _ = uart.disable(); @@ -67,7 +67,7 @@ pub const LP_UART = enum(u4) { var ctrl = std.mem.zeroes(@TypeOf(regs.CTRL).underlying_type); ctrl.M7 = if (config.data_mode == .@"7bit") .DATA7 else .NO_EFFECT; ctrl.PE = if (config.parity != .none) .ENABLED else .DISABLED; - ctrl.PT = if (@intFromEnum(config.parity) & 1 == 0) .EVEN else .ODD; + ctrl.PT = if (@backingInt(config.parity) & 1 == 0) .EVEN else .ODD; ctrl.M = if (config.data_mode == .@"9bit") .DATA9 else .DATA8; ctrl.TXINV = if (config.tx_invert) .INVERTED else .NOT_INVERTED; ctrl.IDLECFG = .IDLE_2; // TODO: make this configurable ? @@ -188,7 +188,7 @@ pub const LP_UART = enum(u4) { var baud = regs.BAUD.read(); baud.SBR = best_sbr; - baud.OSR = @enumFromInt(best_osr - 1); + baud.OSR = @fromBackingInt(best_osr - 1); baud.BOTHEDGE = if (best_osr <= 7) .ENABLED else .DISABLED; regs.BAUD.write(baud); } @@ -199,7 +199,7 @@ pub const LP_UART = enum(u4) { const regs = uart.get_regs(); const baud = regs.BAUD.read(); - var osr: u32 = @intFromEnum(baud.OSR); + var osr: u32 = @backingInt(baud.OSR); if (osr == 1 or osr == 2) unreachable; // reserved baudrates if (osr == 0) osr = 15; osr += 1; @@ -207,7 +207,7 @@ pub const LP_UART = enum(u4) { } fn get_n(uart: LP_UART) u4 { - return @intFromEnum(uart); + return @backingInt(uart); } pub fn get_regs(uart: LP_UART) RegTy { @@ -215,7 +215,7 @@ pub const LP_UART = enum(u4) { } pub fn get_flexcomm(uart: LP_UART) FlexComm { - return FlexComm.num(@intFromEnum(uart)); + return FlexComm.num(@backingInt(uart)); } fn can_write(uart: LP_UART) bool { diff --git a/port/nxp/mcx/src/mcxn947/hal/gpio.zig b/port/nxp/mcx/src/mcxn947/hal/gpio.zig index dce1d4e95..345f9e64b 100644 --- a/port/nxp/mcx/src/mcxn947/hal/gpio.zig +++ b/port/nxp/mcx/src/mcxn947/hal/gpio.zig @@ -8,7 +8,7 @@ pub const GPIO = enum(u8) { /// Get a GPIO pin. Does not check whether the pin is available. // TODO: check unavailable pins pub fn num(comptime n: u3, comptime pin: u5) GPIO { - return @enumFromInt(@as(u8, n) << 5 | pin); + return @fromBackingInt(@as(u8, n) << 5 | pin); } /// Init the GPIO by releasing an eventual reset and enabling its clock. @@ -55,7 +55,7 @@ pub const GPIO = enum(u8) { pub fn set_direction(gpio: GPIO, direction: Direction) void { const regs = gpio.get_regs(); const old: u32 = regs.PDDR.raw; - const new = @as(u32, @intFromEnum(direction)) << gpio.get_pin(); + const new = @as(u32, @backingInt(direction)) << gpio.get_pin(); regs.PDDR.write_raw((old & ~gpio.get_mask()) | new); } @@ -72,11 +72,11 @@ pub const GPIO = enum(u8) { } fn get_n(gpio: GPIO) u3 { - return @intCast(@intFromEnum(gpio) >> 5); + return @intCast(@backingInt(gpio) >> 5); } fn get_pin(gpio: GPIO) u5 { - return @intCast(@intFromEnum(gpio) & 0x1f); + return @intCast(@backingInt(gpio) & 0x1f); } fn get_mask(gpio: GPIO) u32 { @@ -84,7 +84,7 @@ pub const GPIO = enum(u8) { } fn get_module(gpio: GPIO) syscon.Module { - return @enumFromInt(@intFromEnum(syscon.Module.GPIO0) + gpio.get_n()); + return @fromBackingInt(@backingInt(syscon.Module.GPIO0) + gpio.get_n()); } }; diff --git a/port/nxp/mcx/src/mcxn947/hal/pin.zig b/port/nxp/mcx/src/mcxn947/hal/pin.zig index 93c141e90..af2e91bdf 100644 --- a/port/nxp/mcx/src/mcxn947/hal/pin.zig +++ b/port/nxp/mcx/src/mcxn947/hal/pin.zig @@ -15,15 +15,15 @@ pub const Pin = enum(u8) { pub fn num(port: u8, pin: u5) Pin { @import("std").debug.assert(port <= 5); - return @enumFromInt((port << 5) | pin); + return @fromBackingInt((port << 5) | pin); } pub fn get_port(pin: Pin) hal.Port { - return hal.Port.num(@intCast(@intFromEnum(pin) >> 5)); + return hal.Port.num(@intCast(@backingInt(pin) >> 5)); } pub fn get_n(pin: Pin) u5 { - return @truncate(@intFromEnum(pin)); + return @truncate(@backingInt(pin)); } /// Apply a config to a pin (see `Pin.configure`). diff --git a/port/nxp/mcx/src/mcxn947/hal/port.zig b/port/nxp/mcx/src/mcxn947/hal/port.zig index a608525cf..ab1558111 100644 --- a/port/nxp/mcx/src/mcxn947/hal/port.zig +++ b/port/nxp/mcx/src/mcxn947/hal/port.zig @@ -16,16 +16,16 @@ pub const Port = enum(u3) { /// `n` must be at most 5 (inclusive). pub fn num(n: u3) Port { assert(n <= 5); - return @enumFromInt(n); + return @fromBackingInt(n); } /// Returns the port's index. pub fn get_n(port: Port) u3 { - return @intFromEnum(port); + return @backingInt(port); } fn get_module(port: Port) syscon.Module { - return @enumFromInt(@intFromEnum(syscon.Module.PORT0) + port.get_n()); + return @fromBackingInt(@backingInt(syscon.Module.PORT0) + port.get_n()); } /// Init the port by releasing an eventual reset and enabling its clock. diff --git a/port/nxp/mcx/src/mcxn947/hal/syscon.zig b/port/nxp/mcx/src/mcxn947/hal/syscon.zig index 22f4afaf8..be12ca72e 100644 --- a/port/nxp/mcx/src/mcxn947/hal/syscon.zig +++ b/port/nxp/mcx/src/mcxn947/hal/syscon.zig @@ -190,14 +190,14 @@ pub const Module = enum(u7) { /// /// This index is the same for `AHBCLKCTRLn` and `PRESETCTRLn` registers. fn cc(module: Module) u2 { - return @intCast(@intFromEnum(module) >> 5); + return @intCast(@backingInt(module) >> 5); } /// Returns the offset of the module in the corresponding control register. /// /// This offset is the same for `AHBCLKCTRLn` and `PRESETCTRLn` registers. fn offset(module: Module) u5 { - return @truncate(@intFromEnum(module)); + return @truncate(@backingInt(module)); } /// Whether a module is reserved (in both `AHBCLKCTRLn` and `PRESETCTRLn` registers). diff --git a/port/raspberrypi/rp2xxx/src/cpus/hazard3.zig b/port/raspberrypi/rp2xxx/src/cpus/hazard3.zig index 6f44c6e9c..c10266dc1 100644 --- a/port/raspberrypi/rp2xxx/src/cpus/hazard3.zig +++ b/port/raspberrypi/rp2xxx/src/cpus/hazard3.zig @@ -54,14 +54,14 @@ pub const interrupt = struct { pub const core = riscv32_common.utilities.interrupt.CoreImpl(CoreInterrupt); pub fn is_enabled(int: ExternalInterrupt) bool { - const num: u7 = @intFromEnum(int); + const num: u7 = @backingInt(int); const index: u3 = @intCast(num >> 4); const mask: u16 = @as(u16, 1) << @as(u4, @intCast(num & 0xf)); return csr.meiea.read_set(.{ .index = index }).window & mask != 0; } pub fn enable(int: ExternalInterrupt) void { - const num: u7 = @intFromEnum(int); + const num: u7 = @backingInt(int); const index: u3 = @intCast(num >> 4); const mask: u16 = @as(u16, 1) << @as(u4, @intCast(num & 0xf)); csr.meiea.set(.{ @@ -71,7 +71,7 @@ pub const interrupt = struct { } pub fn disable(int: ExternalInterrupt) void { - const num: u7 = @intFromEnum(int); + const num: u7 = @backingInt(int); const index: u3 = @intCast(num >> 4); const mask: u16 = @as(u16, 1) << @as(u4, @intCast(num & 0xf)); csr.meiea.clear(.{ @@ -81,21 +81,21 @@ pub const interrupt = struct { } pub fn is_pending(int: ExternalInterrupt) bool { - const num: u7 = @intFromEnum(int); + const num: u7 = @backingInt(int); const index: u3 = @intCast(num >> 4); const mask: u16 = @as(u16, 1) << @as(u4, @intCast(num & 0xf)); return csr.meipa.read_set(.{ .index = index }).window & mask != 0; } pub fn set_pending(int: ExternalInterrupt) void { - const num: u7 = @intFromEnum(int); + const num: u7 = @backingInt(int); const index: u3 = @intCast(num >> 4); const mask: u16 = @as(u16, 1) << @as(u4, @intCast(num & 0xf)); csr.meifa.set(.{ .index = index, .window = mask }); } pub fn clear_pending(int: ExternalInterrupt) void { - const num: u7 = @intFromEnum(int); + const num: u7 = @backingInt(int); const index: u3 = @intCast(num >> 4); const mask: u16 = @as(u16, 1) << @as(u4, @intCast(num & 0xf)); csr.meifa.clear(.{ .index = index, .window = mask }); @@ -108,21 +108,21 @@ pub const interrupt = struct { }; pub fn set_priority(int: ExternalInterrupt, priority: Priority) void { - const num: u7 = @intFromEnum(int); + const num: u7 = @backingInt(int); const index: u5 = @intCast(num >> 2); const shift: u4 = @intCast(4 * (num & 0x4)); - const set_mask: u16 = @as(u16, @intFromEnum(priority)) << shift; + const set_mask: u16 = @as(u16, @backingInt(priority)) << shift; const clear_mask: u16 = @as(u16, 0xf) << shift; csr.meipra.clear(.{ .index = index, .window = clear_mask }); csr.meipra.set(.{ .index = index, .window = set_mask }); } pub fn get_priority(int: ExternalInterrupt) Priority { - const num: u7 = @intFromEnum(int); + const num: u7 = @backingInt(int); const index: u5 = @intCast(num >> 2); const shift: u4 = @intCast(4 * (num & 0x4)); const mask: u16 = @as(u16, 0xf) << shift; - return @enumFromInt((csr.meipra.read_set(.{ .index = index }).window & mask) >> shift); + return @fromBackingInt((csr.meipra.read_set(.{ .index = index }).window & mask) >> shift); } }; diff --git a/port/raspberrypi/rp2xxx/src/hal/adc.zig b/port/raspberrypi/rp2xxx/src/hal/adc.zig index 879bb5bb1..74cc7936f 100644 --- a/port/raspberrypi/rp2xxx/src/hal/adc.zig +++ b/port/raspberrypi/rp2xxx/src/hal/adc.zig @@ -21,7 +21,7 @@ pub const Error = error{ /// temp_sensor is not valid because you can refer to it by name. pub fn input(n: u2) Input { - return @as(Input, @enumFromInt(n)); + return @as(Input, @fromBackingInt(n)); } /// Enable the ADC controller. @@ -77,13 +77,13 @@ pub fn apply(config: Config) void { /// Select analog input for next conversion. pub fn select_input(in: Input) void { - ADC.CS.modify(.{ .AINSEL = @intFromEnum(in) }); + ADC.CS.modify(.{ .AINSEL = @backingInt(in) }); } /// Get the currently selected analog input. pub fn get_selected_input() Input { const cs = ADC.SC.read(); - return @as(Input, @enumFromInt(cs.AINSEL)); + return @as(Input, @fromBackingInt(cs.AINSEL)); } /// For RP2040 and RP2350A, the values are: @@ -113,7 +113,7 @@ pub const Input = if (has_rp2350b) pub fn get_gpio_pin(in: Input) gpio.Pin { return switch (in) { - else => gpio.num(@as(u9, @intFromEnum(in)) + 40), + else => gpio.num(@as(u9, @backingInt(in)) + 40), .temp_sensor => @panic("temp_sensor doesn't have a pin"), }; } @@ -133,7 +133,7 @@ else pub fn get_gpio_pin(in: Input) gpio.Pin { return switch (in) { - else => gpio.num(@as(u5, @intFromEnum(in)) + 26), + else => gpio.num(@as(u5, @backingInt(in)) + 26), .temp_sensor => @panic("temp_sensor doesn't have a pin"), }; } diff --git a/port/raspberrypi/rp2xxx/src/hal/clocks/common.zig b/port/raspberrypi/rp2xxx/src/hal/clocks/common.zig index 52f049750..891d15023 100644 --- a/port/raspberrypi/rp2xxx/src/hal/clocks/common.zig +++ b/port/raspberrypi/rp2xxx/src/hal/clocks/common.zig @@ -111,7 +111,7 @@ pub fn GeneratorImpl(Generator: type, Source: type, IntegerDivisorType: type) ty const CTRL_AUX_SRC_MASK = @as(u32, 0x1e0); pub fn get_regs(generator: Generator) *volatile Regs { - return &generators[@intFromEnum(generator)]; + return &generators[@backingInt(generator)]; } pub fn has_glitchless_mux(generator: Generator) bool { diff --git a/port/raspberrypi/rp2xxx/src/hal/cyw43.zig b/port/raspberrypi/rp2xxx/src/hal/cyw43.zig index 44558b82c..fd44b93fc 100644 --- a/port/raspberrypi/rp2xxx/src/hal/cyw43.zig +++ b/port/raspberrypi/rp2xxx/src/hal/cyw43.zig @@ -94,6 +94,6 @@ pub const gpio = struct { /// Set a GPIO pin high or low pub fn put(pin: Pin, value: bool) void { if (!state.initialized) return; - state.runner.wifi().gpio_set(@intFromEnum(pin), value) catch {}; + state.runner.wifi().gpio_set(@backingInt(pin), value) catch {}; } }; diff --git a/port/raspberrypi/rp2xxx/src/hal/cyw43439_pio_spi.zig b/port/raspberrypi/rp2xxx/src/hal/cyw43439_pio_spi.zig index 1e377f9a7..179b91c23 100644 --- a/port/raspberrypi/rp2xxx/src/hal/cyw43439_pio_spi.zig +++ b/port/raspberrypi/rp2xxx/src/hal/cyw43439_pio_spi.zig @@ -32,7 +32,7 @@ const cyw43spi_program = blk: { }; fn pin_num(pin: hal.gpio.Pin) u5 { - return @truncate(@intFromEnum(pin)); + return @truncate(@backingInt(pin)); } const Self = @This(); @@ -163,7 +163,7 @@ fn dma_read(self: *Self, data: []u32) void { .enable = true, .read_increment = false, .write_increment = true, - .dreq = @enumFromInt(@intFromEnum(self.pio) * @as(u6, 8) + @intFromEnum(self.sm) + 4), + .dreq = @fromBackingInt(@backingInt(self.pio) * @as(u6, 8) + @backingInt(self.sm) + 4), }); ch.wait_for_finish_blocking(); } @@ -177,7 +177,7 @@ fn dma_write(self: *Self, data: []const u32) void { .enable = true, .read_increment = true, .write_increment = false, - .dreq = @enumFromInt(@intFromEnum(self.pio) * @as(u6, 8) + @intFromEnum(self.sm)), + .dreq = @fromBackingInt(@backingInt(self.pio) * @as(u6, 8) + @backingInt(self.sm)), }); ch.wait_for_finish_blocking(); } diff --git a/port/raspberrypi/rp2xxx/src/hal/cyw43_pio_spi.zig b/port/raspberrypi/rp2xxx/src/hal/cyw43_pio_spi.zig index 08fe53b9b..354659071 100644 --- a/port/raspberrypi/rp2xxx/src/hal/cyw43_pio_spi.zig +++ b/port/raspberrypi/rp2xxx/src/hal/cyw43_pio_spi.zig @@ -226,11 +226,11 @@ pub const CYW43_PIO_SPI = struct { } inline fn get_pio_tx_dreq(self: *Self) hal.dma.Dreq { - return @enumFromInt(@intFromEnum(self.pio) * @as(u6, 8) + @intFromEnum(self.sm)); + return @fromBackingInt(@backingInt(self.pio) * @as(u6, 8) + @backingInt(self.sm)); } inline fn get_pio_rx_dreq(self: *Self) hal.dma.Dreq { - return @enumFromInt(@intFromEnum(self.pio) * @as(u6, 8) + @intFromEnum(self.sm) + 4); + return @fromBackingInt(@backingInt(self.pio) * @as(u6, 8) + @backingInt(self.sm) + 4); } /// CYW43_SPI interface implementation diff --git a/port/raspberrypi/rp2xxx/src/hal/dma.zig b/port/raspberrypi/rp2xxx/src/hal/dma.zig index 88ca5773f..1e55a8fba 100644 --- a/port/raspberrypi/rp2xxx/src/hal/dma.zig +++ b/port/raspberrypi/rp2xxx/src/hal/dma.zig @@ -20,7 +20,7 @@ const MaskType = @Int(.unsigned, num_channels); pub fn channel(n: u4) Channel { assert(n < num_channels); - return @enumFromInt(n); + return @fromBackingInt(n); } pub fn claim_unused_channel() ?Channel { @@ -58,21 +58,21 @@ pub const Channel = enum(u4) { _, pub fn claim(chan: Channel) ChannelError!void { - if (!claimed_channels.set(@intFromEnum(chan))) + if (!claimed_channels.set(@backingInt(chan))) return ChannelError.AlreadyClaimed; } pub fn unclaim(chan: Channel) void { - const result = claimed_channels.reset(@intFromEnum(chan)); + const result = claimed_channels.reset(@backingInt(chan)); std.debug.assert(result); } pub fn is_claimed(chan: Channel) bool { - return claimed_channels.test_bit(@intFromEnum(chan)) == 1; + return claimed_channels.test_bit(@backingInt(chan)) == 1; } pub fn mask(chan: Channel) MaskType { - return @as(MaskType, 1) << @intFromEnum(chan); + return @as(MaskType, 1) << @backingInt(chan); } pub const Regs = extern struct { @@ -102,7 +102,7 @@ pub const Channel = enum(u4) { pub inline fn get_regs(chan: Channel) *volatile Regs { const regs = @as(*volatile [num_channels]Regs, @ptrCast(&DMA.CH0_READ_ADDR)); - return ®s[@intFromEnum(chan)]; + return ®s[@backingInt(chan)]; } pub const TransferConfig = struct { @@ -142,7 +142,7 @@ pub const Channel = enum(u4) { .INCR_READ = @intFromBool(config.read_increment), .INCR_WRITE = @intFromBool(config.write_increment), .TREQ_SEL = config.dreq, - .CHAIN_TO = @intFromEnum(chain_to), + .CHAIN_TO = @backingInt(chain_to), .HIGH_PRIORITY = @intFromBool(config.high_priority), }); } else { @@ -152,7 +152,7 @@ pub const Channel = enum(u4) { .INCR_READ = @intFromBool(config.read_increment), .INCR_WRITE = @intFromBool(config.write_increment), .TREQ_SEL = config.dreq, - .CHAIN_TO = @intFromEnum(chain_to), + .CHAIN_TO = @backingInt(chain_to), .HIGH_PRIORITY = @intFromBool(config.high_priority), }); } @@ -343,31 +343,31 @@ pub const Channel = enum(u4) { pub fn set_irq0_enabled(chan: Channel, enabled: bool) void { if (enabled) { const inte0_set = hw.set_alias_raw(&DMA.INTE0); - inte0_set.* = @as(u32, 1) << @intFromEnum(chan); + inte0_set.* = @as(u32, 1) << @backingInt(chan); } else { const inte0_clear = hw.clear_alias_raw(&DMA.INTE0); - inte0_clear.* = @as(u32, 1) << @intFromEnum(chan); + inte0_clear.* = @as(u32, 1) << @backingInt(chan); } } pub fn set_irq1_enabled(chan: Channel, enabled: bool) void { if (enabled) { const inte1_set = hw.set_alias_raw(&DMA.INTE1); - inte1_set.* = @as(u32, 1) << @intFromEnum(chan); + inte1_set.* = @as(u32, 1) << @backingInt(chan); } else { const inte1_clear = hw.clear_alias_raw(&DMA.INTE1); - inte1_clear.* = @as(u32, 1) << @intFromEnum(chan); + inte1_clear.* = @as(u32, 1) << @backingInt(chan); } } pub fn acknowledge_irq0(chan: Channel) void { const ints0_set = hw.set_alias_raw(&DMA.INTS0); - ints0_set.* = @as(u32, 1) << @intFromEnum(chan); + ints0_set.* = @as(u32, 1) << @backingInt(chan); } pub fn acknowledge_irq1(chan: Channel) void { const ints1_set = hw.set_alias_raw(&DMA.INTS1); - ints1_set.* = @as(u32, 1) << @intFromEnum(chan); + ints1_set.* = @as(u32, 1) << @backingInt(chan); } pub fn is_busy(chan: Channel) bool { diff --git a/port/raspberrypi/rp2xxx/src/hal/drivers.zig b/port/raspberrypi/rp2xxx/src/hal/drivers.zig index 18ffcd4f2..72ebfc6eb 100644 --- a/port/raspberrypi/rp2xxx/src/hal/drivers.zig +++ b/port/raspberrypi/rp2xxx/src/hal/drivers.zig @@ -412,7 +412,7 @@ pub const GPIO_Device = struct { } pub fn read(dio: GPIO_Device) ReadError!State { - return @enumFromInt(dio.pin.read()); + return @fromBackingInt(dio.pin.read()); } const vtable = Digital_IO.VTable{ @@ -603,7 +603,7 @@ pub const WiFi = struct { 0 => @ptrCast(&IO_BANK0.PROC0_INTE0), else => @ptrCast(&IO_BANK0.PROC1_INTE0), }; - const pin_num = @intFromEnum(pin); + const pin_num = @backingInt(pin); const bits: u4 = @truncate(ints_base[pin_num >> 3] & 0xF); const events: hal.gpio.IrqEvents = @bitCast(bits); return events; diff --git a/port/raspberrypi/rp2xxx/src/hal/flash.zig b/port/raspberrypi/rp2xxx/src/hal/flash.zig index d3448753f..2c65730e7 100644 --- a/port/raspberrypi/rp2xxx/src/hal/flash.zig +++ b/port/raspberrypi/rp2xxx/src/hal/flash.zig @@ -109,7 +109,7 @@ export fn _range_erase(offset: u32, count: u32) linksection(".ram_text") void { rom.connect_internal_flash(); rom.flash_exit_xip(); - rom.flash_range_erase(offset, count, BLOCK_SIZE, @intFromEnum(Command.block_erase)); + rom.flash_range_erase(offset, count, BLOCK_SIZE, @backingInt(Command.block_erase)); rom.flash_flush_cache(); boot2.flash_enable_xip(); @@ -213,7 +213,7 @@ pub fn id() [id_data_len]u8 { var tx_buf: [id_total_len]u8 = undefined; var rx_buf: [id_total_len]u8 = undefined; - tx_buf[0] = @intFromEnum(Command.ruid_cmd); + tx_buf[0] = @backingInt(Command.ruid_cmd); cmd(&tx_buf, &rx_buf); id_buf = undefined; diff --git a/port/raspberrypi/rp2xxx/src/hal/gpio.zig b/port/raspberrypi/rp2xxx/src/hal/gpio.zig index 4cb8a9102..e56a634ef 100644 --- a/port/raspberrypi/rp2xxx/src/hal/gpio.zig +++ b/port/raspberrypi/rp2xxx/src/hal/gpio.zig @@ -84,18 +84,18 @@ pub fn num(n: u9) Pin { }, } - return @enumFromInt(n); + return @fromBackingInt(n); } pub const mask = switch (chip) { .RP2040 => struct { pub fn mask(m: u30) Mask { - return @enumFromInt(m); + return @fromBackingInt(m); } }.mask, .RP2350 => struct { pub fn mask(m: u48) Mask { - return @enumFromInt(m); + return @fromBackingInt(m); } }.mask, }; @@ -106,7 +106,7 @@ pub const Mask = _, pub fn set_function(self: Mask, function: Function) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u5, @intCast(i)); if (0 != raw_mask & (@as(u32, 1) << bit)) @@ -115,7 +115,7 @@ pub const Mask = } pub fn set_direction(self: Mask, direction: Direction) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); switch (direction) { .out => SIO.GPIO_OE_SET.raw = raw_mask, .in => SIO.GPIO_OE_CLR.raw = raw_mask, @@ -123,7 +123,7 @@ pub const Mask = } pub fn set_pull(self: Mask, pull: Pull) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u5, @intCast(i)); if (0 != raw_mask & (@as(u32, 1) << bit)) @@ -132,7 +132,7 @@ pub const Mask = } pub fn set_slew_rate(self: Mask, slew_rate: SlewRate) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u5, @intCast(i)); if (0 != raw_mask & (@as(u32, 1) << bit)) @@ -141,7 +141,7 @@ pub const Mask = } pub fn set_schmitt_trigger_enabled(self: Mask, enabled: bool) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u5, @intCast(i)); if (0 != raw_mask & (@as(u32, 1) << bit)) @@ -150,7 +150,7 @@ pub const Mask = } pub fn set_drive_strength(self: Mask, drive_strength: DriveStrength) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u5, @intCast(i)); if (0 != raw_mask & (@as(u32, 1) << bit)) @@ -159,26 +159,26 @@ pub const Mask = } pub fn put(self: Mask, value: u32) void { - SIO.GPIO_OUT_XOR.raw = (SIO.GPIO_OUT.raw ^ value) & @intFromEnum(self); + SIO.GPIO_OUT_XOR.raw = (SIO.GPIO_OUT.raw ^ value) & @backingInt(self); } pub fn read(self: Mask) u32 { - return SIO.GPIO_IN.raw & @intFromEnum(self); + return SIO.GPIO_IN.raw & @backingInt(self); } }, .RP2350 => enum(u48) { _, fn lower_32_mask(self: Mask) u32 { - return @truncate(@intFromEnum(self)); + return @truncate(@backingInt(self)); } fn upper_16_mask(self: Mask) u16 { - return @truncate(@intFromEnum(self) >> 32); + return @truncate(@backingInt(self) >> 32); } pub fn set_function(self: Mask, function: Function) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u6, @intCast(i)); if (0 != raw_mask & (@as(u48, 1) << bit)) @@ -202,7 +202,7 @@ pub const Mask = } pub fn set_pull(self: Mask, pull: Pull) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u6, @intCast(i)); if (0 != raw_mask & (@as(u48, 1) << bit)) @@ -211,7 +211,7 @@ pub const Mask = } pub fn set_slew_rate(self: Mask, slew_rate: SlewRate) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u6, @intCast(i)); if (0 != raw_mask & (@as(u48, 1) << bit)) @@ -220,7 +220,7 @@ pub const Mask = } pub fn set_schmitt_trigger_enabled(self: Mask, enabled: bool) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u6, @intCast(i)); if (0 != raw_mask & (@as(u48, 1) << bit)) @@ -229,7 +229,7 @@ pub const Mask = } pub fn set_drive_strength(self: Mask, drive_strength: DriveStrength) void { - const raw_mask = @intFromEnum(self); + const raw_mask = @backingInt(self); for (0..@bitSizeOf(Mask)) |i| { const bit = @as(u6, @intCast(i)); if (0 != raw_mask & (@as(u48, 1) << bit)) @@ -304,26 +304,26 @@ pub const Pin = enum(u6) { pub inline fn get_regs(gpio: Pin) *volatile Regs { const regs = @as(RegsArray, @ptrCast(&IO_BANK0.GPIO0_STATUS)); - return ®s[@intFromEnum(gpio)]; + return ®s[@backingInt(gpio)]; } pub inline fn get_pads_reg(gpio: Pin) *volatile PadsReg { const regs = @as(PadsRegArray, @ptrCast(&PADS_BANK0.GPIO0)); - return ®s[@intFromEnum(gpio)]; + return ®s[@backingInt(gpio)]; } /// Only relevant for RP2350 which has 48 GPIOs pub inline fn is_upper(gpio: Pin) bool { - return @intFromEnum(gpio) > 31; + return @backingInt(gpio) > 31; } pub inline fn mask(gpio: Pin) u32 { const bitshift_val: u5 = switch (chip) { - .RP2040 => @intCast(@intFromEnum(gpio)), + .RP2040 => @intCast(@backingInt(gpio)), .RP2350 => // There are seperate copies of registers for GPIO32->47 on RP2350, // so upper GPIOs should present as bits 0 -> 15 - if (gpio.is_upper()) @intCast(@intFromEnum(gpio) - 32) else @intCast(@intFromEnum(gpio)), + if (gpio.is_upper()) @intCast(@backingInt(gpio) - 32) else @intCast(@backingInt(gpio)), }; return @as(u32, 1) << bitshift_val; @@ -502,7 +502,7 @@ pub const Pin = enum(u6) { acknowledge_irq(gpio, events); // Enable or disable interrupts for events on this pin - const pin_num = @intFromEnum(gpio); + const pin_num = @backingInt(gpio); // Divide pin_num by 8 - 8 GPIOs per register. const en_reg: *volatile u32 = &irq_inte_base[pin_num >> 3]; if (enable) { @@ -516,7 +516,7 @@ pub const Pin = enum(u6) { /// Acknowledge rise/fall IRQ events - should be called during IRQ callback to avoid re-entry pub fn acknowledge_irq(gpio: Pin, events: IrqEvents) void { const base_intr: [*]volatile u32 = @ptrCast(&IO_BANK0.INTR0); - const pin_num = @intFromEnum(gpio); + const pin_num = @backingInt(gpio); base_intr[pin_num >> 3] = events.get_mask(gpio); } }; @@ -576,7 +576,7 @@ pub const IrqEvents = packed struct(u4) { /// Returns an appropriately shifted mask of the events represented /// This is generally only needed for low level - direct register - access pub fn get_mask(events: IrqEvents, pin: Pin) u32 { - const pin_num = @intFromEnum(pin); + const pin_num = @backingInt(pin); const shift: u5 = @intCast(4 * (pin_num % 8)); // cannot overflow - max of 7 const events_b: u4 = @bitCast(events); return @as(u32, @intCast(events_b)) << shift; diff --git a/port/raspberrypi/rp2xxx/src/hal/i2c.zig b/port/raspberrypi/rp2xxx/src/hal/i2c.zig index 3ab806324..97314ebd9 100644 --- a/port/raspberrypi/rp2xxx/src/hal/i2c.zig +++ b/port/raspberrypi/rp2xxx/src/hal/i2c.zig @@ -158,10 +158,10 @@ test "i2c.translate_baudrate" { } pub const instance = struct { - pub const I2C0: I2C = @as(I2C, @enumFromInt(0)); - pub const I2C1: I2C = @as(I2C, @enumFromInt(1)); + pub const I2C0: I2C = @as(I2C, @fromBackingInt(0)); + pub const I2C1: I2C = @as(I2C, @fromBackingInt(1)); pub fn num(instance_number: u1) I2C { - return @as(I2C, @enumFromInt(instance_number)); + return @as(I2C, @fromBackingInt(instance_number)); } }; @@ -179,7 +179,7 @@ pub const I2C = enum(u1) { _, pub inline fn get_regs(i2c: I2C) *volatile I2cRegs { - return switch (@intFromEnum(i2c)) { + return switch (@backingInt(i2c)) { 0 => I2C0, 1 => I2C1, }; @@ -217,10 +217,10 @@ pub const I2C = enum(u1) { .IC_RESTART_EN = if (config.repeated_start) .ENABLED else .DISABLED, .IC_SLAVE_DISABLE = .SLAVE_DISABLED, .TX_EMPTY_CTRL = .ENABLED, - .IC_10BITADDR_SLAVE = @enumFromInt(0), - .IC_10BITADDR_MASTER = @enumFromInt(0), - .STOP_DET_IFADDRESSED = @enumFromInt(0), - .RX_FIFO_FULL_HLD_CTRL = @enumFromInt(0), + .IC_10BITADDR_SLAVE = @fromBackingInt(0), + .IC_10BITADDR_MASTER = @fromBackingInt(0), + .STOP_DET_IFADDRESSED = @fromBackingInt(0), + .RX_FIFO_FULL_HLD_CTRL = @fromBackingInt(0), .STOP_DET_IF_MASTER_ACTIVE = 0, }); @@ -294,7 +294,7 @@ pub const I2C = enum(u1) { i2c.disable(); i2c.get_regs().IC_TAR.write(.{ - .IC_TAR = @intFromEnum(addr), + .IC_TAR = @backingInt(addr), .GC_OR_START = .GENERAL_CALL, .SPECIAL = .DISABLED, }); @@ -350,14 +350,14 @@ pub const I2C = enum(u1) { pub fn tx(i2c: I2C) dma.DMA_WriteTarget { return .{ - .dreq = if (@intFromEnum(i2c) == 0) .i2c0_tx else .i2c1_tx, + .dreq = if (@backingInt(i2c) == 0) .i2c0_tx else .i2c1_tx, .addr = @intFromPtr(&i2c.get_regs().IC_DATA_CMD), }; } pub fn rx(i2c: I2C) dma.DMA_ReadTarget { return .{ - .dreq = if (@intFromEnum(i2c) == 0) .i2c0_rx else .i2c1_rx, + .dreq = if (@backingInt(i2c) == 0) .i2c0_rx else .i2c1_rx, .addr = @intFromPtr(&i2c.get_regs().IC_DATA_CMD), }; } @@ -399,8 +399,8 @@ pub const I2C = enum(u1) { var iter = write_vec.iterator(); while (iter.next_element()) |element| { regs.IC_DATA_CMD.write(.{ - .RESTART = @enumFromInt(0), - .STOP = @enumFromInt(@intFromBool(element.last)), + .RESTART = @fromBackingInt(0), + .STOP = @fromBackingInt(@intFromBool(element.last)), .CMD = .WRITE, .DAT = element.value, @@ -475,8 +475,8 @@ pub const I2C = enum(u1) { var iter = read_vec.iterator(); while (iter.next_element_ptr()) |element| { regs.IC_DATA_CMD.write(.{ - .RESTART = @enumFromInt(0), - .STOP = @enumFromInt(@intFromBool(element.last)), + .RESTART = @fromBackingInt(0), + .STOP = @fromBackingInt(@intFromBool(element.last)), .CMD = .READ, .DAT = 0, @@ -545,8 +545,8 @@ pub const I2C = enum(u1) { var write_iter = write_vec.iterator(); while (write_iter.next_element()) |element| { regs.IC_DATA_CMD.write(.{ - .RESTART = @enumFromInt(0), - .STOP = @enumFromInt(0), + .RESTART = @fromBackingInt(0), + .STOP = @fromBackingInt(0), .CMD = .WRITE, .DAT = element.value, @@ -576,8 +576,8 @@ pub const I2C = enum(u1) { var read_iter = read_vec.iterator(); recv_loop: while (read_iter.next_element_ptr()) |element| { regs.IC_DATA_CMD.write(.{ - .RESTART = @enumFromInt(@intFromBool(element.first)), - .STOP = @enumFromInt(@intFromBool(element.last)), + .RESTART = @fromBackingInt(@intFromBool(element.first)), + .STOP = @fromBackingInt(@intFromBool(element.last)), .CMD = .READ, .DAT = 0, diff --git a/port/raspberrypi/rp2xxx/src/hal/i2c_slave.zig b/port/raspberrypi/rp2xxx/src/hal/i2c_slave.zig index a3fdd9145..4a3cc5d33 100644 --- a/port/raspberrypi/rp2xxx/src/hal/i2c_slave.zig +++ b/port/raspberrypi/rp2xxx/src/hal/i2c_slave.zig @@ -106,7 +106,7 @@ pub fn open(self: *Self, addr: i2c.Address, transfer_buffer: []u8, rxCallback: R self.disable(); - self.regs.IC_SAR.write(.{ .IC_SAR = @intFromEnum(addr) }); + self.regs.IC_SAR.write(.{ .IC_SAR = @backingInt(addr) }); self.regs.IC_CON.write(.{ .MASTER_MODE = .DISABLED, @@ -191,7 +191,7 @@ inline fn enable(self: *Self) void { /// pub fn set_slave_address(self: *Self, addr: u7) void { self.disable(); - self.regs.IC_SAR.write(.{ .IC_SAR = @enumFromInt(addr) }); + self.regs.IC_SAR.write(.{ .IC_SAR = @fromBackingInt(addr) }); self.enable(); } diff --git a/port/raspberrypi/rp2xxx/src/hal/pins.zig b/port/raspberrypi/rp2xxx/src/hal/pins.zig index 94c6b2b64..7a9416d3c 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pins.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pins.zig @@ -803,14 +803,14 @@ pub const GlobalConfiguration = struct { const cname = pin_config.name orelse field_name; if (@hasField(T, cname)) { if (pin_config.function == .SIO) { - @field(ret, cname) = gpio.num(@intFromEnum(@field(Pin, field_name))); + @field(ret, cname) = gpio.num(@backingInt(@field(Pin, field_name))); } else if (pin_config.function.is_pwm()) { @field(ret, cname) = pwm.Pwm{ .slice_number = pin_config.function.pwm_slice(), .channel = pin_config.function.pwm_channel(), }; } else if (pin_config.function.is_adc()) { - @field(ret, cname) = @as(adc.Input, @enumFromInt(switch (pin_config.function) { + @field(ret, cname) = @as(adc.Input, @fromBackingInt(@intCast(switch (pin_config.function) { .ADC0 => 0, .ADC1 => 1, .ADC2 => 2, @@ -820,7 +820,7 @@ pub const GlobalConfiguration = struct { .ADC6 => 6, .ADC7 => 7, else => unreachable, - })); + }))); } } } @@ -839,8 +839,8 @@ pub const GlobalConfiguration = struct { comptime { for (@typeInfo(GlobalConfiguration).@"struct".field_names) |field_name| if (@field(config, field_name)) |pin_config| { - const gpio_num = @intFromEnum(@field(Pin, field_name)); - if (0 == function_table[@intFromEnum(pin_config.function)][gpio_num]) + const gpio_num = @backingInt(@field(Pin, field_name)); + if (0 == function_table[@backingInt(pin_config.function)][gpio_num]) @compileError(comptimePrint("{s} cannot be configured for {}", .{ field_name, pin_config.function })); if (pin_config.function == .SIO) { @@ -877,7 +877,7 @@ pub const GlobalConfiguration = struct { inline for (@typeInfo(GlobalConfiguration).@"struct".field_names) |field_name| { if (@field(config, field_name)) |pin_config| { - const gpio_pin = gpio.num(@intFromEnum(@field(Pin, field_name))); + const gpio_pin = gpio.num(@backingInt(@field(Pin, field_name))); const func = pin_config.function; if (func == .SIO) { @@ -905,8 +905,8 @@ pub const GlobalConfiguration = struct { } else if (comptime func == .HSTX) { gpio_pin.set_function(.hstx); } else if (comptime func.is_adc()) { - const adc_num = @intFromEnum(func) - @intFromEnum(Function.ADC0); - adc.Input.configure_gpio_pin(@as(adc.Input, @enumFromInt(adc_num))); + const adc_num = @backingInt(func) - @backingInt(Function.ADC0); + adc.Input.configure_gpio_pin(@as(adc.Input, @fromBackingInt(adc_num))); } else if (comptime func == .QMI_CS1) { gpio_pin.set_function(.gpck); // Shares function number with clock XIP_CTRL.CTRL.modify(.{ @@ -915,7 +915,7 @@ pub const GlobalConfiguration = struct { } else { @compileError(std.fmt.comptimePrint("Unimplemented pin function. Please implement setting pin function {s} for GPIO {}", .{ @tagName(func), - @intFromEnum(gpio_pin), + @backingInt(gpio_pin), })); } } @@ -929,7 +929,7 @@ pub const GlobalConfiguration = struct { inline for (@typeInfo(GlobalConfiguration).@"struct".field_names) |field_name| if (@field(config, field_name)) |pin_config| { - const gpio_num = @intFromEnum(@field(Pin, field_name)); + const gpio_num = @backingInt(@field(Pin, field_name)); if (pin_config.pull) |pull| { gpio.num(gpio_num).set_pull(pull); } diff --git a/port/raspberrypi/rp2xxx/src/hal/pio.zig b/port/raspberrypi/rp2xxx/src/hal/pio.zig index fe39ef8a3..f375a3ade 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pio.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pio.zig @@ -40,7 +40,7 @@ pub fn num(n: u2) Pio { }, } - return @as(Pio, @enumFromInt(n)); + return @as(Pio, @fromBackingInt(n)); } pub const Pio = chip_specific.Pio; diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/assembler/encoder.zig b/port/raspberrypi/rp2xxx/src/hal/pio/assembler/encoder.zig index 5df0a3bb2..a8d6d495f 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pio/assembler/encoder.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pio/assembler/encoder.zig @@ -401,7 +401,7 @@ pub fn Encoder(comptime chip: Chip, comptime options: Options) type { .clear = @intFromBool(irq.clear), .wait = @intFromBool(irq.wait), .index = @as(u3, irq_num), - .idxmode = @intFromEnum(irq.idxmode), + .idxmode = @backingInt(irq.idxmode), }, }; }, diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/assembler/tokenizer.zig b/port/raspberrypi/rp2xxx/src/hal/pio/assembler/tokenizer.zig index 0e2a12e30..91f6aa609 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pio/assembler/tokenizer.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pio/assembler/tokenizer.zig @@ -2146,7 +2146,7 @@ test "tokenize.instr.irq.relnext" { .clear = false, .wait = false, .num = 2, - .idxmode = @intFromEnum(Token(.RP2350).Instruction.Irq.IdxMode.next), + .idxmode = @backingInt(Token(.RP2350).Instruction.Irq.IdxMode.next), }, tokens.get(0)); } diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/common.zig b/port/raspberrypi/rp2xxx/src/hal/pio/common.zig index 315492531..2917ac66c 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pio/common.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pio/common.zig @@ -106,7 +106,7 @@ pub fn PinMapping(comptime Count: type) type { high: gpio.Pin, fn count(range: @This()) Count { - return @intCast(@intFromEnum(range.high) - @intFromEnum(range.low) + 1); + return @intCast(@backingInt(range.high) - @backingInt(range.low) + 1); } }; } @@ -134,7 +134,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { if (offset + program.instructions.len > 32) return false; - const used_mask = UsedInstructionSpace(chip).val[@intFromEnum(self)]; + const used_mask = UsedInstructionSpace(chip).val[@backingInt(self)]; const program_mask = (program.get_mask() << offset); // We can add the program if the masks don't overlap, if there is @@ -172,7 +172,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { }; const program_mask = program.get_mask(); - UsedInstructionSpace(chip).val[@intFromEnum(self)] |= program_mask << offset; + UsedInstructionSpace(chip).val[@backingInt(self)] |= program_mask << offset; } /// Public functions will need to lock independently, so only exposing this function for now @@ -189,12 +189,12 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { // TODO: const lock = hw.Lock.claim() // defer lock.unlock(); - const claimed_mask = ClaimedStateMachines(chip).val[@intFromEnum(self)]; + const claimed_mask = ClaimedStateMachines(chip).val[@backingInt(self)]; return for (0..4) |i| { const sm_mask = (@as(u4, 1) << @as(u2, @intCast(i))); if (0 == (claimed_mask & sm_mask)) { - ClaimedStateMachines(chip).val[@intFromEnum(self)] |= sm_mask; - break @as(StateMachine, @enumFromInt(i)); + ClaimedStateMachines(chip).val[@backingInt(self)] |= sm_mask; + break @as(StateMachine, @fromBackingInt(i)); } } else error.NoSpace; } @@ -211,13 +211,13 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { const pio_regs = self.get_regs(); // SM0_CLKDIV is the first one, which is why we are taking its address const sm_regs = @as(*volatile [4]StateMachine.Regs, @ptrCast(&pio_regs.SM0_CLKDIV)); - return &sm_regs[@intFromEnum(sm)]; + return &sm_regs[@backingInt(sm)]; } pub fn get_irq_regs(self: EnumType, irq: Irq) *volatile Irq.Regs { const pio_regs = self.get_regs(); const irq_regs = @as(*volatile [2]Irq.Regs, @ptrCast(&pio_regs.IRQ0_INTE)); - return &irq_regs[@intFromEnum(irq)]; + return &irq_regs[@backingInt(irq)]; } pub fn sm_set_clkdiv(self: EnumType, sm: StateMachine, options: ClkDivOptions) void { @@ -232,7 +232,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { } fn pin_to_index(self: EnumType, pin: gpio.Pin) error{InvalidPin}!u5 { - const index = @intFromEnum(pin); + const index = @backingInt(pin); const base = self.get_gpio_base(); if (index < base or index >= base + 32) { return error.InvalidPin; @@ -287,14 +287,14 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { for (0..count) |counter| { const pin_config: PinMappingOptions = .{ - .set = .single(@enumFromInt(@intFromEnum(base) + counter)), + .set = .single(@fromBackingInt(@backingInt(base) + counter)), }; try sm_set_pin_mappings(self, sm, pin_config, false); self.sm_exec(sm, .{ .payload = .{ .set = .{ - .data = @intFromEnum(dir), + .data = @backingInt(dir), .destination = .pindirs, }, }, @@ -313,7 +313,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { for (0..count) |counter| { const pin_config: PinMappingOptions = .{ - .set = .single(@enumFromInt(@intFromEnum(base) + counter)), + .set = .single(@fromBackingInt(@backingInt(base) + counter)), }; try sm_set_pin_mappings(self, sm, pin_config, false); self.sm_exec(sm, .{ @@ -334,13 +334,13 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { pub fn sm_get_rx_fifo(self: EnumType, sm: StateMachine) *volatile u32 { const regs = self.get_regs(); const fifos = @as(*volatile [4]u32, @ptrCast(®s.RXF0)); - return &fifos[@intFromEnum(sm)]; + return &fifos[@backingInt(sm)]; } pub fn sm_is_rx_fifo_empty(self: EnumType, sm: StateMachine) bool { const regs = self.get_regs(); const rxempty = regs.FSTAT.read().RXEMPTY; - return (rxempty & (@as(u4, 1) << @intFromEnum(sm))) != 0; + return (rxempty & (@as(u4, 1) << @backingInt(sm))) != 0; } pub fn sm_blocking_read(self: EnumType, sm: StateMachine) u32 { @@ -356,13 +356,13 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { pub fn sm_is_tx_fifo_full(self: EnumType, sm: StateMachine) bool { const regs = self.get_regs(); const txfull = regs.FSTAT.read().TXFULL; - return (txfull & (@as(u4, 1) << @intFromEnum(sm))) != 0; + return (txfull & (@as(u4, 1) << @backingInt(sm))) != 0; } pub fn sm_get_tx_fifo(self: EnumType, sm: StateMachine) *volatile u32 { const regs = self.get_regs(); const fifos = @as(*volatile [4]u32, @ptrCast(®s.TXF0)); - return &fifos[@intFromEnum(sm)]; + return &fifos[@backingInt(sm)]; } /// this function writes to the TX FIFO without checking that it's @@ -383,16 +383,16 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { var value = regs.CTRL.read(); if (enabled) - value.SM_ENABLE |= @as(u4, 1) << @intFromEnum(sm) + value.SM_ENABLE |= @as(u4, 1) << @backingInt(sm) else - value.SM_ENABLE &= ~(@as(u4, 1) << @intFromEnum(sm)); + value.SM_ENABLE &= ~(@as(u4, 1) << @backingInt(sm)); regs.CTRL.write(value); } pub fn sm_clear_debug(self: EnumType, sm: StateMachine) void { const regs = self.get_regs(); - const mask: u4 = (@as(u4, 1) << @intFromEnum(sm)); + const mask: u4 = (@as(u4, 1) << @backingInt(sm)); // write 1 to clear this register regs.FDEBUG.modify(.{ @@ -404,7 +404,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { } pub fn sm_fifo_level(self: EnumType, sm: StateMachine, fifo: Fifo) u4 { - const snum = @intFromEnum(sm); + const snum = @backingInt(sm); const offset: u5 = switch (fifo) { .tx => 0, .rx => 4, @@ -420,7 +420,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { sm: StateMachine, source: Irq.Source, ) u5 { - return (@as(u5, 4) * @intFromEnum(source)) + @intFromEnum(sm); + return (@as(u5, 4) * @backingInt(source)) + @backingInt(sm); } pub fn sm_clear_interrupt( self: EnumType, @@ -446,7 +446,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { } pub fn sm_restart(self: EnumType, sm: StateMachine) void { - const mask: u4 = (@as(u4, 1) << @intFromEnum(sm)); + const mask: u4 = (@as(u4, 1) << @backingInt(sm)); const regs = self.get_regs(); regs.CTRL.modify(.{ .SM_RESTART = mask, @@ -454,7 +454,7 @@ pub fn PioImpl(EnumType: type, chip: Chip) type { } pub fn sm_clkdiv_restart(self: EnumType, sm: StateMachine) void { - const mask: u4 = (@as(u4, 1) << @intFromEnum(sm)); + const mask: u4 = (@as(u4, 1) << @backingInt(sm)); const regs = self.get_regs(); regs.CTRL.modify(.{ .CLKDIV_RESTART = mask, diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/rp2040.zig b/port/raspberrypi/rp2xxx/src/hal/pio/rp2040.zig index df1ab1775..8396c759f 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pio/rp2040.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pio/rp2040.zig @@ -52,8 +52,8 @@ pub const Pio = enum(u1) { .AUTOPUSH = @intFromBool(options.autopush), .AUTOPULL = @intFromBool(options.autopull), - .IN_SHIFTDIR = @intFromEnum(options.in_shiftdir), - .OUT_SHIFTDIR = @intFromEnum(options.out_shiftdir), + .IN_SHIFTDIR = @backingInt(options.in_shiftdir), + .OUT_SHIFTDIR = @backingInt(options.out_shiftdir), .PUSH_THRESH = options.push_threshold, .PULL_THRESH = options.pull_threshold, diff --git a/port/raspberrypi/rp2xxx/src/hal/pio/rp2350.zig b/port/raspberrypi/rp2xxx/src/hal/pio/rp2350.zig index 0eacfa785..3d7f2e9be 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pio/rp2350.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pio/rp2350.zig @@ -57,8 +57,8 @@ pub const Pio = enum(u2) { .AUTOPUSH = @intFromBool(options.autopush), .AUTOPULL = @intFromBool(options.autopull), - .IN_SHIFTDIR = @intFromEnum(options.in_shiftdir), - .OUT_SHIFTDIR = @intFromEnum(options.out_shiftdir), + .IN_SHIFTDIR = @backingInt(options.in_shiftdir), + .OUT_SHIFTDIR = @backingInt(options.out_shiftdir), .PUSH_THRESH = options.push_threshold, .PULL_THRESH = options.pull_threshold, diff --git a/port/raspberrypi/rp2xxx/src/hal/pwm.zig b/port/raspberrypi/rp2xxx/src/hal/pwm.zig index 3b63c40a8..dd3e4d96b 100644 --- a/port/raspberrypi/rp2xxx/src/hal/pwm.zig +++ b/port/raspberrypi/rp2xxx/src/hal/pwm.zig @@ -24,7 +24,7 @@ pub const Slice = enum(u32) { /// Access slice specific registers directly. pub fn get_registers(self: Slice) *volatile Regs { - return get_regs(@intFromEnum(self)); + return get_regs(@backingInt(self)); } /// Set the wrap value for the slice. This is the number of pwm clock @@ -33,17 +33,17 @@ pub const Slice = enum(u32) { /// Parameters: /// wrap - the wrap value pub fn set_wrap(self: Slice, wrap: u16) void { - set_slice_wrap(@intFromEnum(self), wrap); + set_slice_wrap(@backingInt(self), wrap); } /// Enable the slice. pub fn enable(self: Slice) void { - get_regs(@intFromEnum(self)).csr.modify(.{ .EN = 1 }); + get_regs(@backingInt(self)).csr.modify(.{ .EN = 1 }); } /// Disable the slice pub fn disable(self: Slice) void { - get_regs(@intFromEnum(self)).csr.modify(.{ .EN = 0 }); + get_regs(@backingInt(self)).csr.modify(.{ .EN = 0 }); } /// Set the slice to phase correct mode. @@ -51,7 +51,7 @@ pub const Slice = enum(u32) { /// Parameters: /// phase_correct - true to enable phase correct mode, false to disable it pub fn set_phase_correct(self: Slice, phase_correct: bool) void { - set_slice_phase_correct(@intFromEnum(self), phase_correct); + set_slice_phase_correct(@backingInt(self), phase_correct); } /// Set the slice to a clock divider mode. @@ -59,7 +59,7 @@ pub const Slice = enum(u32) { /// Parameters: /// div - configuration of the clock divider pub fn set_clk_div(self: Slice, div: FractionalDivider) void { - set_slice_clk_div(@intFromEnum(self), div); + set_slice_clk_div(@backingInt(self), div); } }; @@ -69,7 +69,7 @@ pub const Slice = enum(u32) { pub fn get_pwm(pinnum: u9) Pwm { const tmp_num: u32 = if (pinnum > 15) pinnum - 16 else pinnum; const slice_num: u32 = tmp_num >> 1; - const chan: Channel = @enumFromInt(tmp_num & 1); + const chan: Channel = @fromBackingInt(tmp_num & 1); return .{ .channel = chan, .slice_number = slice_num }; } @@ -104,7 +104,7 @@ pub const Pwm = struct { /// Get the slice that this pwm instance is on. pub fn slice(self: Pwm) Slice { - return @enumFromInt(self.slice_number); + return @fromBackingInt(self.slice_number); } }; @@ -165,7 +165,7 @@ pub fn set_slice_clk_div(slice: u32, div: FractionalDivider) void { /// mode - the clock divider mode pub fn set_slice_clk_div_mode(slice: u32, mode: ClkDivMode) void { get_regs(slice).csr.modify(.{ - .DIVMODE = @intFromEnum(mode), + .DIVMODE = @backingInt(mode), }); } diff --git a/port/raspberrypi/rp2xxx/src/hal/rom/rp2040.zig b/port/raspberrypi/rp2xxx/src/hal/rom/rp2040.zig index c66fd86da..9f96d0bbf 100644 --- a/port/raspberrypi/rp2xxx/src/hal/rom/rp2040.zig +++ b/port/raspberrypi/rp2xxx/src/hal/rom/rp2040.zig @@ -4,13 +4,13 @@ const rom = @import("../rom.zig"); pub inline fn lookup_data(code: Data) ?*const anyopaque { const rom_table_lookup: *const LookupFn = @ptrFromInt(ROM_TABLE_LOOKUP.*); const data_table: *const anyopaque = @ptrFromInt(DATA_TABLE.*); - return rom_table_lookup(data_table, @intFromEnum(code)); + return rom_table_lookup(data_table, @backingInt(code)); } pub inline fn lookup_function(code: Function) ?*const anyopaque { const rom_table_lookup: *const LookupFn = @ptrFromInt(ROM_TABLE_LOOKUP.*); const func_table: *const anyopaque = @ptrFromInt(FUNC_TABLE.*); - return rom_table_lookup(func_table, @intFromEnum(code)); + return rom_table_lookup(func_table, @backingInt(code)); } // TODO: maybe support copying the table to ram as well? @@ -21,7 +21,7 @@ pub inline fn lookup_float_function(f: SoftFloatFunction) *const anyopaque { } const table: [*]const usize = @ptrCast(@alignCast(rom.lookup_and_cache_data(.soft_float_table))); - return @ptrFromInt(table[@intFromEnum(f) / 4]); + return @ptrFromInt(table[@backingInt(f) / 4]); } pub inline fn lookup_double_function(f: SoftDoubleFunction) *const anyopaque { @@ -29,7 +29,7 @@ pub inline fn lookup_double_function(f: SoftDoubleFunction) *const anyopaque { @panic("function not available in this bootrom version"); const table: [*]const usize = @ptrCast(@alignCast(rom.lookup_and_cache_data(.soft_double_table))); - return @ptrFromInt(table[@intFromEnum(f) / 4]); + return @ptrFromInt(table[@backingInt(f) / 4]); } pub const Data = enum(u16) { diff --git a/port/raspberrypi/rp2xxx/src/hal/rom/rp2350.zig b/port/raspberrypi/rp2xxx/src/hal/rom/rp2350.zig index e3583df1e..abd53fb87 100644 --- a/port/raspberrypi/rp2xxx/src/hal/rom/rp2350.zig +++ b/port/raspberrypi/rp2xxx/src/hal/rom/rp2350.zig @@ -8,7 +8,7 @@ pub inline fn lookup_data(data: Data) ?*const anyopaque { ROM_DATA_LOOKUP_A1.* else ROM_DATA_LOOKUP_A2.*); - return @ptrCast(@alignCast(rom_data_lookup_fn(@intFromEnum(data), 0x40))); // 0x40 = data mask + return @ptrCast(@alignCast(rom_data_lookup_fn(@backingInt(data), 0x40))); // 0x40 = data mask } /// Asserts that a function with the given code exists in the bootrom. @@ -22,7 +22,7 @@ pub inline fn lookup_function(function: Function) ?*const anyopaque { .arm => if (is_secure_mode()) masks.arm_s else masks.arm_ns, .riscv => masks.riscv, }; - return @ptrCast(@alignCast(rom_table_lookup_fn(@intFromEnum(function), mask))); + return @ptrCast(@alignCast(rom_table_lookup_fn(@backingInt(function), mask))); } fn is_secure_mode() bool { diff --git a/port/raspberrypi/rp2xxx/src/hal/rtc.zig b/port/raspberrypi/rp2xxx/src/hal/rtc.zig index 567463460..d777e989d 100644 --- a/port/raspberrypi/rp2xxx/src/hal/rtc.zig +++ b/port/raspberrypi/rp2xxx/src/hal/rtc.zig @@ -67,7 +67,7 @@ pub inline fn set_datetime(datetime: DateTime) void { .DAY = datetime.day, }); RTC.SETUP_1.modify(.{ - .DOTW = @intFromEnum(datetime.day_of_week), + .DOTW = @backingInt(datetime.day_of_week), .HOUR = datetime.hour, .MIN = datetime.minute, .SEC = datetime.second, @@ -94,7 +94,7 @@ pub inline fn get_datetime() DateTime { .year = RTC1.YEAR, .month = RTC1.MONTH, .day = RTC1.DAY, - .day_of_week = @enumFromInt(RTC0.DOTW), + .day_of_week = @fromBackingInt(RTC0.DOTW), .hour = RTC0.HOUR, .minute = RTC0.MIN, .second = RTC0.SEC, @@ -158,7 +158,7 @@ pub const alarm = struct { } if (config.day_of_week) |day_of_week| { - irq_setup1.DOTW = @intFromEnum(day_of_week); + irq_setup1.DOTW = @backingInt(day_of_week); irq_setup1.DOTW_ENA = 1; } if (config.hour) |hour| { diff --git a/port/raspberrypi/rp2xxx/src/hal/spi.zig b/port/raspberrypi/rp2xxx/src/hal/spi.zig index 7c0c7ea5f..60f12326c 100644 --- a/port/raspberrypi/rp2xxx/src/hal/spi.zig +++ b/port/raspberrypi/rp2xxx/src/hal/spi.zig @@ -60,10 +60,10 @@ pub const Config = struct { }; pub const instance = struct { - pub const SPI0: SPI = @as(SPI, @enumFromInt(0)); - pub const SPI1: SPI = @as(SPI, @enumFromInt(1)); + pub const SPI0: SPI = @as(SPI, @fromBackingInt(0)); + pub const SPI1: SPI = @as(SPI, @fromBackingInt(1)); pub fn num(instance_number: u1) SPI { - return @as(SPI, @enumFromInt(instance_number)); + return @as(SPI, @fromBackingInt(instance_number)); } }; @@ -86,7 +86,7 @@ pub const SPI = enum(u1) { _, pub inline fn get_regs(spi: SPI) *volatile SpiRegs { - return switch (@intFromEnum(spi)) { + return switch (@backingInt(spi)) { 0 => SPI0_reg, 1 => SPI1_reg, }; @@ -106,16 +106,16 @@ pub const SPI = enum(u1) { .motorola => |ff| { spi_regs.SSPCR0.modify(.{ .FRF = 0b00, - .DSS = @intFromEnum(config.data_width), - .SPO = @intFromEnum(ff.clock_polarity), - .SPH = @intFromEnum(ff.clock_phase), + .DSS = @backingInt(config.data_width), + .SPO = @backingInt(ff.clock_polarity), + .SPH = @backingInt(ff.clock_phase), }); }, .texas_instruments => { spi_regs.SSPCR0.modify(.{ .FRF = 0b01, - .DSS = @intFromEnum(config.data_width), + .DSS = @backingInt(config.data_width), .SPO = 0, .SPH = 0, }); @@ -124,7 +124,7 @@ pub const SPI = enum(u1) { .ns_microwire => { spi_regs.SSPCR0.modify(.{ .FRF = 0b10, - .DSS = @intFromEnum(config.data_width), + .DSS = @backingInt(config.data_width), .SPO = 0, .SPH = 0, }); @@ -188,14 +188,14 @@ pub const SPI = enum(u1) { pub fn tx(spi: SPI) dma.DMA_WriteTarget { return .{ - .dreq = if (@intFromEnum(spi) == 0) .spi0_tx else .spi1_tx, + .dreq = if (@backingInt(spi) == 0) .spi0_tx else .spi1_tx, .addr = @intFromPtr(&spi.get_regs().SSPDR), }; } pub fn rx(spi: SPI) dma.DMA_ReadTarget { return .{ - .dreq = if (@intFromEnum(spi) == 0) .spi0_rx else .spi1_rx, + .dreq = if (@backingInt(spi) == 0) .spi0_rx else .spi1_rx, .addr = @intFromPtr(&spi.get_regs().SSPDR), }; } diff --git a/port/raspberrypi/rp2xxx/src/hal/system_timer.zig b/port/raspberrypi/rp2xxx/src/hal/system_timer.zig index dc1455ad9..9c04a93e6 100644 --- a/port/raspberrypi/rp2xxx/src/hal/system_timer.zig +++ b/port/raspberrypi/rp2xxx/src/hal/system_timer.zig @@ -4,7 +4,7 @@ const compatibility = @import("compatibility.zig"); pub fn num(n: u1) Timer { if (compatibility.chip == .RP2040) std.debug.assert(n == 0); - return @enumFromInt(n); + return @fromBackingInt(n); } pub const Timer = enum(u1) { @@ -54,7 +54,7 @@ pub const Timer = enum(u1) { /// Clears the interrupt flag for the given alarm. pub fn clear_interrupt(timer: Timer, alarm: Alarm) void { const regs = timer.get_regs(); - regs.INTR.write_raw(@as(u4, 1) << @intFromEnum(alarm)); + regs.INTR.write_raw(@as(u4, 1) << @backingInt(alarm)); } /// Schedules an alarm to be triggered when the low word of the timer @@ -72,16 +72,16 @@ pub const Timer = enum(u1) { /// Stop an alarm before it triggers. pub fn stop_alarm(timer: Timer, alarm: Alarm) void { const regs = timer.get_regs(); - regs.ARMED.write(.{ .ARMED = @as(u4, 1) << @intFromEnum(alarm) }); + regs.ARMED.write(.{ .ARMED = @as(u4, 1) << @backingInt(alarm) }); } pub fn get_regs(timer: Timer) *volatile Regs { return switch (compatibility.chip) { - .RP2040 => switch (@intFromEnum(timer)) { + .RP2040 => switch (@backingInt(timer)) { 0 => microzig.chip.peripherals.TIMER, else => @panic("only timer 0 is available on RP2040"), }, - .RP2350 => switch (@intFromEnum(timer)) { + .RP2350 => switch (@backingInt(timer)) { 0 => microzig.chip.peripherals.TIMER0, 1 => microzig.chip.peripherals.TIMER1, }, diff --git a/port/raspberrypi/rp2xxx/src/hal/time.zig b/port/raspberrypi/rp2xxx/src/hal/time.zig index f3c7c121e..19ed1c596 100644 --- a/port/raspberrypi/rp2xxx/src/hal/time.zig +++ b/port/raspberrypi/rp2xxx/src/hal/time.zig @@ -6,7 +6,7 @@ const system_timer = @import("system_timer.zig"); const timer = system_timer.num(0); pub fn get_time_since_boot() time.Absolute { - return @enumFromInt(timer.read()); + return @fromBackingInt(timer.read()); } pub fn sleep_ms(time_ms: u32) void { diff --git a/port/raspberrypi/rp2xxx/src/hal/uart.zig b/port/raspberrypi/rp2xxx/src/hal/uart.zig index 891ad363d..2b669c32a 100644 --- a/port/raspberrypi/rp2xxx/src/hal/uart.zig +++ b/port/raspberrypi/rp2xxx/src/hal/uart.zig @@ -128,10 +128,10 @@ test "uart.validate_baudrate" { } pub const instance = struct { - pub const UART0: UART = @enumFromInt(0); - pub const UART1: UART = @enumFromInt(1); + pub const UART0: UART = @fromBackingInt(0); + pub const UART1: UART = @fromBackingInt(1); pub fn num(n: u1) UART { - return @enumFromInt(n); + return @fromBackingInt(n); } }; @@ -226,7 +226,7 @@ pub const UART = enum(u1) { } pub inline fn get_regs(uart: UART) *volatile UartRegs { - return switch (@intFromEnum(uart)) { + return switch (@backingInt(uart)) { 0 => UART0_reg, 1 => UART1_reg, }; @@ -301,14 +301,14 @@ pub const UART = enum(u1) { pub fn tx(uart: UART) dma.DMA_WriteTarget { return .{ - .dreq = if (@intFromEnum(uart) == 0) .uart0_tx else .uart1_tx, + .dreq = if (@backingInt(uart) == 0) .uart0_tx else .uart1_tx, .addr = @intFromPtr(&uart.get_regs().UARTDR), }; } pub fn rx(uart: UART) dma.DMA_ReadTarget { return .{ - .dreq = if (@intFromEnum(uart) == 0) .uart0_rx else .uart1_rx, + .dreq = if (@backingInt(uart) == 0) .uart0_rx else .uart1_rx, .addr = @intFromPtr(&uart.get_regs().UARTDR), }; } @@ -388,7 +388,7 @@ pub const UART = enum(u1) { // TODO: Will potentially be modified in a future DMA overhaul pub fn dreq_tx(uart: UART) dma.Dreq { - return switch (@intFromEnum(uart)) { + return switch (@backingInt(uart)) { 0 => .uart0_tx, 1 => .uart1_tx, }; diff --git a/port/raspberrypi/rp2xxx/src/hal/usb.zig b/port/raspberrypi/rp2xxx/src/hal/usb.zig index db0957ba1..98041f2e6 100644 --- a/port/raspberrypi/rp2xxx/src/hal/usb.zig +++ b/port/raspberrypi/rp2xxx/src/hal/usb.zig @@ -146,7 +146,7 @@ pub fn Polled(config: Config) type { // registers, IN being first const ep_num = shift / 2; const ep: usb.types.Endpoint = comptime .{ - .num = @enumFromInt(ep_num), + .num = @fromBackingInt(ep_num), .dir = if (shift % 2 == 0) .In else .Out, }; @@ -273,7 +273,7 @@ pub fn Polled(config: Config) type { const self: *@This() = @fieldParentPtr("interface", itf); - const bufctrl_ptr = &buffer_control[@intFromEnum(ep_num)].in; + const bufctrl_ptr = &buffer_control[@backingInt(ep_num)].in; const ep = self.hardware_endpoint_get_by_address(.in(ep_num)); var hw_buf: []align(1) u8 = ep.data_buffer; @@ -322,7 +322,7 @@ pub fn Polled(config: Config) type { const self: *@This() = @fieldParentPtr("interface", itf); assert(data.len > 0); - const bufctrl = buffer_control[@intFromEnum(ep_num)].out.read(); + const bufctrl = buffer_control[@backingInt(ep_num)].out.read(); const ep = self.hardware_endpoint_get_by_address(.out(ep_num)); var hw_buf: []align(1) u8 = ep.data_buffer[0..bufctrl.LENGTH_0]; for (data) |dst| { @@ -345,7 +345,7 @@ pub fn Polled(config: Config) type { log.debug("listen {t} {}", .{ ep_num, len }); const self: *@This() = @fieldParentPtr("interface", itf); - const bufctrl_ptr = &buffer_control[@intFromEnum(ep_num)].out; + const bufctrl_ptr = &buffer_control[@backingInt(ep_num)].out; var bufctrl = bufctrl_ptr.read(); const ep = self.hardware_endpoint_get_by_address(.out(ep_num)); @@ -394,7 +394,7 @@ pub fn Polled(config: Config) type { } fn hardware_endpoint_get_by_address(self: *@This(), ep: usb.types.Endpoint) *HardwareEndpointData { - return &self.endpoints[@intFromEnum(ep.num)][@intFromEnum(ep.dir)]; + return &self.endpoints[@backingInt(ep.num)][@backingInt(ep.dir)]; } fn ep_open(itf: *usb.DeviceInterface, desc: *const usb.descriptor.Endpoint) void { @@ -407,23 +407,23 @@ pub fn Polled(config: Config) type { const self: *@This() = @fieldParentPtr("interface", itf); - assert(@intFromEnum(desc.endpoint.num) <= config.max_endpoints_count); + assert(@backingInt(desc.endpoint.num) <= config.max_endpoints_count); const ep_hard = self.hardware_endpoint_get_by_address(ep); assert(desc.max_packet_size.into() <= max_supported_packet_size); - buffer_control[@intFromEnum(ep.num)].get(ep.dir).modify(.{ .PID_0 = 1 }); + buffer_control[@backingInt(ep.num)].get(ep.dir).modify(.{ .PID_0 = 1 }); if (ep.num == .ep0) { // ep0 has fixed data buffer ep_hard.data_buffer = rp2xxx_buffers.ep0_buffer0; } else { ep_hard.data_buffer = self.endpoint_alloc(desc) catch unreachable; - endpoint_control[@intFromEnum(ep.num) - 1].get(ep.dir).write(.{ + endpoint_control[@backingInt(ep.num) - 1].get(ep.dir).write(.{ .ENABLE = 1, .INTERRUPT_PER_BUFF = 1, - .ENDPOINT_TYPE = @enumFromInt(@intFromEnum(attr.transfer_type)), + .ENDPOINT_TYPE = @fromBackingInt(@backingInt(attr.transfer_type)), .BUFFER_ADDRESS = rp2xxx_buffers.data_offset(ep_hard.data_buffer), }); } @@ -463,8 +463,8 @@ pub fn ResetDriver(bootsel_activity_led: ?u5, interface_disable_mask: u32) type .num_endpoints = 0, .interface_triple = .from( .VendorSpecific, - @enumFromInt(0x00), - @enumFromInt(0x01), + @fromBackingInt(0x00), + @fromBackingInt(0x01), ), .interface_s = alloc.string(interface_str), } } }; diff --git a/port/stmicro/stm32/build.zig b/port/stmicro/stm32/build.zig index 4fcdf1ccf..8dc27a98b 100644 --- a/port/stmicro/stm32/build.zig +++ b/port/stmicro/stm32/build.zig @@ -85,7 +85,7 @@ pub fn build(b: *std.Build) !void { if (generate) { const stm32_data_generated = b.lazyDependency("stm32-data-generated", .{}) orelse return; - const generate_optimize = .ReleaseSafe; + const generate_optimize: std.lang.Optimize = .safe; const regz_dep = b.dependency("microzig/tools/regz", .{ .optimize = generate_optimize, }); diff --git a/port/stmicro/stm32/src/hals/STM32F103/adc.zig b/port/stmicro/stm32/src/hals/STM32F103/adc.zig index b808bf031..f2ad6a807 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/adc.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/adc.zig @@ -71,7 +71,7 @@ pub const ADC = struct { if (channel > 18) return; //invalid channel, do nothing const regs = self.regs; const smpr_index = if (channel < 10) channel else channel - 10; - const rate: u32 = @intFromEnum(sample_rate); + const rate: u32 = @backingInt(sample_rate); const smpr_val = rate << (smpr_index * 3); if (channel < 10) { regs.SMPR2.raw |= smpr_val; @@ -450,7 +450,7 @@ pub const AdvancedADC = struct { pub fn set_data_alignment(self: *const AdvancedADC, aling: Alignment) void { const regs = self.regs; - regs.CR2.modify(.{ .ALIGN = @intFromEnum(aling) }); //set data alignment + regs.CR2.modify(.{ .ALIGN = @backingInt(aling) }); //set data alignment } pub fn read_flags(self: *const AdvancedADC) Flags { @@ -488,7 +488,7 @@ pub const AdvancedADC = struct { regs.CR1.modify(.{ .EOCIE = @as(u1, if (config.interrupt) 1 else 0) }); const cr2_read = regs.CR2.read(); - const trig_sel: u3 = @intFromEnum(config.trigger); + const trig_sel: u3 = @backingInt(config.trigger); const dma: u1 = @intFromBool(config.dma); if ((cr2_read.DMA != dma) or (cr2_read.EXTTRIG != trig_sel)) regs.CR2.modify(.{ @@ -565,7 +565,7 @@ pub const AdvancedADC = struct { if (channel > 18) return; //invalid channel, do nothing const regs = self.regs; const smpr_index = if (channel < 10) channel else channel - 10; - const rate: u32 = @intFromEnum(sample_rate); + const rate: u32 = @backingInt(sample_rate); const smpr_val = rate << (smpr_index * 3); if (channel < 10) { regs.SMPR2.raw |= smpr_val; @@ -634,7 +634,7 @@ pub const AdvancedADC = struct { pub fn set_trigger(self: *const AdvancedADC, trigger: RegularTrigger) void { const regs = self.regs; - const trig_sel: u3 = @intFromEnum(trigger); + const trig_sel: u3 = @backingInt(trigger); const cr2 = regs.CR2.read(); if (cr2.EXTSEL != trig_sel) { regs.CR2.modify(.{ @@ -701,7 +701,7 @@ pub const AdvancedADC = struct { self.set_injected_offsets(config.offsets); regs.CR2.modify(.{ - .JEXTSEL = @as(u3, @intFromEnum(config.trigger)), + .JEXTSEL = @as(u3, @backingInt(config.trigger)), .JEXTTRIG = trig, }); regs.CR1.modify(.{ .JEOCIE = @as(u1, if (config.interrupt) 1 else 0) }); @@ -805,7 +805,7 @@ pub const AdvancedADC = struct { /// auto injected mode uses internal trigger, so this function will block the auto injected mode. pub fn set_injected_trigger(self: *const AdvancedADC, trigger: InjectedTrigger) void { const regs = self.regs; - const trig_sel: u3 = @intFromEnum(trigger); + const trig_sel: u3 = @backingInt(trigger); if (regs.CR2.read().JEXTSEL != trig_sel) { regs.CR2.modify(.{ .JEXTSEL = trig_sel, @@ -1058,7 +1058,7 @@ pub const AdvancedADC = struct { const max_sample: usize = if (fast) 0 else 2; // 0 == 1.5, 2 == 13.5 //max for fast is 7, max for slow is 14 - const rate: usize = @intFromEnum(config.channel.sample_rate); + const rate: usize = @backingInt(config.channel.sample_rate); if (rate > max_sample) return DualConfigError.InvalidSampleRate; } @@ -1115,7 +1115,7 @@ pub const AdvancedADC = struct { pub fn init(comptime adc: Instance) AdvancedADC { return .{ .regs = enums.get_regs(ADC_Perihperal, adc), - .adc_num = @intFromEnum(adc), + .adc_num = @backingInt(adc), }; } }; diff --git a/port/stmicro/stm32/src/hals/STM32F103/exti.zig b/port/stmicro/stm32/src/hals/STM32F103/exti.zig index 4d5980615..02deb5f37 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/exti.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/exti.zig @@ -60,7 +60,7 @@ pub fn apply_line(config: Config) void { pub fn set_line(line: u4, port: gpio.Port) void { const reg_idx: usize = line / 4; const shift = (@as(u5, line) % 4) * 4; - const port_sel: u32 = @intFromEnum(port); + const port_sel: u32 = @backingInt(port); AFIO.EXTICR[reg_idx].raw &= ~(@as(u32, 0xF) << shift); //clear the current value AFIO.EXTICR[reg_idx].raw |= (port_sel << shift); //set the port value diff --git a/port/stmicro/stm32/src/hals/STM32F103/gpio.zig b/port/stmicro/stm32/src/hals/STM32F103/gpio.zig index e37e340e1..6690e59ef 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/gpio.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/gpio.zig @@ -71,7 +71,7 @@ pub const Pin = enum(usize) { inline fn write_pin_config(gpio: Pin, config: u32) void { const port = gpio.get_port(); - const pin: u4 = @intCast(@intFromEnum(gpio) % 16); + const pin: u4 = @intCast(@backingInt(gpio) % 16); if (pin <= 7) { const offset = @as(u5, pin) << 2; port.CR[0].raw &= ~(@as(u32, 0b1111) << offset); @@ -84,7 +84,7 @@ pub const Pin = enum(usize) { } fn mask(gpio: Pin) u32 { - const pin: u4 = @intCast(@intFromEnum(gpio) % 16); + const pin: u4 = @intCast(@backingInt(gpio) % 16); return @as(u32, 1) << pin; } @@ -96,7 +96,7 @@ pub const Pin = enum(usize) { //NOTE: should invalid pins panic or just be ignored? pub fn get_port(gpio: Pin) *volatile GPIO { - const pin: usize = @divFloor(@intFromEnum(gpio), 16); + const pin: usize = @divFloor(@backingInt(gpio), 16); switch (pin) { 0 => return if (@hasDecl(peripherals, "GPIOA")) peripherals.GPIOA else @panic("Invalid Pin"), 1 => return if (@hasDecl(peripherals, "GPIOB")) peripherals.GPIOB else @panic("Invalid Pin"), @@ -117,14 +117,14 @@ pub const Pin = enum(usize) { } pub inline fn set_input_mode(gpio: Pin, mode: InputMode) void { - const m_mode = @as(u32, @intFromEnum(mode)); + const m_mode = @as(u32, @backingInt(mode)); const config: u32 = m_mode << 2; gpio.write_pin_config(config); } pub inline fn set_output_mode(gpio: Pin, mode: OutputMode, speed: Speed) void { - const s_speed = @as(u32, @intFromEnum(speed)); - const m_mode = @as(u32, @intFromEnum(mode)); + const s_speed = @as(u32, @backingInt(speed)); + const m_mode = @as(u32, @backingInt(mode)); const config: u32 = s_speed + (m_mode << 2); gpio.write_pin_config(config); } @@ -159,20 +159,20 @@ pub const Pin = enum(usize) { } pub fn num(pin: usize) Pin { - return @enumFromInt(pin); + return @fromBackingInt(pin); } pub fn from_port(port: Port, pin: u4) Pin { - const value: usize = pin + (@as(usize, 16) * @intFromEnum(port)); - return @enumFromInt(value); + const value: usize = pin + (@as(usize, 16) * @backingInt(port)); + return @fromBackingInt(value); } }; /// Enables the EVENTOUT Cortex® output on the selected pin. /// NOTE: not available for GPIO F and G pub fn enable_cortex_EVENTOUT(pin: Pin) void { - const port: u3 = @intCast(@divFloor(@intFromEnum(pin), 16)); - const ev_pin: u4 = @intCast(@intFromEnum(pin) % 16); + const port: u3 = @intCast(@divFloor(@backingInt(pin), 16)); + const ev_pin: u4 = @intCast(@backingInt(pin) % 16); AFIO.EVCR.modify(.{ .PIN = ev_pin, @@ -234,19 +234,19 @@ pub fn apply_remap(map: Remap) void { .I2C1 => |val| AFIO.MAPR.modify_one("I2C1_REMAP", @intFromBool(val)), .USART1 => |val| AFIO.MAPR.modify_one("USART1_REMAP", @intFromBool(val)), .USART2 => |val| AFIO.MAPR.modify_one("USART2_REMAP", @intFromBool(val)), - .USART3 => |val| AFIO.MAPR.modify_one("USART3_REMAP", @intFromEnum(val)), - .TIM1 => |val| AFIO.MAPR.modify_one("TIM1_REMAP", @intFromEnum(val)), - .TIM2 => |val| AFIO.MAPR.modify_one("TIM2_REMAP", @intFromEnum(val)), - .TIM3 => |val| AFIO.MAPR.modify_one("TIM3_REMAP", @intFromEnum(val)), + .USART3 => |val| AFIO.MAPR.modify_one("USART3_REMAP", @backingInt(val)), + .TIM1 => |val| AFIO.MAPR.modify_one("TIM1_REMAP", @backingInt(val)), + .TIM2 => |val| AFIO.MAPR.modify_one("TIM2_REMAP", @backingInt(val)), + .TIM3 => |val| AFIO.MAPR.modify_one("TIM3_REMAP", @backingInt(val)), .TIM4 => |val| AFIO.MAPR.modify_one("TIM4_REMAP", @intFromBool(val)), - .CAN => |val| AFIO.MAPR.modify_one("CAN1_REMAP", @intFromEnum(val)), + .CAN => |val| AFIO.MAPR.modify_one("CAN1_REMAP", @backingInt(val)), .PD01 => |val| AFIO.MAPR.modify_one("PD01_REMAP", @intFromBool(val)), .TIM5CH4 => |val| AFIO.MAPR.modify_one("TIM5CH4_IREMAP", @intFromBool(val)), .ADC1_ETRGINJ => |val| AFIO.MAPR.modify_one("ADC1_ETRGINJ_REMAP", @intFromBool(val)), .ADC1_ETRGREG => |val| AFIO.MAPR.modify_one("ADC1_ETRGREG_REMAP", @intFromBool(val)), .ADC2_ETRGINJ => |val| AFIO.MAPR.modify_one("ADC2_ETRGINJ_REMAP", @intFromBool(val)), .ADC2_ETRGREG => |val| AFIO.MAPR.modify_one("ADC2_ETRGREG_REMAP", @intFromBool(val)), - .SWJ => |val| AFIO.MAPR.modify_one("SWJ_CFG", @intFromEnum(val)), + .SWJ => |val| AFIO.MAPR.modify_one("SWJ_CFG", @backingInt(val)), .TIM9_CH1 => |val| AFIO.MAPR2.modify_one("TIM9_REMAP", @intFromBool(val)), .TIM10_CH1 => |val| AFIO.MAPR2.modify_one("TIM10_REMAP", @intFromBool(val)), .TIM11_CH1 => |val| AFIO.MAPR2.modify_one("TIM11_REMAP", @intFromBool(val)), diff --git a/port/stmicro/stm32/src/hals/STM32F103/i2c.zig b/port/stmicro/stm32/src/hals/STM32F103/i2c.zig index 37dc21d8c..05fccba9c 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/i2c.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/i2c.zig @@ -31,7 +31,7 @@ pub const Address = struct { } pub fn from_generic(addr: mdf.base.I2C_Device.Address) Address { - return .{ .addr = @intFromEnum(addr) }; + return .{ .addr = @backingInt(addr) }; } pub fn new_10bits(addr: u10) Address { @@ -209,7 +209,7 @@ pub const I2C = struct { const regs = i2c.regs; const val: u6 = @intCast(config.pclk / 1_000_000); const duty: usize = if (config.enable_duty) 1 else 0; - const mode: F_S = @enumFromInt(@intFromEnum(config.mode)); + const mode: F_S = @fromBackingInt(@backingInt(config.mode)); regs.CR1.modify(.{ .PE = 0 }); i2c.reset(); @@ -220,7 +220,7 @@ pub const I2C = struct { regs.CCR.modify(.{ .CCR = @as(u12, @intCast(CCR)), - .DUTY = @as(DUTY, @enumFromInt(duty)), + .DUTY = @as(DUTY, @fromBackingInt(duty)), .F_S = mode, }); diff --git a/port/stmicro/stm32/src/hals/STM32F103/pins.zig b/port/stmicro/stm32/src/hals/STM32F103/pins.zig index b3ec0fc88..b6d05e6b4 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/pins.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/pins.zig @@ -56,7 +56,7 @@ pub const Pin = enum { pub fn GPIO(comptime port: u3, comptime num: u4, comptime mode: gpio.Mode) type { return switch (mode) { .input => struct { - const pin = gpio.Pin.from_port(@enumFromInt(port), num); + const pin = gpio.Pin.from_port(@fromBackingInt(port), num); pub inline fn read(self: @This()) u1 { _ = self; @@ -64,7 +64,7 @@ pub fn GPIO(comptime port: u3, comptime num: u4, comptime mode: gpio.Mode) type } }, .output => struct { - const pin = gpio.Pin.from_port(@enumFromInt(port), num); + const pin = gpio.Pin.from_port(@fromBackingInt(port), num); pub inline fn put(self: @This(), value: u1) void { _ = self; @@ -89,7 +89,7 @@ pub fn Pins(comptime config: GlobalConfiguration) type { for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { if (@field(port_config, field_name)) |pin_config| { const name: []const u8 = pin_config.name orelse field_name; - const typ: type = GPIO(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name)), pin_config.mode orelse .{ .input = .{.floating} }); + const typ: type = GPIO(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name)), pin_config.mode orelse .{ .input = .{.floating} }); field_names = field_names ++ .{name}; field_types = field_types ++ .{typ}; field_attrs = field_attrs ++ .{Attributes{}}; @@ -160,7 +160,7 @@ pub const GlobalConfiguration = struct { comptime { for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| if (@field(port_config, field_name)) |pin_config| { - const gpio_num = @intFromEnum(@field(Pin, field_name)); + const gpio_num = @backingInt(@field(Pin, field_name)); switch (pin_config.get_mode()) { .input => input_gpios |= 1 << gpio_num, @@ -173,7 +173,7 @@ pub const GlobalConfiguration = struct { const used_gpios = comptime input_gpios | output_gpios; if (used_gpios != 0) { - const offset = @intFromEnum(@field(Port, port_field_name)) + 2; + const offset = @backingInt(@field(Port, port_field_name)) + 2; const bit = @as(u32, 1 << offset); RCC.APB2ENR.raw |= bit; // Delay after setting @@ -182,8 +182,8 @@ pub const GlobalConfiguration = struct { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { if (@field(port_config, field_name)) |pin_config| { - const port = @intFromEnum(@field(Port, port_field_name)); - var pin = gpio.Pin.from_port(@enumFromInt(port), @intFromEnum(@field(Pin, field_name))); + const port = @backingInt(@field(Port, port_field_name)); + var pin = gpio.Pin.from_port(@fromBackingInt(port), @backingInt(@field(Pin, field_name))); pin.set_mode(pin_config.mode.?); } } @@ -191,8 +191,8 @@ pub const GlobalConfiguration = struct { if (input_gpios != 0) { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| if (@field(port_config, field_name)) |pin_config| { - const port = @intFromEnum(@field(Port, port_field_name)); - var pin = gpio.Pin.from_port(@enumFromInt(port), @intFromEnum(@field(Pin, field_name))); + const port = @backingInt(@field(Port, port_field_name)); + var pin = gpio.Pin.from_port(@fromBackingInt(port), @backingInt(@field(Pin, field_name))); const pull = pin_config.pull orelse continue; if (comptime pin_config.get_mode() != .input) @compileError("Only input pins can have pull up/down enabled"); diff --git a/port/stmicro/stm32/src/hals/STM32F103/power.zig b/port/stmicro/stm32/src/hals/STM32F103/power.zig index 0d4322e88..04ae70383 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/power.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/power.zig @@ -39,9 +39,9 @@ pub const PowerConfig = struct { pub inline fn apply(config: PowerConfig) void { pwd.CR.modify(.{ - .PLS = @intFromEnum(config.pvd_threshold), - .PDDS = @as(PDDS, @enumFromInt(@intFromEnum(config.deepsleep_mode))), - .LPDS = @intFromEnum(config.volt_regulator_mode), + .PLS = @backingInt(config.pvd_threshold), + .PDDS = @as(PDDS, @fromBackingInt(@backingInt(config.deepsleep_mode))), + .LPDS = @backingInt(config.volt_regulator_mode), }); pwd.CSR.modify(.{ .EWUP = @intFromBool(config.wakeup_pin) }); } diff --git a/port/stmicro/stm32/src/hals/STM32F103/rcc.zig b/port/stmicro/stm32/src/hals/STM32F103/rcc.zig index 21f70c452..e697c68a7 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/rcc.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/rcc.zig @@ -63,14 +63,14 @@ pub fn apply(comptime config: Tree.Config) ClockInitError!Tree.ClockOutput { } fn apply_internal(config: Tree.OutputConfig) ClockInitError!void { - const latency: flash_v1.LATENCY = @enumFromInt(@intFromEnum(config.FLatency)); + const latency: flash_v1.LATENCY = @fromBackingInt(@backingInt(config.FLatency)); const prefetch = config.flags.PREFETCH_ENABLE; - const apb1: PPRE = @enumFromInt(@intFromEnum(config.APB1CLKDivider)); - const apb2: PPRE = @enumFromInt(@intFromEnum(config.APB2CLKDivider)); - const ahb: HPRE = @enumFromInt(@intFromEnum(config.AHBCLKDivider)); - const adc: ADCPRE = @enumFromInt(@intFromEnum(config.ADCPresc)); - const sys_clk: SW = @enumFromInt(@intFromEnum(config.SYSCLKSource)); - const usb: USBPRE = @enumFromInt(@intFromEnum(config.USBPrescaler)); + const apb1: PPRE = @fromBackingInt(@backingInt(config.APB1CLKDivider)); + const apb2: PPRE = @fromBackingInt(@backingInt(config.APB2CLKDivider)); + const ahb: HPRE = @fromBackingInt(@backingInt(config.AHBCLKDivider)); + const adc: ADCPRE = @fromBackingInt(@backingInt(config.ADCPresc)); + const sys_clk: SW = @fromBackingInt(@backingInt(config.SYSCLKSource)); + const usb: USBPRE = @fromBackingInt(@backingInt(config.USBPrescaler)); secure_enable(); set_flash(latency, prefetch); @@ -83,9 +83,9 @@ fn apply_internal(config: Tree.OutputConfig) ClockInitError!void { } if (config.flags.PLLUsed) { - const source: PLLSRC = @enumFromInt(@intFromEnum(config.PLLSourceVirtual)); - const mul: PLLMUL = @enumFromInt(@intFromEnum(config.PLLMUL)); - const pre_div: PLLXTPRE = @enumFromInt(@intFromEnum(config.HSEDivPLL)); + const source: PLLSRC = @fromBackingInt(@backingInt(config.PLLSourceVirtual)); + const mul: PLLMUL = @fromBackingInt(@backingInt(config.PLLMUL)); + const pre_div: PLLXTPRE = @fromBackingInt(@backingInt(config.HSEDivPLL)); config_pll(source, mul, pre_div); enable_pll(); } else { @@ -107,14 +107,14 @@ fn apply_internal(config: Tree.OutputConfig) ClockInitError!void { set_lsi(config.flags.LSIUsed); if (config.flags.RTCEnable) { - const source: RTCSEL = @enumFromInt(@intFromEnum(config.RTCClockSelection)); + const source: RTCSEL = @fromBackingInt(@backingInt(config.RTCClockSelection)); config_rtc(source); } else { config_rtc(.DISABLE); } if (config.flags.MCOEnable) { - const source: MCOSEL = @enumFromInt(@intFromEnum(config.RCC_MCOSource)); + const source: MCOSEL = @fromBackingInt(@backingInt(config.RCC_MCOSource)); config_mco(source); } else { config_mco(.DISABLE); diff --git a/port/stmicro/stm32/src/hals/STM32F103/time.zig b/port/stmicro/stm32/src/hals/STM32F103/time.zig index c5cc253c9..126a88fe5 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/time.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/time.zig @@ -117,7 +117,7 @@ fn rtc_get_time_since_boot() time.Absolute { const frac = rtc_freq - sec_frac; const us: u64 = (sec * 1_000_000) + (frac * 1_000_000) / rtc_freq; - return @enumFromInt(us); + return @fromBackingInt(us); } fn deinit_timer() void { @@ -132,11 +132,11 @@ fn deinit_timer() void { } fn timer_get_time_since_boot() time.Absolute { - const tim = tim_ctx orelse return @enumFromInt(0); + const tim = tim_ctx orelse return @fromBackingInt(0); const p = microzig.cpu.atomic.load(u32, &period, .acquire); const counter = tim.get_counter(); const ticks = (@as(u64, p) << 15) + @as(u64, counter ^ ((p & 1) << 15)); - return @enumFromInt(ticks); + return @fromBackingInt(ticks); } pub fn TIM_handler() callconv(.c) void { @@ -149,7 +149,7 @@ pub fn TIM_handler() callconv(.c) void { } pub fn get_time_since_boot() time.Absolute { - const callback = get_time orelse return @enumFromInt(0); + const callback = get_time orelse return @fromBackingInt(0); return callback(); } diff --git a/port/stmicro/stm32/src/hals/STM32F103/uart.zig b/port/stmicro/stm32/src/hals/STM32F103/uart.zig index 2cfae299f..faf7f6c50 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/uart.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/uart.zig @@ -167,14 +167,14 @@ pub const UART = struct { fn set_wordbits(uart: *const UART, word: WordBits) void { const regs = uart.regs; regs.CR1.modify(.{ - .M0 = @as(M0, @enumFromInt(@intFromEnum(word))), + .M0 = @as(M0, @fromBackingInt(@backingInt(word))), }); } fn set_stopbits(uart: *const UART, stops: StopBits) void { const regs = uart.regs; regs.CR2.modify(.{ - .STOP = @as(STOP, @enumFromInt(@intFromEnum(stops))), + .STOP = @as(STOP, @fromBackingInt(@backingInt(stops))), }); } @@ -187,7 +187,7 @@ pub const UART = struct { }); }, else => |ps| { - const val: PS = @enumFromInt(@intFromEnum(ps) - 1); + const val: PS = @fromBackingInt(@backingInt(ps) - 1); regs.CR1.modify(.{ .PCE = 1, .PS = val, diff --git a/port/stmicro/stm32/src/hals/STM32F103/usb_internals/usb_ll.zig b/port/stmicro/stm32/src/hals/STM32F103/usb_internals/usb_ll.zig index 6a8d615c5..89fc1f6f9 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/usb_internals/usb_ll.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/usb_internals/usb_ll.zig @@ -91,18 +91,18 @@ pub const Endpoint = struct { pub fn get_pid(self: *const Endpoint, dir: StatusDir) PID { switch (dir) { .RX => { - return @enumFromInt(self.rx_pid); + return @fromBackingInt(self.rx_pid); }, .TX => { - return @enumFromInt(self.tx_pid); + return @fromBackingInt(self.tx_pid); }, } } pub fn force_change(self: *Endpoint, dir: StatusDir, val: PID) PID { switch (dir) { - .RX => self.rx_pid = @intCast(@intFromEnum(val)), - .TX => self.tx_pid = @intCast(@intFromEnum(val)), + .RX => self.rx_pid = @intCast(@backingInt(val)), + .TX => self.tx_pid = @intCast(@backingInt(val)), } return val; } @@ -119,7 +119,7 @@ pub const EpControl = enum { EPC7, fn check_ep(ep: EpControl) EndpointError!usize { - const ep_num: usize = @intFromEnum(ep); + const ep_num: usize = @backingInt(ep); if (endpoints[ep_num] == null) { return error.UninitEndpoint; } @@ -223,7 +223,7 @@ fn usb_check(config: Config) InitError!PMA.Config { for (config.endpoints) |epconf| { const ep_size = epconf.rx_buffer_size.calc_rx_size(); const ep_bit: u16 = @as(u16, 1) << epconf.endpoint; - const epc_bit: u16 = @as(u16, 1) << @as(u4, @intFromEnum(epconf.ep_control)); + const epc_bit: u16 = @as(u16, 1) << @as(u4, @backingInt(epconf.ep_control)); if (epconf.endpoint == 0) { if (epconf.ep_type != .Control) comptime_or_runtime_err( @@ -252,7 +252,7 @@ fn usb_check(config: Config) InitError!PMA.Config { comptime_or_runtime_err( InitError.InvalidEndpoint, "EPC{d} has already been taken\n", - .{@as(u4, @intFromEnum(epconf.ep_control))}, + .{@as(u4, @backingInt(epconf.ep_control))}, ); } @@ -307,7 +307,7 @@ fn inner_init(config: Config, PMA_conf: PMA.Config, startup: Duration) InitError USB.ISTR.raw = 0; for (config.endpoints) |ep_conf| { - const epc_num: usize = @intFromEnum(ep_conf.ep_control); + const epc_num: usize = @backingInt(ep_conf.ep_control); endpoints[epc_num] = ep_conf; } try PMA.btable_init(PMA_conf); @@ -331,16 +331,16 @@ fn inner_init(config: Config, PMA_conf: PMA.Config, startup: Duration) InitError fn change_rx_status(status: USBTypes.STAT, pid: PID, EPC: usize) void { const corrent = USB.EPR[EPC].read(); - const valid: u2 = @as(u2, @intFromEnum(corrent.STAT_RX)) ^ @as(u2, @intFromEnum(status)); + const valid: u2 = @as(u2, @backingInt(corrent.STAT_RX)) ^ @as(u2, @backingInt(status)); const DTOG_val = switch (pid) { .no_change, .endpoint_ctr => @as(u1, 0), .force_data0 => corrent.DTOG_RX, .force_data1 => corrent.DTOG_RX ^ @as(u1, 1), }; USB.EPR[EPC].modify(.{ - .STAT_RX = @as(USBTypes.STAT, @enumFromInt(valid)), + .STAT_RX = @as(USBTypes.STAT, @fromBackingInt(valid)), .DTOG_RX = DTOG_val, - .STAT_TX = @as(USBTypes.STAT, @enumFromInt(0)), + .STAT_TX = @as(USBTypes.STAT, @fromBackingInt(0)), .DTOG_TX = 0, }); } @@ -353,12 +353,12 @@ fn change_tx_status(status: USBTypes.STAT, pid: PID, EPC: usize) void { .force_data1 => corrent.DTOG_TX ^ @as(u1, 1), }; - const valid: u2 = @as(u2, @intFromEnum(corrent.STAT_TX)) ^ @as(u2, @intFromEnum(status)); + const valid: u2 = @as(u2, @backingInt(corrent.STAT_TX)) ^ @as(u2, @backingInt(status)); USB.EPR[EPC].modify(.{ - .STAT_TX = @as(USBTypes.STAT, @enumFromInt(valid)), + .STAT_TX = @as(USBTypes.STAT, @fromBackingInt(valid)), .DTOG_TX = DTOG_val, - .STAT_RX = @as(USBTypes.STAT, @enumFromInt(0)), + .STAT_RX = @as(USBTypes.STAT, @fromBackingInt(0)), .DTOG_RX = 0, }); } @@ -456,9 +456,9 @@ pub fn usb_handler() callconv(.c) void { if (EPR.CTR_RX == 1) { USB.EPR[ep].modify(.{ .CTR_RX = 0, - .STAT_RX = @as(USBTypes.STAT, @enumFromInt(0)), + .STAT_RX = @as(USBTypes.STAT, @fromBackingInt(0)), .DTOG_RX = 0, - .STAT_TX = @as(USBTypes.STAT, @enumFromInt(0)), + .STAT_TX = @as(USBTypes.STAT, @fromBackingInt(0)), .DTOG_TX = 0, }); epc.toggle_pid(.RX); @@ -476,9 +476,9 @@ pub fn usb_handler() callconv(.c) void { if (EPR.CTR_TX == 1) { USB.EPR[ep].modify(.{ .CTR_TX = 0, - .STAT_RX = @as(USBTypes.STAT, @enumFromInt(0)), + .STAT_RX = @as(USBTypes.STAT, @fromBackingInt(0)), .DTOG_RX = 0, - .STAT_TX = @as(USBTypes.STAT, @enumFromInt(0)), + .STAT_TX = @as(USBTypes.STAT, @fromBackingInt(0)), .DTOG_TX = 0, }); epc.toggle_pid(.TX); diff --git a/port/stmicro/stm32/src/hals/STM32F103/usb_internals/usb_pma.zig b/port/stmicro/stm32/src/hals/STM32F103/usb_internals/usb_pma.zig index c5bde4b7d..d40c61254 100644 --- a/port/stmicro/stm32/src/hals/STM32F103/usb_internals/usb_pma.zig +++ b/port/stmicro/stm32/src/hals/STM32F103/usb_internals/usb_pma.zig @@ -31,12 +31,12 @@ pub const RX_size = struct { block_qtd: usize, pub fn calc_rx_size(size: *const RX_size) usize { - const mul: usize = if (@intFromEnum(size.block_size) == 0) 2 else 32; + const mul: usize = if (@backingInt(size.block_size) == 0) 2 else 32; return size.block_qtd * mul; } pub fn to_RXcount(size: *const RX_size) u16 { - const SL_bit: u16 = @as(u16, @intFromEnum(size.block_size)) << 15; + const SL_bit: u16 = @as(u16, @backingInt(size.block_size)) << 15; const pkg_qtd: u16 = @as(u16, @intCast(size.block_qtd)) << 10; return SL_bit | pkg_qtd; } diff --git a/port/stmicro/stm32/src/hals/STM32F303/rcc.zig b/port/stmicro/stm32/src/hals/STM32F303/rcc.zig index 742062002..4b2eeaea6 100644 --- a/port/stmicro/stm32/src/hals/STM32F303/rcc.zig +++ b/port/stmicro/stm32/src/hals/STM32F303/rcc.zig @@ -51,7 +51,7 @@ pub fn apply() void { } fn apply_flash_flash() void { - const latency: LATENCY = @enumFromInt(@intFromEnum(current_clocks.config.FLatency)); + const latency: LATENCY = @fromBackingInt(@backingInt(current_clocks.config.FLatency)); const prefetch: u1 = if (current_clocks.config.flags.PREFETCH_ENABLE) 1 else 0; FLASH.ACR.modify(.{ .LATENCY = latency, .PRFTBE = prefetch }); @@ -61,12 +61,12 @@ fn apply_pll() void { if (!current_clocks.config.flags.PLLUsed) { return; } - const source: PLLSRC = @enumFromInt(@intFromEnum(current_clocks.config.PLLSourceVirtual)); - const mul: PLLMUL = @enumFromInt(@intFromEnum(current_clocks.config.PLLMUL)); + const source: PLLSRC = @fromBackingInt(@backingInt(current_clocks.config.PLLSourceVirtual)); + const mul: PLLMUL = @fromBackingInt(@backingInt(current_clocks.config.PLLMUL)); //only on STM32F303E clocktree for DIE446 comptime if (Tree.check_MCU("DIE446")) { - const divider: PREDIV = @enumFromInt(@intFromEnum(current_clocks.config.PLLDivider)); + const divider: PREDIV = @fromBackingInt(@backingInt(current_clocks.config.PLLDivider)); RCC.CFGR2.modify(.{ .PREDIV = divider }); }; @@ -111,12 +111,12 @@ fn apply_hse() void { } fn apply_prescaler() void { - const apb1: PPRE = @enumFromInt(@intFromEnum(current_clocks.config.APB1CLKDivider)); - const apb2: PPRE = @enumFromInt(@intFromEnum(current_clocks.config.APB2CLKDivider)); - const ahb: HPRE = @enumFromInt(@intFromEnum(current_clocks.config.AHBCLKDivider)); - const adc12: ADCPRES = @enumFromInt(@intFromEnum(current_clocks.config.ADC12PRES)); - const adc34: ADCPRES = @enumFromInt(@intFromEnum(current_clocks.config.ADC34PRES)); - const usbprescal: USBPRE = @enumFromInt(@intFromEnum(current_clocks.config.PRESCALERUSB)); + const apb1: PPRE = @fromBackingInt(@backingInt(current_clocks.config.APB1CLKDivider)); + const apb2: PPRE = @fromBackingInt(@backingInt(current_clocks.config.APB2CLKDivider)); + const ahb: HPRE = @fromBackingInt(@backingInt(current_clocks.config.AHBCLKDivider)); + const adc12: ADCPRES = @fromBackingInt(@backingInt(current_clocks.config.ADC12PRES)); + const adc34: ADCPRES = @fromBackingInt(@backingInt(current_clocks.config.ADC34PRES)); + const usbprescal: USBPRE = @fromBackingInt(@backingInt(current_clocks.config.PRESCALERUSB)); RCC.CFGR.modify(.{ .HPRE = ahb, @@ -148,16 +148,16 @@ fn clean_clock() void { } pub fn select_clock() void { - const sys_clk: SW = @enumFromInt(@intFromEnum(current_clocks.config.SYSCLKSourceVirtual)); - const i2s_clk: ISSRC = @enumFromInt(@intFromEnum(current_clocks.config.I2SClockSource)); - const i2c1_clk: ICSW = @enumFromInt(@intFromEnum(current_clocks.config.I2c1ClockSelection)); - const i2c2_clk: ICSW = @enumFromInt(@intFromEnum(current_clocks.config.I2c2ClockSelection)); - - const usart1_clk: USART1SW = @enumFromInt(@intFromEnum(current_clocks.config.Usart1ClockSelection)); - const usart2_clk: USARTSW = @enumFromInt(@intFromEnum(current_clocks.config.Usart2ClockSelection)); - const usart3_clk: USARTSW = @enumFromInt(@intFromEnum(current_clocks.config.Usart3ClockSelection)); - const uart4_clk: USARTSW = @enumFromInt(@intFromEnum(current_clocks.config.Uart4ClockSelection)); - const uart5_clk: USARTSW = @enumFromInt(@intFromEnum(current_clocks.config.Uart5ClockSelection)); + const sys_clk: SW = @fromBackingInt(@backingInt(current_clocks.config.SYSCLKSourceVirtual)); + const i2s_clk: ISSRC = @fromBackingInt(@backingInt(current_clocks.config.I2SClockSource)); + const i2c1_clk: ICSW = @fromBackingInt(@backingInt(current_clocks.config.I2c1ClockSelection)); + const i2c2_clk: ICSW = @fromBackingInt(@backingInt(current_clocks.config.I2c2ClockSelection)); + + const usart1_clk: USART1SW = @fromBackingInt(@backingInt(current_clocks.config.Usart1ClockSelection)); + const usart2_clk: USARTSW = @fromBackingInt(@backingInt(current_clocks.config.Usart2ClockSelection)); + const usart3_clk: USARTSW = @fromBackingInt(@backingInt(current_clocks.config.Usart3ClockSelection)); + const uart4_clk: USARTSW = @fromBackingInt(@backingInt(current_clocks.config.Uart4ClockSelection)); + const uart5_clk: USARTSW = @fromBackingInt(@backingInt(current_clocks.config.Uart5ClockSelection)); RCC.CFGR.modify(.{ .SW = sys_clk, diff --git a/port/stmicro/stm32/src/hals/STM32F407.zig b/port/stmicro/stm32/src/hals/STM32F407.zig index e72e7b597..b1b802cf7 100644 --- a/port/stmicro/stm32/src/hals/STM32F407.zig +++ b/port/stmicro/stm32/src/hals/STM32F407.zig @@ -111,16 +111,16 @@ pub const gpio = struct { set_reg_field(RCC.AHB1ENR, "GPIO" ++ pin.gpio_port_name ++ "EN", 1); set_reg_field(@field(pin.gpio_port, "MODER"), "MODER" ++ pin.suffix, 0b10); if (pin.pin_number < 8) { - set_reg_field(@field(pin.gpio_port, "AFRL"), "AFRL" ++ pin.suffix, @intFromEnum(af)); + set_reg_field(@field(pin.gpio_port, "AFRL"), "AFRL" ++ pin.suffix, @backingInt(af)); } else { - set_reg_field(@field(pin.gpio_port, "AFRH"), "AFRH" ++ pin.suffix, @intFromEnum(af)); + set_reg_field(@field(pin.gpio_port, "AFRH"), "AFRH" ++ pin.suffix, @backingInt(af)); } } pub fn read(comptime pin: type) microzig.gpio.State { const idr_reg = pin.gpio_port.IDR; const reg_value = @field(idr_reg.read(), "IDR" ++ pin.suffix); // TODO extract to getRegField()? - return @as(microzig.gpio.State, @enumFromInt(reg_value)); + return @as(microzig.gpio.State, @fromBackingInt(reg_value)); } pub fn write(comptime pin: type, state: microzig.gpio.State) void { @@ -278,11 +278,11 @@ pub fn Uart(comptime index: usize, comptime pins: microzig.uart.Pins) type { // set parity if (config.parity) |parity| { - @field(peripherals, usart_name).CR1.modify(.{ .PCE = 1, .PS = @intFromEnum(parity) }); + @field(peripherals, usart_name).CR1.modify(.{ .PCE = 1, .PS = @backingInt(parity) }); } // otherwise, no need to set no parity since we reset Control Registers above, and it's the default // set number of stop bits - @field(peripherals, usart_name).CR2.modify(.{ .STOP = @intFromEnum(config.stop_bits) }); + @field(peripherals, usart_name).CR2.modify(.{ .STOP = @backingInt(config.stop_bits) }); // set the baud rate // Despite the reference manual talking about fractional calculation and other buzzwords, diff --git a/port/stmicro/stm32/src/hals/STM32F429.zig b/port/stmicro/stm32/src/hals/STM32F429.zig index 43caee757..ec10ef412 100644 --- a/port/stmicro/stm32/src/hals/STM32F429.zig +++ b/port/stmicro/stm32/src/hals/STM32F429.zig @@ -80,7 +80,7 @@ pub const gpio = struct { pub fn read(comptime pin: type) microzig.gpio.State { const idr_reg = pin.gpio_port.IDR; const reg_value = @field(idr_reg.read(), "IDR" ++ pin.suffix); // TODO extract to getRegField()? - return @as(microzig.gpio.State, @enumFromInt(reg_value)); + return @as(microzig.gpio.State, @fromBackingInt(reg_value)); } pub fn write(comptime pin: type, state: microzig.gpio.State) void { diff --git a/port/stmicro/stm32/src/hals/common/bdma_v1.zig b/port/stmicro/stm32/src/hals/common/bdma_v1.zig index 53648be9c..46a783c37 100644 --- a/port/stmicro/stm32/src/hals/common/bdma_v1.zig +++ b/port/stmicro/stm32/src/hals/common/bdma_v1.zig @@ -37,7 +37,7 @@ var dma_buffer: [countDmaChannel * 100]u8 linksection(".dma_buffer") = undefined pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type { const reg_dma = enums.get_regs(DMA_Peripheral, dma_ctrl); - const buffer_idx = enums.base_perihperal_index(dma_ctrl) * 7 + @intFromEnum(ch); + const buffer_idx = enums.base_perihperal_index(dma_ctrl) * 7 + @backingInt(ch); const start = buffer_idx * 100; // Here we are not able to use comptimeFmt since it will introduce dependency loop @@ -61,13 +61,13 @@ pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type { } pub fn clear_events(events: ChannelEvent) void { - const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@intFromEnum(ch))); + const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@backingInt(ch))); const bits: u32 = @as(u4, @bitCast(events)); reg_dma.IFCR.raw |= (bits & 0xF) << ch_evt_idx; } pub fn read_events() ChannelEvent { - const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@intFromEnum(ch))); + const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@backingInt(ch))); return @bitCast(@as(u4, @truncate(reg_dma.ISR.raw >> ch_evt_idx))); } @@ -78,7 +78,7 @@ pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type { const vector_table: *microzig.cpu.VectorTable = @ptrFromInt(0x0); std.debug.assert(@field(vector_table, interrupt_name).* == @intFromPtr(&DMA_Handler)); } - microzig.interrupt.enable(@as(microzig.cpu.ExternalInterrupt, @enumFromInt(interrupt_index))); + microzig.interrupt.enable(@as(microzig.cpu.ExternalInterrupt, @fromBackingInt(interrupt_index))); } pub fn get_channel() *Channel { @@ -86,7 +86,7 @@ pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type { return init_ch; } hal.rcc.enable_clock(enums.to_peripheral(dma_ctrl)); - const channel_base: usize = @intFromPtr(reg_dma) + 0x8 + (20 * @as(usize, @intFromEnum(ch))); + const channel_base: usize = @intFromPtr(reg_dma) + 0x8 + (20 * @as(usize, @backingInt(ch))); channel = Channel{ .reg_channel = @ptrFromInt(channel_base), diff --git a/port/stmicro/stm32/src/hals/common/bdma_v2.zig b/port/stmicro/stm32/src/hals/common/bdma_v2.zig index d645e2a61..8260f25f4 100644 --- a/port/stmicro/stm32/src/hals/common/bdma_v2.zig +++ b/port/stmicro/stm32/src/hals/common/bdma_v2.zig @@ -37,7 +37,7 @@ var dma_buffer: [countDmaChannel * 100]u8 linksection(".dma_buffer") = undefined pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type { const reg_dma = enums.get_regs(DMA_Peripheral, dma_ctrl); - const buffer_idx = enums.base_perihperal_index(dma_ctrl) * 7 + @intFromEnum(ch); + const buffer_idx = enums.base_perihperal_index(dma_ctrl) * 7 + @backingInt(ch); const start = buffer_idx * 100; // Here we are not able to use comptimeFmt since it will introduce dependency loop @@ -62,13 +62,13 @@ pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type { } pub fn clear_events(events: ChannelEvent) void { - const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@intFromEnum(ch))); + const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@backingInt(ch))); const bits: u32 = @as(u4, @bitCast(events)); reg_dma.IFCR.raw |= (bits & 0xF) << ch_evt_idx; } pub fn read_events() ChannelEvent { - const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@intFromEnum(ch))); + const ch_evt_idx: u5 = 4 * @as(u5, @intCast(@backingInt(ch))); return @bitCast(@as(u4, @truncate(reg_dma.ISR.raw >> ch_evt_idx))); } @@ -79,7 +79,7 @@ pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type { const vector_table: *microzig.cpu.VectorTable = @ptrFromInt(0x0); std.debug.assert(@field(vector_table, interrupt_name).* == @intFromPtr(&DMA_Handler)); } - microzig.interrupt.enable(@as(microzig.cpu.ExternalInterrupt, @enumFromInt(interrupt_index))); + microzig.interrupt.enable(@as(microzig.cpu.ExternalInterrupt, @fromBackingInt(interrupt_index))); } pub fn get_channel() *Channel { @@ -87,7 +87,7 @@ pub fn DMA(comptime dma_ctrl: Instances, comptime ch: ChannelNumber) type { return init_ch; } hal.rcc.enable_clock(enums.to_peripheral(dma_ctrl)); - const channel_base: usize = @intFromPtr(reg_dma) + 0x8 + (20 * @as(usize, @intFromEnum(ch))); + const channel_base: usize = @intFromPtr(reg_dma) + 0x8 + (20 * @as(usize, @backingInt(ch))); channel = Channel{ .reg_channel = @ptrFromInt(channel_base), diff --git a/port/stmicro/stm32/src/hals/common/enums.zig b/port/stmicro/stm32/src/hals/common/enums.zig index bf0195a7d..50937c1b8 100644 --- a/port/stmicro/stm32/src/hals/common/enums.zig +++ b/port/stmicro/stm32/src/hals/common/enums.zig @@ -42,7 +42,7 @@ pub fn to_peripheral(comptime val: anytype) Peripherals { DMA_Type, TIMGP16_Type, ADC_Type, - => @as(Peripherals, @enumFromInt(@intFromEnum(val))), + => @as(Peripherals, @fromBackingInt(@backingInt(val))), else => @panic("Value must be one of the sur peripheral enum define below"), }; } @@ -54,10 +54,10 @@ pub fn get_regs(comptime T: type, comptime val: anytype) *volatile T { pub fn base_perihperal_index(comptime val: anytype) u32 { return switch (@TypeOf(val)) { - UART_Type => @intFromEnum(val) - @intFromEnum(Peripherals.USART1), - I2C_Type => @intFromEnum(val) - @intFromEnum(Peripherals.I2C1), - SPI_Type => @intFromEnum(val) - @intFromEnum(Peripherals.SPI1), - DMA_Type => @intFromEnum(val) - @intFromEnum(Peripherals.DMA1), + UART_Type => @backingInt(val) - @backingInt(Peripherals.USART1), + I2C_Type => @backingInt(val) - @backingInt(Peripherals.I2C1), + SPI_Type => @backingInt(val) - @backingInt(Peripherals.SPI1), + DMA_Type => @backingInt(val) - @backingInt(Peripherals.DMA1), else => @panic("Index peripheral is only for multiple index peripherals"), }; } diff --git a/port/stmicro/stm32/src/hals/common/gpio_v2.zig b/port/stmicro/stm32/src/hals/common/gpio_v2.zig index fba4909f6..142df7b59 100644 --- a/port/stmicro/stm32/src/hals/common/gpio_v2.zig +++ b/port/stmicro/stm32/src/hals/common/gpio_v2.zig @@ -107,18 +107,18 @@ pub const Pin = enum(usize) { } pub fn mask_2bit(gpio: Pin) u32 { - const pin: u5 = @intCast(@intFromEnum(gpio) % 16); + const pin: u5 = @intCast(@backingInt(gpio) % 16); return @as(u32, 0b11) << (pin << 1); } pub fn mask(gpio: Pin) u32 { - const pin: u4 = @intCast(@intFromEnum(gpio) % 16); + const pin: u4 = @intCast(@backingInt(gpio) % 16); return @as(u32, 1) << pin; } //NOTE: should invalid pins panic or just be ignored? pub fn get_port(gpio: Pin) *volatile GPIO { - const port: usize = @divFloor(@intFromEnum(gpio), 16); + const port: usize = @divFloor(@backingInt(gpio), 16); switch (port) { 0 => return if (@hasDecl(peripherals, "GPIOA")) peripherals.GPIOA else @panic("Invalid Pin"), 1 => return if (@hasDecl(peripherals, "GPIOB")) peripherals.GPIOB else @panic("Invalid Pin"), @@ -133,45 +133,45 @@ pub const Pin = enum(usize) { pub inline fn set_bias(gpio: Pin, bias: PUPDR) void { const port = gpio.get_port(); - const pin: u5 = @intCast(@intFromEnum(gpio) % 16); + const pin: u5 = @intCast(@backingInt(gpio) % 16); const modMask: u32 = gpio.mask_2bit(); - port.PUPDR.write_raw((port.PUPDR.raw & ~modMask) | @as(u32, @intFromEnum(bias)) << (pin << 1)); + port.PUPDR.write_raw((port.PUPDR.raw & ~modMask) | @as(u32, @backingInt(bias)) << (pin << 1)); } pub inline fn set_speed(gpio: Pin, speed: OSPEEDR) void { const port = gpio.get_port(); - const pin: u5 = @intCast(@intFromEnum(gpio) % 16); + const pin: u5 = @intCast(@backingInt(gpio) % 16); const modMask: u32 = gpio.mask_2bit(); - port.OSPEEDR.write_raw((port.OSPEEDR.raw & ~modMask) | @as(u32, @intFromEnum(speed)) << (pin << 1)); + port.OSPEEDR.write_raw((port.OSPEEDR.raw & ~modMask) | @as(u32, @backingInt(speed)) << (pin << 1)); } pub inline fn set_moder(gpio: Pin, moder: MODER) void { const port = gpio.get_port(); - const pin: u5 = @intCast(@intFromEnum(gpio) % 16); + const pin: u5 = @intCast(@backingInt(gpio) % 16); const modMask: u32 = gpio.mask_2bit(); - port.MODER.write_raw((port.MODER.raw & ~modMask) | @as(u32, @intFromEnum(moder)) << (pin << 1)); + port.MODER.write_raw((port.MODER.raw & ~modMask) | @as(u32, @backingInt(moder)) << (pin << 1)); } pub inline fn set_output_type(gpio: Pin, otype: OT) void { const port = gpio.get_port(); - const pin: u5 = @intCast(@intFromEnum(gpio) % 16); + const pin: u5 = @intCast(@backingInt(gpio) % 16); - port.OTYPER.write_raw((port.OTYPER.raw & ~gpio.mask()) | @as(u32, @intFromEnum(otype)) << pin); + port.OTYPER.write_raw((port.OTYPER.raw & ~gpio.mask()) | @as(u32, @backingInt(otype)) << pin); } pub inline fn set_alternate_function(gpio: Pin, afr: AF) void { const port = gpio.get_port(); - const pin: u5 = @intCast(@intFromEnum(gpio) % 16); + const pin: u5 = @intCast(@backingInt(gpio) % 16); const afrMask: u32 = @as(u32, 0b1111) << ((pin % 8) << 2); const register = if (pin > 7) &port.AFR[1] else &port.AFR[0]; - register.write_raw((register.raw & ~afrMask) | @as(u32, @intFromEnum(afr)) << ((pin % 8) << 2)); + register.write_raw((register.raw & ~afrMask) | @as(u32, @backingInt(afr)) << ((pin % 8) << 2)); } pub fn from_port(port: Port, pin: u4) Pin { - const value: usize = pin + (@as(usize, 16) * @intFromEnum(port)); - return @enumFromInt(value); + const value: usize = pin + (@as(usize, 16) * @backingInt(port)); + return @fromBackingInt(value); } }; diff --git a/port/stmicro/stm32/src/hals/common/i2c_v2.zig b/port/stmicro/stm32/src/hals/common/i2c_v2.zig index 56c36451d..d3a995e3e 100644 --- a/port/stmicro/stm32/src/hals/common/i2c_v2.zig +++ b/port/stmicro/stm32/src/hals/common/i2c_v2.zig @@ -136,7 +136,7 @@ const I2C = struct { regs.CR2.modify(.{ .NBYTES = @as(u8, @intCast(chunks.len)), - .SADD = @as(u10, @intCast(@intFromEnum(addr))) << 1, + .SADD = @as(u10, @intCast(@backingInt(addr))) << 1, .DIR = .Read, }); regs.CR2.modify(.{ @@ -159,7 +159,7 @@ const I2C = struct { regs.CR2.modify(.{ .NBYTES = @as(u8, @intCast(chunks.len)), - .SADD = @as(u10, @intCast(@intFromEnum(addr))) << 1, + .SADD = @as(u10, @intCast(@backingInt(addr))) << 1, .AUTOEND = if (restart) .Software else .Automatic, .DIR = .Write, }); diff --git a/port/stmicro/stm32/src/hals/common/pins_v2.zig b/port/stmicro/stm32/src/hals/common/pins_v2.zig index d08405492..2663657b8 100644 --- a/port/stmicro/stm32/src/hals/common/pins_v2.zig +++ b/port/stmicro/stm32/src/hals/common/pins_v2.zig @@ -242,8 +242,8 @@ pub const GlobalConfiguration = struct { if (@field(config, port_field_name)) |port_config| { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { if (@field(port_config, field_name)) |pin_config| { - const port = @intFromEnum(@field(Port, port_field_name)); - var pin = gpio.Pin.from_port(@enumFromInt(port), @intFromEnum(@field(Pin, field_name))); + const port = @backingInt(@field(Port, port_field_name)); + var pin = gpio.Pin.from_port(@fromBackingInt(port), @backingInt(@field(Pin, field_name))); pin.write_pin_config(pin_config.mode.?); const default_name = "P" ++ port_field_name[4..5] ++ field_name[3..]; diff --git a/port/stmicro/stm32/src/hals/common/systick_timer.zig b/port/stmicro/stm32/src/hals/common/systick_timer.zig index 4f08bde63..1ca0952e9 100644 --- a/port/stmicro/stm32/src/hals/common/systick_timer.zig +++ b/port/stmicro/stm32/src/hals/common/systick_timer.zig @@ -10,7 +10,7 @@ const Error = error{ pub fn get_time_since_boot(_: *anyopaque) time.Absolute { const us = cpu_systick.get_time_since_boot(); - return @enumFromInt(us); + return @fromBackingInt(us); } pub fn clock_device() Error!ClockDevice { diff --git a/port/stmicro/stm32/src/hals/common/timer_v1.zig b/port/stmicro/stm32/src/hals/common/timer_v1.zig index 5ba51079f..880b5803c 100644 --- a/port/stmicro/stm32/src/hals/common/timer_v1.zig +++ b/port/stmicro/stm32/src/hals/common/timer_v1.zig @@ -193,7 +193,7 @@ pub const GPTimer = struct { regs.CR1.modify(.{ .CKD = config.clock_division, .OPM = @as(u1, @intFromBool(config.one_pulse_mode)), - .ARPE = @as(u1, @intFromEnum(config.auto_reload_mode)), + .ARPE = @as(u1, @backingInt(config.auto_reload_mode)), .URS = config.event_source, }); regs.CR2.modify(.{ @@ -288,7 +288,7 @@ pub const GPTimer = struct { } pub inline fn set_auto_relaod_mode(self: *const GPTimer, mode: ARRModes) void { - self.regs.CR1.modify(.{ .ARPE = @intFromEnum(mode) }); + self.regs.CR1.modify(.{ .ARPE = @backingInt(mode) }); } pub fn set_counter_mode(self: *const GPTimer, mode: CounterMode) void { @@ -392,8 +392,8 @@ pub const GPTimer = struct { .ETPS = config.ext_trig_prescaler, .ETF = config.ext_trig_filter, .MSM = config.sync, - .TS = @as(u3, @intFromEnum(config.trigger_source)), - .SMS = @as(u3, @intFromEnum(config.mode)), + .TS = @as(u3, @backingInt(config.trigger_source)), + .SMS = @as(u3, @backingInt(config.mode)), }); } @@ -463,7 +463,7 @@ pub const GPTimer = struct { CCMR.raw &= ~(@as(u32, 0b1) << (offset + 3)); //CCxS bits } - const mode: u32 = @intFromEnum(config.mode); + const mode: u32 = @backingInt(config.mode); CCMR.raw &= ~(@as(u32, 0b111) << offset + 4); //clear mode bits CCMR.raw |= mode << (offset + 4); //set mode bits @@ -477,8 +477,8 @@ pub const GPTimer = struct { pub fn configure_input(self: *const GPTimer, channel: u2, config: Capture) void { const regs = self.regs; const CCMR = if (channel < 2) ®s.CCMR_Input[0] else ®s.CCMR_Input[1]; - const ccs: CCMR_Input_CCS = @enumFromInt(@intFromEnum(config.mode)); - const psc: u2 = @intFromEnum(config.prescaler); + const ccs: CCMR_Input_CCS = @fromBackingInt(@backingInt(config.mode)); + const psc: u2 = @backingInt(config.prescaler); if (channel % 2 == 0) { CCMR.modify(.{ .@"CCS[0]" = ccs, diff --git a/port/texasinstruments/msp430/build.zig b/port/texasinstruments/msp430/build.zig index 2761b38d6..a59f737a2 100644 --- a/port/texasinstruments/msp430/build.zig +++ b/port/texasinstruments/msp430/build.zig @@ -43,7 +43,7 @@ pub fn build(b: *std.Build) void { const ti_data = b.lazyDependency("ti_data", .{}) orelse return; const targetdb = ti_data.path("targetdb"); - const generate_optimize = .ReleaseSafe; + const generate_optimize: std.lang.Optimize = .safe; const regz_dep = b.dependency("microzig/tools/regz", .{ .optimize = generate_optimize, }); diff --git a/port/texasinstruments/mspm0/src/hal/Uart.zig b/port/texasinstruments/mspm0/src/hal/Uart.zig index e62a8fa43..733c2576f 100644 --- a/port/texasinstruments/mspm0/src/hal/Uart.zig +++ b/port/texasinstruments/mspm0/src/hal/Uart.zig @@ -38,9 +38,9 @@ pub fn configure(self: Uart, cfg: Config) void { inline for (0..4) |_| asm volatile ("nop"); self.regs.UART0_CLKSEL.write(.{ - .LFCLK_SEL = @enumFromInt(@intFromBool(cfg.clk.src == .LFCLK)), - .MFCLK_SEL = @enumFromInt(@intFromBool(cfg.clk.src == .MFCLK)), - .BUSCLK_SEL = @enumFromInt(@intFromBool(cfg.clk.src == .BUSCLK)), + .LFCLK_SEL = @fromBackingInt(@intFromBool(cfg.clk.src == .LFCLK)), + .MFCLK_SEL = @fromBackingInt(@intFromBool(cfg.clk.src == .MFCLK)), + .BUSCLK_SEL = @fromBackingInt(@intFromBool(cfg.clk.src == .BUSCLK)), }); self.regs.UART0_CLKDIV.write(.{ .RATIO = cfg.clk.div0 }); var ctl0 = self.regs.UART0_CTL0.read(); @@ -48,8 +48,8 @@ pub fn configure(self: Uart, cfg: Config) void { ctl0.ENABLE = .DISABLE; self.regs.UART0_CTL0.write(ctl0); } - self.regs.UART0_IBRD.write(.{ .DIVINT = @enumFromInt(cfg.clk.div.int) }); - self.regs.UART0_FBRD.write(.{ .DIVFRAC = @enumFromInt(cfg.clk.div.frac) }); + self.regs.UART0_IBRD.write(.{ .DIVINT = @fromBackingInt(cfg.clk.div.int) }); + self.regs.UART0_FBRD.write(.{ .DIVFRAC = @fromBackingInt(cfg.clk.div.frac) }); // There are more ctl0 options ctl0.LBE = if (cfg.loopback) .ENABLE else .DISABLE; @@ -65,8 +65,8 @@ pub fn configure(self: Uart, cfg: Config) void { .WLEN = cfg.bits, .SPS = .DISABLE, .SENDIDLE = .DISABLE, - .EXTDIR_SETUP = @enumFromInt(0), - .EXTDIR_HOLD = @enumFromInt(0), + .EXTDIR_SETUP = @fromBackingInt(0), + .EXTDIR_HOLD = @fromBackingInt(0), }); if (cfg.enable) { ctl0.ENABLE = .ENABLE; @@ -81,14 +81,14 @@ pub fn disable(self: Uart) void { pub fn write(self: Uart, b: u8) bool { const stat = self.regs.UART0_STAT.read(); if (stat.TXFF == .SET) return false; - self.regs.UART0_TXDATA.write(.{ .DATA = @enumFromInt(b) }); + self.regs.UART0_TXDATA.write(.{ .DATA = @fromBackingInt(b) }); return true; } pub fn read(self: Uart) ?u8 { const stat = self.regs.UART0_STAT.read(); if (stat.RXFE == .SET) return null; - return @intFromEnum(self.regs.UART0_TXDATA.read().DATA); + return @backingInt(self.regs.UART0_TXDATA.read().DATA); } pub const Writer = struct { diff --git a/port/texasinstruments/mspm0/src/hal/gpio.zig b/port/texasinstruments/mspm0/src/hal/gpio.zig index fa9aa6074..8bdc0e03f 100644 --- a/port/texasinstruments/mspm0/src/hal/gpio.zig +++ b/port/texasinstruments/mspm0/src/hal/gpio.zig @@ -26,7 +26,7 @@ pub const Pin = struct { pub fn set_function(p: Pin, function: u6) void { peri.iomux.IOMUX_PINCM[p.num].write(.{ - .PF = @enumFromInt(function), + .PF = @fromBackingInt(function), .PC = .CONNECTED, .WAKESTAT = .DISABLE, .PIPD = .DISABLE, diff --git a/port/texasinstruments/tm4c/build.zig b/port/texasinstruments/tm4c/build.zig index b0cae8295..b4cee384b 100644 --- a/port/texasinstruments/tm4c/build.zig +++ b/port/texasinstruments/tm4c/build.zig @@ -35,7 +35,7 @@ pub fn build(b: *std.Build) void { const ti_data = b.lazyDependency("ti_data", .{}) orelse return; const targetdb = ti_data.path("targetdb"); - const generate_optimize = .ReleaseSafe; + const generate_optimize: std.lang.Optimize = .safe; const regz_dep = b.dependency("microzig/tools/regz", .{ .optimize = generate_optimize, }); diff --git a/port/wch/ch32v/src/cpus/main.zig b/port/wch/ch32v/src/cpus/main.zig index 91cc7940a..6990c7df8 100644 --- a/port/wch/ch32v/src/cpus/main.zig +++ b/port/wch/ch32v/src/cpus/main.zig @@ -54,7 +54,7 @@ pub const interrupt = struct { } pub inline fn is_enabled(irq: Interrupt) bool { - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const num = irq_num >> 5; const pos = irq_num & 0x1F; const v = switch (num) { @@ -88,7 +88,7 @@ pub const interrupt = struct { } } - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const num = irq_num >> 5; const pos = irq_num & 0x1F; switch (num) { @@ -101,7 +101,7 @@ pub const interrupt = struct { } pub inline fn disable(irq: Interrupt) void { - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const num = irq_num >> 5; const pos = irq_num & 0x1F; switch (num) { @@ -114,7 +114,7 @@ pub const interrupt = struct { } pub inline fn is_pending(irq: Interrupt) bool { - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const num = irq_num >> 5; const pos = irq_num & 0x1F; const v = switch (num) { @@ -128,7 +128,7 @@ pub const interrupt = struct { } pub inline fn set_pending(irq: Interrupt) void { - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const num = irq_num >> 5; const pos = irq_num & 0x1F; switch (num) { @@ -141,7 +141,7 @@ pub const interrupt = struct { } pub inline fn clear_pending(irq: Interrupt) void { - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const num = irq_num >> 5; const pos = irq_num & 0x1F; switch (num) { @@ -154,7 +154,7 @@ pub const interrupt = struct { } pub inline fn is_active(irq: Interrupt) void { - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const num = irq_num >> 5; const pos = irq_num & 0x1F; const v = switch (num) { @@ -173,13 +173,13 @@ pub const interrupt = struct { /// bit6~bit4 - subpriority /// bit3~bit0 - reserved (must be 0) pub inline fn set_priority(comptime irq: Interrupt, priority: u8) void { - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const irq_num_str = std.fmt.comptimePrint("{}", .{irq_num}); - @field(PFIC, "IPRIOR" ++ irq_num_str) = @intFromEnum(priority) & 0b1111_0000; + @field(PFIC, "IPRIOR" ++ irq_num_str) = @backingInt(priority) & 0b1111_0000; } pub inline fn get_priority(comptime irq: Interrupt) u8 { - const irq_num = @intFromEnum(irq); + const irq_num = @backingInt(irq); const irq_num_str = std.fmt.comptimePrint("{}", .{irq_num}); return @field(PFIC, "IPRIOR" ++ irq_num_str); } diff --git a/port/wch/ch32v/src/hals/ch32v003/gpio.zig b/port/wch/ch32v/src/hals/ch32v003/gpio.zig index abd941fec..28c3f69bc 100644 --- a/port/wch/ch32v/src/hals/ch32v003/gpio.zig +++ b/port/wch/ch32v/src/hals/ch32v003/gpio.zig @@ -91,14 +91,14 @@ pub const Pin = packed struct(u8) { } pub inline fn set_input_mode(gpio: Pin, mode: InputMode) void { - const m_mode = @as(u32, @intFromEnum(mode)); + const m_mode = @as(u32, @backingInt(mode)); const config: u32 = m_mode << 2; gpio.write_pin_config(config); } pub inline fn set_output_mode(gpio: Pin, mode: OutputMode, speed: Speed) void { - const s_speed = @as(u32, @intFromEnum(speed)); - const m_mode = @as(u32, @intFromEnum(mode)); + const s_speed = @as(u32, @backingInt(speed)); + const m_mode = @as(u32, @backingInt(mode)); const config: u32 = s_speed + (m_mode << 2); gpio.write_pin_config(config); } diff --git a/port/wch/ch32v/src/hals/ch32v003/pins.zig b/port/wch/ch32v/src/hals/ch32v003/pins.zig index 058e061be..821636867 100644 --- a/port/wch/ch32v/src/hals/ch32v003/pins.zig +++ b/port/wch/ch32v/src/hals/ch32v003/pins.zig @@ -91,8 +91,8 @@ pub fn Pins(comptime config: GlobalConfiguration) type { if (@field(config, port_field_name)) |port_config| { for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { if (@field(port_config, field_name)) |pin_config| { - const name: []const u8 = pin_config.name orelse get_tag_name_by_index(PortName, @intFromEnum(@field(Port, port_field_name))) ++ @tagName(@field(Pin, field_name))[3..]; - const typ: type = GPIO(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name)), pin_config.mode orelse .{ .input = .{.floating} }); + const name: []const u8 = pin_config.name orelse get_tag_name_by_index(PortName, @backingInt(@field(Port, port_field_name))) ++ @tagName(@field(Pin, field_name))[3..]; + const typ: type = GPIO(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name)), pin_config.mode orelse .{ .input = .{.floating} }); field_names = field_names ++ .{name}; field_types = field_types ++ .{typ}; field_attrs = field_attrs ++ .{Attributes{}}; @@ -156,7 +156,7 @@ pub const GlobalConfiguration = struct { comptime { for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| if (@field(port_config, field_name)) |pin_config| { - const gpio_num = @intFromEnum(@field(Pin, field_name)); + const gpio_num = @backingInt(@field(Pin, field_name)); switch (pin_config.get_mode()) { .input => input_gpios |= 1 << gpio_num, @@ -169,7 +169,7 @@ pub const GlobalConfiguration = struct { const used_gpios = comptime input_gpios | output_gpios; if (used_gpios != 0) { - const offset = @as(u3, @intFromEnum(@field(Port, port_field_name))) + 2; + const offset = @as(u3, @backingInt(@field(Port, port_field_name))) + 2; RCC.APB2PCENR.raw |= @as(u32, 1 << offset); } @@ -181,7 +181,7 @@ pub const GlobalConfiguration = struct { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { // TODO: GPIOD has only 3 ports. Check this. if (@field(port_config, field_name)) |pin_config| { - var pin = gpio.Pin.init(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name))); + var pin = gpio.Pin.init(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name))); // TODO: Remove this loop. Set at once. pin.set_mode(pin_config.mode.?); } @@ -191,7 +191,7 @@ pub const GlobalConfiguration = struct { if (input_gpios != 0) { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| if (@field(port_config, field_name)) |pin_config| { - var pin = gpio.Pin.init(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name))); + var pin = gpio.Pin.init(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name))); const pull = pin_config.pull orelse continue; if (comptime pin_config.get_mode() != .input) @compileError("Only input pins can have pull up/down enabled"); diff --git a/port/wch/ch32v/src/hals/clocks.zig b/port/wch/ch32v/src/hals/clocks.zig index a5b076cc0..d3e51f2be 100644 --- a/port/wch/ch32v/src/hals/clocks.zig +++ b/port/wch/ch32v/src/hals/clocks.zig @@ -564,7 +564,7 @@ pub fn enable_usbhs_clock(comptime cfg: USB_HS_ClockConfig) void { .hsi => 1, }, .USBHSDIV = div_to_usbhsdiv(chosen_div), - .USBHSCLK = @as(u2, @intFromEnum(chosen_ref)), + .USBHSCLK = @as(u2, @backingInt(chosen_ref)), .USBHSPLL = 1, .USBFSSRC = 1, // RM: USBHS 48MHz clock source = USB PHY }); diff --git a/port/wch/ch32v/src/hals/dma.zig b/port/wch/ch32v/src/hals/dma.zig index 32687c725..5fae0c389 100644 --- a/port/wch/ch32v/src/hals/dma.zig +++ b/port/wch/ch32v/src/hals/dma.zig @@ -58,7 +58,7 @@ pub const Channel = enum(u3) { /// Get the register pointers for a specific DMA channel /// Currently supports DMA1 channels 1-7 only (CH32V203) pub inline fn get_regs(comptime chan: Channel) Regs { - const chan_num = @intFromEnum(chan); + const chan_num = @backingInt(chan); const cfgr_name = std.fmt.comptimePrint("CFGR{d}", .{chan_num}); const cntr_name = std.fmt.comptimePrint("CNTR{d}", .{chan_num}); const paddr_name = std.fmt.comptimePrint("PADDR{d}", .{chan_num}); @@ -226,7 +226,7 @@ pub const Channel = enum(u3) { // Clear all interrupt flags for this channel. There are four interrupts per channel, so we // shift by 4 * (channel - 1). Channel enum is 1-indexed, so subtract 1 for bit position. - const flag_shift: u5 = (@as(u5, @intFromEnum(chan)) - 1) * 4; + const flag_shift: u5 = (@as(u5, @backingInt(chan)) - 1) * 4; regs.INTFCR.write_raw(@as(u32, 0b1111) << flag_shift); // NOTE: DIR bit affects transfer direction even in MEM2MEM mode (undocumented behavior): @@ -248,13 +248,13 @@ pub const Channel = enum(u3) { // Set the amount of data to transfer regs.CNTR.write_raw(count); // Set the priority - regs.CFGR.modify(.{ .PL = @intFromEnum(config.priority) }); + regs.CFGR.modify(.{ .PL = @backingInt(config.priority) }); // Set the rest of the config regs.CFGR.modify(.{ .MEM2MEM = @intFromBool(direction == .Mem2Mem), - .MSIZE = @intFromEnum(data_size), + .MSIZE = @backingInt(data_size), .MINC = @intFromBool(memory_increment), - .PSIZE = @intFromEnum(data_size), + .PSIZE = @backingInt(data_size), .PINC = @intFromBool(peripheral_increment), .CIRC = @intFromBool(config.circular_mode), // DIR applies in all modes. Set DIR=1 only for Mem→Periph (MADDR→PADDR); @@ -283,7 +283,7 @@ pub const Channel = enum(u3) { if (cfg.CIRC == 1) return true; // In normal mode, check if transfer is complete - const flag_shift: u5 = (@as(u5, @intFromEnum(chan)) - 1) * 4; + const flag_shift: u5 = (@as(u5, @backingInt(chan)) - 1) * 4; const tcif_bit: u5 = flag_shift + 1; const tcif_mask: u32 = @as(u32, 1) << tcif_bit; const tcif = (regs.INTFR.raw & tcif_mask) != 0; @@ -313,7 +313,7 @@ pub const Channel = enum(u3) { /// This flag is set after each cycle in circular mode, or once in normal mode pub fn has_completed_cycle(comptime chan: Channel) bool { const regs = chan.get_regs(); - const flag_shift: u5 = (@as(u5, @intFromEnum(chan)) - 1) * 4; + const flag_shift: u5 = (@as(u5, @backingInt(chan)) - 1) * 4; const tcif_bit: u5 = flag_shift + 1; const tcif_mask: u32 = @as(u32, 1) << tcif_bit; return (regs.INTFR.raw & tcif_mask) != 0; @@ -322,7 +322,7 @@ pub const Channel = enum(u3) { /// Clear the transfer complete flag (useful in circular mode to detect next cycle) pub fn clear_complete_flag(comptime chan: Channel) void { const regs = chan.get_regs(); - const flag_shift: u5 = (@as(u5, @intFromEnum(chan)) - 1) * 4; + const flag_shift: u5 = (@as(u5, @backingInt(chan)) - 1) * 4; regs.INTFCR.write_raw(@as(u32, 0b0010) << flag_shift); // Clear only TCIF } diff --git a/port/wch/ch32v/src/hals/drivers.zig b/port/wch/ch32v/src/hals/drivers.zig index 6dfa419b6..f6e75e8ae 100644 --- a/port/wch/ch32v/src/hals/drivers.zig +++ b/port/wch/ch32v/src/hals/drivers.zig @@ -172,7 +172,7 @@ pub const GPIO_Device = struct { } pub fn read(dio: GPIO_Device) ReadError!State { - return @enumFromInt(dio.pin.read()); + return @fromBackingInt(dio.pin.read()); } const vtable = Digital_IO.VTable{ @@ -353,7 +353,7 @@ pub const ClockDevice = struct { fn get_time_since_boot_fn(td: *anyopaque) time.Absolute { _ = td; const t = time.get_time_since_boot().to_us(); - return @enumFromInt(t); + return @fromBackingInt(t); } }; diff --git a/port/wch/ch32v/src/hals/gpio.zig b/port/wch/ch32v/src/hals/gpio.zig index 9c828e40d..aa9109c64 100644 --- a/port/wch/ch32v/src/hals/gpio.zig +++ b/port/wch/ch32v/src/hals/gpio.zig @@ -113,14 +113,14 @@ pub const Pin = packed struct(u8) { } pub inline fn set_input_mode(gpio: Pin, mode: InputMode) void { - const m_mode = @as(u32, @intFromEnum(mode)); + const m_mode = @as(u32, @backingInt(mode)); const config: u32 = m_mode << 2; gpio.write_pin_config(config); } pub inline fn set_output_mode(gpio: Pin, mode: OutputMode, speed: Speed) void { - const s_speed = @as(u32, @intFromEnum(speed)); - const m_mode = @as(u32, @intFromEnum(mode)); + const s_speed = @as(u32, @backingInt(speed)); + const m_mode = @as(u32, @backingInt(mode)); const config: u32 = s_speed + (m_mode << 2); gpio.write_pin_config(config); } diff --git a/port/wch/ch32v/src/hals/i2c.zig b/port/wch/ch32v/src/hals/i2c.zig index 62f18a5a5..b6b0bd4bd 100644 --- a/port/wch/ch32v/src/hals/i2c.zig +++ b/port/wch/ch32v/src/hals/i2c.zig @@ -75,10 +75,10 @@ pub const ConfigError = error{ }; pub const instance = struct { - pub const I2C1: I2C = @enumFromInt(0); - pub const I2C2: I2C = @enumFromInt(1); + pub const I2C1: I2C = @fromBackingInt(0); + pub const I2C2: I2C = @fromBackingInt(1); pub fn num(instance_number: u2) I2C { - return @enumFromInt(instance_number - 1); + return @fromBackingInt(instance_number - 1); } }; @@ -86,7 +86,7 @@ pub const I2C = enum(u1) { _, pub inline fn get_regs(i2c: I2C) *volatile I2cRegs { - return switch (@intFromEnum(i2c)) { + return switch (@backingInt(i2c)) { 0 => I2C1, 1 => I2C2, }; @@ -106,11 +106,11 @@ pub const I2C = enum(u1) { // Compile-time DMA validation if (comptime config.dma) |dma_cfg| { - const tx_peripheral = comptime if (@intFromEnum(i2c) == 0) + const tx_peripheral = comptime if (@backingInt(i2c) == 0) dma.Peripheral.I2C1_TX else dma.Peripheral.I2C2_TX; - const rx_peripheral = comptime if (@intFromEnum(i2c) == 0) + const rx_peripheral = comptime if (@backingInt(i2c) == 0) dma.Peripheral.I2C1_RX else dma.Peripheral.I2C2_RX; @@ -121,7 +121,7 @@ pub const I2C = enum(u1) { } // Enable peripheral clock - hal.clocks.enable_peripheral_clock(switch (@intFromEnum(i2c)) { + hal.clocks.enable_peripheral_clock(switch (@backingInt(i2c)) { 0 => .I2C1, 1 => .I2C2, }); @@ -129,8 +129,8 @@ pub const I2C = enum(u1) { // Configure AFIO remap hal.clocks.enable_afio_clock(); const AFIO = microzig.chip.peripherals.AFIO; - switch (@intFromEnum(i2c)) { - 0 => AFIO.PCFR1.modify(.{ .I2C1_RM = @intFromEnum(config.remap) }), + switch (@backingInt(i2c)) { + 0 => AFIO.PCFR1.modify(.{ .I2C1_RM = @backingInt(config.remap) }), // I2C2 does not have remap support on CH32V20x 1 => {}, } @@ -230,7 +230,7 @@ pub const I2C = enum(u1) { /// Send 7-bit address with direction bit inline fn send_address(i2c: I2C, addr: Address, direction: enum { write, read }) void { - const addr_byte = @as(u8, @intFromEnum(addr)) << 1 | @intFromBool(direction == .read); + const addr_byte = @as(u8, @backingInt(addr)) << 1 | @intFromBool(direction == .read); i2c.get_regs().DATAR.write_raw(addr_byte); } diff --git a/port/wch/ch32v/src/hals/pins.zig b/port/wch/ch32v/src/hals/pins.zig index cf404fae1..1852f49e4 100644 --- a/port/wch/ch32v/src/hals/pins.zig +++ b/port/wch/ch32v/src/hals/pins.zig @@ -100,8 +100,8 @@ pub fn Pins(comptime config: GlobalConfiguration) type { if (@field(config, port_field_name)) |port_config| { for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { if (@field(port_config, field_name)) |pin_config| { - const name: []const u8 = pin_config.name orelse get_tag_name_by_index(PortName, @intFromEnum(@field(Port, port_field_name))) ++ @tagName(@field(Pin, field_name))[3..]; - const typ: type = GPIO(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name)), pin_config.mode orelse .{ .input = .{.floating} }); + const name: []const u8 = pin_config.name orelse get_tag_name_by_index(PortName, @backingInt(@field(Port, port_field_name))) ++ @tagName(@field(Pin, field_name))[3..]; + const typ: type = GPIO(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name)), pin_config.mode orelse .{ .input = .{.floating} }); field_names = field_names ++ .{name}; field_types = field_types ++ .{typ}; field_attrs = field_attrs ++ .{Attributes{}}; @@ -193,7 +193,7 @@ pub const GlobalConfiguration = struct { comptime { for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| if (@field(port_config, field_name)) |pin_config| { - const gpio_num = @intFromEnum(@field(Pin, field_name)); + const gpio_num = @backingInt(@field(Pin, field_name)); switch (pin_config.get_mode()) { .input => input_gpios |= 1 << gpio_num, @@ -207,7 +207,7 @@ pub const GlobalConfiguration = struct { if (used_gpios != 0) { // Figure out IO port enable bit from name - const offset = @as(u3, @intFromEnum(@field(Port, port_field_name))) + 2; + const offset = @as(u3, @backingInt(@field(Port, port_field_name))) + 2; RCC.APB2PCENR.raw |= @as(u32, 1 << offset); } @@ -219,7 +219,7 @@ pub const GlobalConfiguration = struct { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| { // TODO: GPIOD has only 3 ports. Check this. if (@field(port_config, field_name)) |pin_config| { - var pin = gpio.Pin.init(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name))); + var pin = gpio.Pin.init(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name))); // TODO: Remove this loop. Set at once. pin.set_mode(pin_config.mode.?); } @@ -229,7 +229,7 @@ pub const GlobalConfiguration = struct { if (input_gpios != 0) { inline for (@typeInfo(Port.Configuration).@"struct".field_names) |field_name| if (@field(port_config, field_name)) |pin_config| { - var pin = gpio.Pin.init(@intFromEnum(@field(Port, port_field_name)), @intFromEnum(@field(Pin, field_name))); + var pin = gpio.Pin.init(@backingInt(@field(Port, port_field_name)), @backingInt(@field(Pin, field_name))); const pull = pin_config.pull orelse continue; if (comptime pin_config.get_mode() != .input) @compileError("Only input pins can have pull up/down enabled"); diff --git a/port/wch/ch32v/src/hals/spi.zig b/port/wch/ch32v/src/hals/spi.zig index 22274ec79..8e6e6ff4e 100644 --- a/port/wch/ch32v/src/hals/spi.zig +++ b/port/wch/ch32v/src/hals/spi.zig @@ -118,10 +118,10 @@ pub const Config = struct { }; pub const instance = struct { - pub const SPI1: SPI = @enumFromInt(0); - pub const SPI2: SPI = @enumFromInt(1); + pub const SPI1: SPI = @fromBackingInt(0); + pub const SPI2: SPI = @fromBackingInt(1); pub fn num(instance_number: u2) SPI { - return @enumFromInt(instance_number - 1); + return @fromBackingInt(instance_number - 1); } }; @@ -129,7 +129,7 @@ pub const SPI = enum(u1) { _, pub inline fn get_regs(spi: SPI) *volatile SPI_Regs { - return switch (@intFromEnum(spi)) { + return switch (@backingInt(spi)) { 0 => @ptrCast(SPI1), 1 => @ptrCast(SPI2), }; @@ -172,11 +172,11 @@ pub const SPI = enum(u1) { // Compile-time DMA validation if (comptime config.dma) |dma_cfg| { - const tx_peripheral = comptime if (@intFromEnum(spi) == 0) + const tx_peripheral = comptime if (@backingInt(spi) == 0) dma.Peripheral.SPI1_TX else dma.Peripheral.SPI2_TX; - const rx_peripheral = comptime if (@intFromEnum(spi) == 0) + const rx_peripheral = comptime if (@backingInt(spi) == 0) dma.Peripheral.SPI1_RX else dma.Peripheral.SPI2_RX; @@ -187,7 +187,7 @@ pub const SPI = enum(u1) { } // Enable peripheral clock - hal.clocks.enable_peripheral_clock(switch (@intFromEnum(spi)) { + hal.clocks.enable_peripheral_clock(switch (@backingInt(spi)) { 0 => .SPI1, 1 => .SPI2, }); @@ -195,15 +195,15 @@ pub const SPI = enum(u1) { // Configure AFIO remap (SPI1 only) hal.clocks.enable_afio_clock(); const AFIO = microzig.chip.peripherals.AFIO; - switch (@intFromEnum(spi)) { - 0 => AFIO.PCFR1.modify(.{ .SPI1_RM = @intFromEnum(config.remap) }), + switch (@backingInt(spi)) { + 0 => AFIO.PCFR1.modify(.{ .SPI1_RM = @backingInt(config.remap) }), // SPI2 does not have remap support on CH32V20x 1 => {}, } // Get peripheral clock frequency const rcc_clocks = hal.clocks.get_freqs(); - const pclk = if (@intFromEnum(spi) == 0) rcc_clocks.pclk2 else rcc_clocks.pclk1; + const pclk = if (@backingInt(spi) == 0) rcc_clocks.pclk2 else rcc_clocks.pclk1; // Calculate baud rate prescaler // SPI baud rate = PCLK / (2^(BR+1)) @@ -220,16 +220,16 @@ pub const SPI = enum(u1) { // Configure CTLR1 regs.CTLR1.write(.{ - .CPHA = @intFromEnum(config.phase), - .CPOL = @intFromEnum(config.polarity), + .CPHA = @backingInt(config.phase), + .CPOL = @backingInt(config.polarity), .MSTR = 1, // Master mode .BR = br, .SPE = 0, // Keep disabled for now - .LSBFIRST = @intFromEnum(config.bit_order), + .LSBFIRST = @backingInt(config.bit_order), .SSI = 1, // Internal slave select .SSM = 1, // Software slave management .RXONLY = 0, // Full duplex - .DFF = @intFromEnum(config.data_size), + .DFF = @backingInt(config.data_size), .CRCNEXT = 0, .CRCEN = 0, .BIDIOE = 0, diff --git a/port/wch/ch32v/src/hals/usart.zig b/port/wch/ch32v/src/hals/usart.zig index a6fc86c1d..207684fe8 100644 --- a/port/wch/ch32v/src/hals/usart.zig +++ b/port/wch/ch32v/src/hals/usart.zig @@ -95,7 +95,7 @@ pub const instance = struct { pub const USART2: USART = .USART2; pub const USART3: USART = .USART3; pub fn num(n: u2) USART { - return @enumFromInt(n); + return @fromBackingInt(n); } }; @@ -189,7 +189,7 @@ pub const USART = enum(u2) { } pub inline fn get_regs(usart: USART) *volatile UsartRegs { - return switch (@intFromEnum(usart)) { + return switch (@backingInt(usart)) { 0 => USART1, 1 => USART2, 2 => USART3, @@ -200,7 +200,7 @@ pub const USART = enum(u2) { /// Get the peripheral clock frequency for this USART instance inline fn get_pclk(usart: USART) u32 { const rcc_clocks = hal.clocks.get_freqs(); - return switch (@intFromEnum(usart)) { + return switch (@backingInt(usart)) { 0 => rcc_clocks.pclk2, // USART1 is on APB2 1, 2 => rcc_clocks.pclk1, // USART2/3 are on APB1 else => unreachable, @@ -223,7 +223,7 @@ pub const USART = enum(u2) { // Configure AFIO remap hal.clocks.enable_afio_clock(); const AFIO = microzig.chip.peripherals.AFIO; - const remap_bits = @intFromEnum(config.remap); + const remap_bits = @backingInt(config.remap); switch (usart) { .USART1 => { diff --git a/port/wch/ch32v/src/hals/usbfs.zig b/port/wch/ch32v/src/hals/usbfs.zig index 5d5206635..2362f71ff 100644 --- a/port/wch/ch32v/src/hals/usbfs.zig +++ b/port/wch/ch32v/src/hals/usbfs.zig @@ -45,7 +45,7 @@ fn PerEndpointArray(comptime N: comptime_int) type { } fn epn(ep: types.Endpoint.Num) u4 { - return @as(u4, @intCast(@intFromEnum(ep))); + return @as(u4, @intCast(@backingInt(ep))); } // --- USBHD token encodings --- const TOKEN_OUT: u2 = 0; @@ -214,7 +214,7 @@ pub fn Polled(comptime cfg: Config) type { } fn st(self: *Self, ep_num: types.Endpoint.Num, dir: types.Dir) *EP_State { - return &self.endpoints[@intFromEnum(ep_num)][@intFromEnum(dir)]; + return &self.endpoints[@backingInt(ep_num)][@backingInt(dir)]; } fn arm_ep0_out_always(self: *Self) void { @@ -225,9 +225,9 @@ pub fn Polled(comptime cfg: Config) type { fn on_bus_reset_local(self: *Self) void { // Clear state inline for (0..cfg.max_endpoints_count) |i| { - self.endpoints[i][@intFromEnum(types.Dir.Out)].rx_armed = false; - self.endpoints[i][@intFromEnum(types.Dir.Out)].rx_last_len = 0; - self.endpoints[i][@intFromEnum(types.Dir.In)].tx_busy = false; + self.endpoints[i][@backingInt(types.Dir.Out)].rx_armed = false; + self.endpoints[i][@backingInt(types.Dir.Out)].rx_last_len = 0; + self.endpoints[i][@backingInt(types.Dir.In)].tx_busy = false; } // Default: NAK all non-EP0 endpoints. @@ -255,13 +255,13 @@ pub fn Polled(comptime cfg: Config) type { switch (dir) { .In => switch (ep) { inline 0...15 => |i| { - const num: types.Endpoint.Num = @enumFromInt(i); + const num: types.Endpoint.Num = @fromBackingInt(i); controller.on_buffer(&self.interface, .{ .num = num, .dir = .In }); }, }, .Out => switch (ep) { inline 0...15 => |i| { - const num: types.Endpoint.Num = @enumFromInt(i); + const num: types.Endpoint.Num = @fromBackingInt(i); controller.on_buffer(&self.interface, .{ .num = num, .dir = .Out }); }, }, @@ -344,7 +344,7 @@ pub fn Polled(comptime cfg: Config) type { return; } - const num: types.Endpoint.Num = @enumFromInt(ep); + const num: types.Endpoint.Num = @fromBackingInt(ep); const st_out = self.st(num, .Out); // Only read if previously armed (ep_listen) @@ -365,7 +365,7 @@ pub fn Polled(comptime cfg: Config) type { // IN => into host from device fn handle_in(self: *Self, ep: u4, controller: anytype) void { - const num: types.Endpoint.Num = @enumFromInt(ep); + const num: types.Endpoint.Num = @fromBackingInt(ep); const st_in = self.st(num, .In); if (!st_in.tx_busy) return; diff --git a/port/wch/ch32v/src/hals/usbhs.zig b/port/wch/ch32v/src/hals/usbhs.zig index 6d0262416..9bd6bd5b1 100644 --- a/port/wch/ch32v/src/hals/usbhs.zig +++ b/port/wch/ch32v/src/hals/usbhs.zig @@ -46,7 +46,7 @@ fn PerEndpointArray(comptime N: comptime_int) type { } fn epn(ep: types.Endpoint.Num) u4 { - return @as(u4, @intCast(@intFromEnum(ep))); + return @as(u4, @intCast(@backingInt(ep))); } fn speed_type(comptime cfg: Config) u2 { if (!cfg.prefer_high_speed) return 0; // FS @@ -198,7 +198,7 @@ pub fn Polled(comptime cfg: Config) type { } fn st(self: *Self, ep_num: types.Endpoint.Num, dir: types.Dir) *EP_State { - return &self.endpoints[@intFromEnum(ep_num)][@intFromEnum(dir)]; + return &self.endpoints[@backingInt(ep_num)][@backingInt(dir)]; } fn arm_ep0_out_always(self: *Self) void { @@ -212,9 +212,9 @@ pub fn Polled(comptime cfg: Config) type { fn on_bus_reset_local(self: *Self) void { // Clear state inline for (0..cfg.max_endpoints_count) |i| { - self.endpoints[i][@intFromEnum(types.Dir.Out)].rx_armed = false; - self.endpoints[i][@intFromEnum(types.Dir.Out)].rx_last_len = 0; - self.endpoints[i][@intFromEnum(types.Dir.In)].tx_busy = false; + self.endpoints[i][@backingInt(types.Dir.Out)].rx_armed = false; + self.endpoints[i][@backingInt(types.Dir.Out)].rx_last_len = 0; + self.endpoints[i][@backingInt(types.Dir.In)].tx_busy = false; } // Default: NAK all non-EP0 endpoints. @@ -242,13 +242,13 @@ pub fn Polled(comptime cfg: Config) type { switch (dir) { .In => switch (ep) { inline 0...15 => |i| { - const num: types.Endpoint.Num = @enumFromInt(i); + const num: types.Endpoint.Num = @fromBackingInt(i); controller.on_buffer(&self.interface, .{ .num = num, .dir = .In }); }, }, .Out => switch (ep) { inline 0...15 => |i| { - const num: types.Endpoint.Num = @enumFromInt(i); + const num: types.Endpoint.Num = @fromBackingInt(i); controller.on_buffer(&self.interface, .{ .num = num, .dir = .Out }); }, }, @@ -383,7 +383,7 @@ pub fn Polled(comptime cfg: Config) type { return; } - const num: types.Endpoint.Num = @enumFromInt(ep); + const num: types.Endpoint.Num = @fromBackingInt(ep); const st_out = self.st(num, .Out); // Only read if previously armed (ep_listen) @@ -405,7 +405,7 @@ pub fn Polled(comptime cfg: Config) type { // IN => into host from device fn handle_in(self: *Self, ep: u4, controller: anytype) void { - const num: types.Endpoint.Num = @enumFromInt(ep); + const num: types.Endpoint.Num = @fromBackingInt(ep); const st_in = self.st(num, .In); if (!st_in.tx_busy) { diff --git a/sim/aviron/build.zig b/sim/aviron/build.zig index 3ad8f5f99..25f065fc9 100644 --- a/sim/aviron/build.zig +++ b/sim/aviron/build.zig @@ -85,7 +85,7 @@ pub fn build(b: *Build) !void { .root_module = b.createModule(.{ .root_source_file = b.path(b.fmt("samples/{s}.zig", .{sample_name})), .target = avr_target, - .optimize = .ReleaseSmall, + .optimize = .small, .strip = false, }), .use_llvm = true, @@ -105,7 +105,7 @@ pub fn build(b: *Build) !void { // Set up test scanning - this reads existing JSON files and runs tests // Only set up if we're not exclusively running update-testsuite - try add_test_suite(b, test_step, debug_testsuite_step, target, avr_target, optimize, aviron_module); + try add_test_suite(b, test_step, debug_testsuite_step, target, avr_target, optimize, aviron_module, flags_module); } fn add_test_suite( @@ -116,6 +116,7 @@ fn add_test_suite( avr_target: ResolvedTarget, optimize: std.builtin.OptimizeMode, aviron_module: *Build.Module, + flags_module: *Build.Module, ) !void { const unit_tests = b.addTest(.{ .root_module = b.createModule(.{ @@ -148,6 +149,7 @@ fn add_test_suite( .use_llvm = true, }); testrunner_exe.root_module.addImport("aviron", aviron_module); + testrunner_exe.root_module.addImport("flags", flags_module); debug_step.dependOn(&b.addInstallArtifact(testrunner_exe, .{}).step); diff --git a/sim/aviron/src/lib/Cpu.zig b/sim/aviron/src/lib/Cpu.zig index 104a67149..a0b84a954 100644 --- a/sim/aviron/src/lib/Cpu.zig +++ b/sim/aviron/src/lib/Cpu.zig @@ -230,7 +230,7 @@ fn shift_program_counter(cpu: *Cpu, by: i12) void { fn fetch_code(cpu: *Cpu) !u16 { const value = try cpu.flash.read(cpu.pc); cpu.pc +%= 1; // increment with wraparound - cpu.pc &= @intFromEnum(cpu.code_model); // then wrap to lower bit size + cpu.pc &= @backingInt(cpu.code_model); // then wrap to lower bit size return value; } @@ -251,7 +251,7 @@ fn pop(cpu: *Cpu) !u8 { fn push_code_loc(cpu: *Cpu, val: u24) !void { const pc: u24 = val; - const mask: u24 = @intFromEnum(cpu.code_model); + const mask: u24 = @backingInt(cpu.code_model); // AVR pushes return address bytes so that RET pops low byte first. // With write-then-decrement PUSH, we push least significant byte first. @@ -267,7 +267,7 @@ fn push_code_loc(cpu: *Cpu, val: u24) !void { } fn pop_code_loc(cpu: *Cpu) !u24 { - const mask = @intFromEnum(cpu.code_model); + const mask = @backingInt(cpu.code_model); var pc: u24 = 0; if ((mask & 0xFF0000) != 0) { @@ -287,7 +287,7 @@ const WideReg = enum(u8) { y = 1, z = 2, fn base(wr: WideReg) usize { - return 26 + 2 * @intFromEnum(wr); + return 26 + 2 * @backingInt(wr); } }; diff --git a/sim/aviron/src/lib/decoder.zig b/sim/aviron/src/lib/decoder.zig index 4760edb04..1d83d212f 100644 --- a/sim/aviron/src/lib/decoder.zig +++ b/sim/aviron/src/lib/decoder.zig @@ -52,7 +52,7 @@ pub fn decode(inst_val: u16) !Instruction { const Dst = @TypeOf(@field(result, name)); @field(result, name) = switch (@typeInfo(Dst)) { - .@"enum" => @enumFromInt(raw), + .@"enum" => @fromBackingInt(raw), else => raw, }; } diff --git a/sim/aviron/src/libtestsuite/lib.zig b/sim/aviron/src/libtestsuite/lib.zig index f5dff694c..e7623904b 100644 --- a/sim/aviron/src/libtestsuite/lib.zig +++ b/sim/aviron/src/libtestsuite/lib.zig @@ -26,7 +26,7 @@ pub inline fn write(comptime chan: Channel, string: []const u8) void { \\out %[port], %[code] : : [code] "r" (c), - [port] "i" (@intFromEnum(chan)), + [port] "i" (@backingInt(chan)), ); } } diff --git a/sim/aviron/src/main.zig b/sim/aviron/src/main.zig index 5915e8e73..4a55dd99b 100644 --- a/sim/aviron/src/main.zig +++ b/sim/aviron/src/main.zig @@ -321,7 +321,7 @@ const IO = struct { fn dev_read(ctx: *anyopaque, addr: IOBusType.Address) u8 { const bus_io: *IO = @ptrCast(@alignCast(ctx)); - const reg: Register = @enumFromInt(@as(aviron.IO.Address, @intCast(addr))); + const reg: Register = @fromBackingInt(@as(aviron.IO.Address, @intCast(addr))); return switch (reg) { .exit => 0, .stdio => blk: { @@ -371,7 +371,7 @@ const IO = struct { fn dev_write_masked(ctx: *anyopaque, addr: IOBusType.Address, mask: u8, value: u8) void { const bus_io: *IO = @ptrCast(@alignCast(ctx)); - const reg: Register = @enumFromInt(@as(aviron.IO.Address, @intCast(addr))); + const reg: Register = @fromBackingInt(@as(aviron.IO.Address, @intCast(addr))); switch (reg) { .exit => { bus_io.exit_code = value & mask; diff --git a/sim/aviron/src/shared/isa.zig b/sim/aviron/src/shared/isa.zig index 889900c54..4fc672fc2 100644 --- a/sim/aviron/src/shared/isa.zig +++ b/sim/aviron/src/shared/isa.zig @@ -150,22 +150,22 @@ pub const Register3 = enum(u3) { pub fn format(r: Register3, writer: *std.Io.Writer) !void { try writer.print("r{}", .{ - 16 + @as(u32, @intFromEnum(r)), + 16 + @as(u32, @backingInt(r)), }); } /// Returns the numeric value of this value. pub fn int(r: Register3) u4 { - return @intFromEnum(r); + return @backingInt(r); } /// Returns the register number. pub fn num(r: Register3) u5 { - return 16 + @as(u5, @intFromEnum(r)); + return 16 + @as(u5, @backingInt(r)); } pub fn reg(r: Register3) Register { - return @enumFromInt(r.num()); + return @fromBackingInt(r.num()); } }; @@ -189,22 +189,22 @@ pub const Register4 = enum(u4) { pub fn format(reg4: Register4, writer: *std.Io.Writer) !void { try writer.print("r{}", .{ - 16 + @as(u32, @intFromEnum(reg4)), + 16 + @as(u32, @backingInt(reg4)), }); } /// Returns the numeric value of this value. pub fn int(r4: Register4) u4 { - return @intFromEnum(r4); + return @backingInt(r4); } /// Returns the register number. pub fn num(r4: Register4) u5 { - return 16 + @as(u5, @intFromEnum(r4)); + return 16 + @as(u5, @backingInt(r4)); } pub fn reg(r4: Register4) Register { - return @enumFromInt(r4.num()); + return @fromBackingInt(r4.num()); } }; @@ -228,23 +228,23 @@ pub const Register4_pair = enum(u4) { pub fn format(reg4: Register4_pair, writer: *std.Io.Writer) !void { try writer.print("r{}:r{}", .{ - @as(u32, @intFromEnum(reg4)) * 2 + 1, - @as(u32, @intFromEnum(reg4)) * 2, + @as(u32, @backingInt(reg4)) * 2 + 1, + @as(u32, @backingInt(reg4)) * 2, }); } /// Returns the numeric value of this value. pub fn int(r4: Register4_pair) u4 { - return @intFromEnum(r4); + return @backingInt(r4); } /// Returns the lower register number of the pair pub fn num(r4: Register4_pair) u5 { - return @as(u5, @intFromEnum(r4)) * 2; + return @as(u5, @backingInt(r4)) * 2; } pub fn reg(r4: Register4_pair) Register { - return @enumFromInt(r4.num()); + return @fromBackingInt(r4.num()); } }; @@ -283,17 +283,17 @@ pub const Register = enum(u5) { r31 = 31, pub fn format(reg5: Register, writer: *std.Io.Writer) !void { - try writer.print("r{}", .{@intFromEnum(reg5)}); + try writer.print("r{}", .{@backingInt(reg5)}); } /// Returns the numeric value of this value. pub fn int(r5: Register) u5 { - return @intFromEnum(r5); + return @backingInt(r5); } /// Returns the register number. pub fn num(r5: Register) u5 { - return @intFromEnum(r5); + return @backingInt(r5); } pub fn reg(r: Register) Register { return r; @@ -316,12 +316,12 @@ pub const StatusRegisterBit = enum(u3) { /// Returns the bit index. pub fn num(bit: StatusRegisterBit) u3 { - return @intFromEnum(bit); + return @backingInt(bit); } /// Returns the bit mask. pub fn mask(bit: StatusRegisterBit) u8 { - return @as(u8, 1) << @intFromEnum(bit); + return @as(u8, 1) << @backingInt(bit); } }; @@ -329,16 +329,16 @@ pub const DataBit = enum(u3) { _, pub fn format(bit: DataBit, writer: anytype) !void { - try writer.print("{}", .{@intFromEnum(bit)}); + try writer.print("{}", .{@backingInt(bit)}); } /// Returns the bit index. pub fn num(bit: DataBit) u3 { - return @intFromEnum(bit); + return @backingInt(bit); } /// Returns the bit mask. pub fn mask(bit: DataBit) u8 { - return @as(u8, 1) << @intFromEnum(bit); + return @as(u8, 1) << @backingInt(bit); } }; diff --git a/sim/aviron/src/testconfig.zig b/sim/aviron/src/testconfig.zig index 9ed10aba2..f710fd3ba 100644 --- a/sim/aviron/src/testconfig.zig +++ b/sim/aviron/src/testconfig.zig @@ -70,7 +70,7 @@ pub const TestSuiteConfig = struct { cpu: ?[]const u8 = null, cpus: ?[][]const u8 = null, // Alternative to cpu: run test against multiple MCUs - optimize: std.builtin.OptimizeMode = .ReleaseSmall, + optimize: std.builtin.OptimizeMode = .small, gcc_flags: []const []const u8 = &.{ "-g", diff --git a/sim/aviron/src/testrunner.zig b/sim/aviron/src/testrunner.zig index 40ae776a7..b6046bbf7 100644 --- a/sim/aviron/src/testrunner.zig +++ b/sim/aviron/src/testrunner.zig @@ -268,19 +268,21 @@ pub fn main(init: std.process.Init) !u8 { const gpa = init.gpa; const args = try init.minimal.args.toSlice(arena.allocator()); const cli_args, const positionals = try flags.parse(CLI_Args, arena.allocator(), args); + var write_buf: [64]u8 = undefined; if (cli_args.help) { - const stdout = std.Io.File.stdout().writer(&.{}); - try stdout.interface.print("{s}", .{CLI_Args.usage}); + const stdout = std.Io.File.stdout().writer(init.io, &write_buf); + var writer = stdout.interface; + try writer.print("{s}", .{CLI_Args.usage}); return 0; } const config_path = cli_args.config orelse @panic("missing configuration path!"); const config = blk: { - var file = try std.fs.cwd().openFile(config_path, .{}); - defer file.close(); + var file = try std.Io.Dir.cwd().openFile(init.io, config_path, .{}); + defer file.close(init.io); - break :blk try testconfig.TestSuiteConfig.load(arena.allocator(), file); + break :blk try testconfig.TestSuiteConfig.load(arena.allocator(), init.io, file); }; if (positionals.len == 0) @@ -295,7 +297,7 @@ pub fn main(init: std.process.Init) !u8 { // Run test against multiple MCUs for (cpus) |mcu_name| { std.debug.print("Running test with MCU: {s}\n", .{mcu_name}); - try run_test_with_mcu(gpa, mcu_name, config, positionals, options); + try run_test_with_mcu(gpa, mcu_name, config, options, positionals); } } else { // Run test against a single MCU (default to ATmega328P if not specified) @@ -393,7 +395,7 @@ const IO = struct { fn dev_read(ctx: *anyopaque, addr: aviron.IO.Address) u8 { const io: *IO = @ptrCast(@alignCast(ctx)); - const reg: Register = @enumFromInt(addr); + const reg: Register = @fromBackingInt(addr); return switch (reg) { .exit => 0, .stdio => if (io.stdin.len > 0) blk: { @@ -446,7 +448,7 @@ const IO = struct { /// `mask` determines which bits of `value` are written. To write everything, use `0xFF` for `mask`. fn dev_write_masked(ctx: *anyopaque, addr: aviron.IO.Address, mask: u8, value: u8) void { const io: *IO = @ptrCast(@alignCast(ctx)); - const reg: Register = @enumFromInt(addr); + const reg: Register = @fromBackingInt(addr); switch (reg) { .exit => { io.exit_code = value & mask; diff --git a/sim/aviron/testsuite/instructions/asr-atmega2560.elf.json b/sim/aviron/testsuite/instructions/asr-atmega2560.elf.json index 46bfa4566..0fdee1e83 100644 --- a/sim/aviron/testsuite/instructions/asr-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/asr-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/asr-attiny816.elf.json b/sim/aviron/testsuite/instructions/asr-attiny816.elf.json index 51d640fde..be01f8beb 100644 --- a/sim/aviron/testsuite/instructions/asr-attiny816.elf.json +++ b/sim/aviron/testsuite/instructions/asr-attiny816.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "attiny816", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldd_y-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldd_y-atmega2560.elf.json index e4e55b0c6..7761eb293 100644 --- a/sim/aviron/testsuite/instructions/ldd_y-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldd_y-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldd_y-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldd_y-atmega328p.elf.json index f467ce462..b1718cb49 100644 --- a/sim/aviron/testsuite/instructions/ldd_y-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldd_y-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldd_z-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldd_z-atmega2560.elf.json index 4cd66c446..7036600fd 100644 --- a/sim/aviron/testsuite/instructions/ldd_z-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldd_z-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldd_z-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldd_z-atmega328p.elf.json index 3094e2693..ff60ea60d 100644 --- a/sim/aviron/testsuite/instructions/ldd_z-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldd_z-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldx_ii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldx_ii-atmega2560.elf.json index 27e845832..ff8e9f7df 100644 --- a/sim/aviron/testsuite/instructions/ldx_ii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldx_ii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldx_ii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldx_ii-atmega328p.elf.json index 4bc7222cc..1918cf014 100644 --- a/sim/aviron/testsuite/instructions/ldx_ii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldx_ii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldx_iii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldx_iii-atmega2560.elf.json index 2433bb049..014a92de5 100644 --- a/sim/aviron/testsuite/instructions/ldx_iii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldx_iii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldx_iii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldx_iii-atmega328p.elf.json index 883d7c5c2..5721ffbaf 100644 --- a/sim/aviron/testsuite/instructions/ldx_iii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldx_iii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldy_ii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldy_ii-atmega2560.elf.json index c35183098..bfe40f9ec 100644 --- a/sim/aviron/testsuite/instructions/ldy_ii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldy_ii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldy_ii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldy_ii-atmega328p.elf.json index f39c88fdc..672bb2858 100644 --- a/sim/aviron/testsuite/instructions/ldy_ii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldy_ii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldy_iii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldy_iii-atmega2560.elf.json index 87d4675de..c73856e62 100644 --- a/sim/aviron/testsuite/instructions/ldy_iii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldy_iii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldy_iii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldy_iii-atmega328p.elf.json index fa626dda3..f310006a0 100644 --- a/sim/aviron/testsuite/instructions/ldy_iii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldy_iii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldy_iv-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldy_iv-atmega2560.elf.json index 98b7b9e96..4a3370a7c 100644 --- a/sim/aviron/testsuite/instructions/ldy_iv-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldy_iv-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldy_iv-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldy_iv-atmega328p.elf.json index 885146c7b..1b2a4fe36 100644 --- a/sim/aviron/testsuite/instructions/ldy_iv-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldy_iv-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldz_ii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldz_ii-atmega2560.elf.json index 7c5b01d5e..863ee969c 100644 --- a/sim/aviron/testsuite/instructions/ldz_ii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldz_ii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldz_ii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldz_ii-atmega328p.elf.json index e6223429e..27992da1b 100644 --- a/sim/aviron/testsuite/instructions/ldz_ii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldz_ii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldz_iii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldz_iii-atmega2560.elf.json index 9877c660a..9202fb462 100644 --- a/sim/aviron/testsuite/instructions/ldz_iii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldz_iii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldz_iii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldz_iii-atmega328p.elf.json index af837660f..3cdb0b397 100644 --- a/sim/aviron/testsuite/instructions/ldz_iii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldz_iii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldz_iv-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ldz_iv-atmega2560.elf.json index 551e807ac..b71d33d8a 100644 --- a/sim/aviron/testsuite/instructions/ldz_iv-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ldz_iv-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ldz_iv-atmega328p.elf.json b/sim/aviron/testsuite/instructions/ldz_iv-atmega328p.elf.json index 01941d919..f2e25046a 100644 --- a/sim/aviron/testsuite/instructions/ldz_iv-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/ldz_iv-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/lsr-atmega2560.elf.json b/sim/aviron/testsuite/instructions/lsr-atmega2560.elf.json index a004549b1..fd91dcf52 100644 --- a/sim/aviron/testsuite/instructions/lsr-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/lsr-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/lsr-attiny816.elf.json b/sim/aviron/testsuite/instructions/lsr-attiny816.elf.json index 0ad7b1665..7d82799e9 100644 --- a/sim/aviron/testsuite/instructions/lsr-attiny816.elf.json +++ b/sim/aviron/testsuite/instructions/lsr-attiny816.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "attiny816", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/mul-atmega2560.elf.json b/sim/aviron/testsuite/instructions/mul-atmega2560.elf.json index 859944cf4..89d660f1c 100644 --- a/sim/aviron/testsuite/instructions/mul-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/mul-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/mul-attiny816.elf.json b/sim/aviron/testsuite/instructions/mul-attiny816.elf.json index bc9d7067a..f372acbf0 100644 --- a/sim/aviron/testsuite/instructions/mul-attiny816.elf.json +++ b/sim/aviron/testsuite/instructions/mul-attiny816.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "attiny816", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/muls-atmega2560.elf.json b/sim/aviron/testsuite/instructions/muls-atmega2560.elf.json index 968555bed..2465f9c38 100644 --- a/sim/aviron/testsuite/instructions/muls-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/muls-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/muls-attiny816.elf.json b/sim/aviron/testsuite/instructions/muls-attiny816.elf.json index 69406a42f..905b91229 100644 --- a/sim/aviron/testsuite/instructions/muls-attiny816.elf.json +++ b/sim/aviron/testsuite/instructions/muls-attiny816.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "attiny816", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/mulsu-atmega2560.elf.json b/sim/aviron/testsuite/instructions/mulsu-atmega2560.elf.json index 6d6792a7e..e9675d95d 100644 --- a/sim/aviron/testsuite/instructions/mulsu-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/mulsu-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/mulsu-attiny816.elf.json b/sim/aviron/testsuite/instructions/mulsu-attiny816.elf.json index 1c8055e12..ab6f205e7 100644 --- a/sim/aviron/testsuite/instructions/mulsu-attiny816.elf.json +++ b/sim/aviron/testsuite/instructions/mulsu-attiny816.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "attiny816", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/ror-atmega2560.elf.json b/sim/aviron/testsuite/instructions/ror-atmega2560.elf.json index d39da8ac6..f415c5bab 100644 --- a/sim/aviron/testsuite/instructions/ror-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/ror-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", @@ -103,4 +103,4 @@ "-nostdinc", "-ffreestanding" ] -} \ No newline at end of file +} diff --git a/sim/aviron/testsuite/instructions/ror-attiny816.elf.json b/sim/aviron/testsuite/instructions/ror-attiny816.elf.json index e054e3a46..10ab7b232 100644 --- a/sim/aviron/testsuite/instructions/ror-attiny816.elf.json +++ b/sim/aviron/testsuite/instructions/ror-attiny816.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "attiny816", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", @@ -103,4 +103,4 @@ "-nostdinc", "-ffreestanding" ] -} \ No newline at end of file +} diff --git a/sim/aviron/testsuite/instructions/sbiw-atmega2560.elf.json b/sim/aviron/testsuite/instructions/sbiw-atmega2560.elf.json index 6086d1019..80a23d498 100644 --- a/sim/aviron/testsuite/instructions/sbiw-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/sbiw-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/sbiw-atmega328p.elf.json b/sim/aviron/testsuite/instructions/sbiw-atmega328p.elf.json index 2a3da12aa..80cce5dba 100644 --- a/sim/aviron/testsuite/instructions/sbiw-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/sbiw-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/sty_ii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/sty_ii-atmega2560.elf.json index c35183098..bfe40f9ec 100644 --- a/sim/aviron/testsuite/instructions/sty_ii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/sty_ii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/sty_ii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/sty_ii-atmega328p.elf.json index f39c88fdc..672bb2858 100644 --- a/sim/aviron/testsuite/instructions/sty_ii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/sty_ii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/sty_iii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/sty_iii-atmega2560.elf.json index 87d4675de..c73856e62 100644 --- a/sim/aviron/testsuite/instructions/sty_iii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/sty_iii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/sty_iii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/sty_iii-atmega328p.elf.json index fa626dda3..f310006a0 100644 --- a/sim/aviron/testsuite/instructions/sty_iii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/sty_iii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/stz_ii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/stz_ii-atmega2560.elf.json index 7c5b01d5e..863ee969c 100644 --- a/sim/aviron/testsuite/instructions/stz_ii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/stz_ii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/stz_ii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/stz_ii-atmega328p.elf.json index e6223429e..27992da1b 100644 --- a/sim/aviron/testsuite/instructions/stz_ii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/stz_ii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/stz_iii-atmega2560.elf.json b/sim/aviron/testsuite/instructions/stz_iii-atmega2560.elf.json index 9877c660a..9202fb462 100644 --- a/sim/aviron/testsuite/instructions/stz_iii-atmega2560.elf.json +++ b/sim/aviron/testsuite/instructions/stz_iii-atmega2560.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega2560", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/testsuite/instructions/stz_iii-atmega328p.elf.json b/sim/aviron/testsuite/instructions/stz_iii-atmega328p.elf.json index af837660f..3cdb0b397 100644 --- a/sim/aviron/testsuite/instructions/stz_iii-atmega328p.elf.json +++ b/sim/aviron/testsuite/instructions/stz_iii-atmega328p.elf.json @@ -95,7 +95,7 @@ "mileage": 0, "cpu": "atmega328p", "cpus": null, - "optimize": "ReleaseSmall", + "optimize": "small", "gcc_flags": [ "-g", "-O2", diff --git a/sim/aviron/tools/generate_tables.zig b/sim/aviron/tools/generate_tables.zig index 65bda2937..a118a1d33 100644 --- a/sim/aviron/tools/generate_tables.zig +++ b/sim/aviron/tools/generate_tables.zig @@ -182,7 +182,7 @@ pub fn main(init: std.process.Init) !void { const txt = try buf.toOwnedSliceSentinel(0); defer gpa.free(txt); - var tree = try std.zig.Ast.parse(gpa, txt, .zig); + var tree = try std.zig.Ast.parse(gpa, txt, .{}); defer tree.deinit(gpa); var stdout_buf: [4096]u8 = undefined; diff --git a/tools/esp-image/src/elf2image.zig b/tools/esp-image/src/elf2image.zig index cf289277c..74daf1e91 100644 --- a/tools/esp-image/src/elf2image.zig +++ b/tools/esp-image/src/elf2image.zig @@ -312,8 +312,8 @@ const FileHeader = struct { try writer.writeAll(&.{ 0xE9, self.number_of_segments, - @intFromEnum(self.flash_mode), - (@as(u8, @intFromEnum(self.flash_size)) << 4) | @intFromEnum(self.flash_freq), + @backingInt(self.flash_mode), + (@as(u8, @backingInt(self.flash_size)) << 4) | @backingInt(self.flash_freq), }); try writer.writeInt(u32, self.entry_point, .little); } @@ -332,9 +332,9 @@ const ExtendedFileHeader = struct { hash: bool, pub fn write_to(self: ExtendedFileHeader, writer: *std.Io.Writer) !void { - try writer.writeByte(@intFromEnum(self.wp)); + try writer.writeByte(@backingInt(self.wp)); try writer.writeInt(u24, self.flash_pins_drive_settings, .little); - try writer.writeInt(u16, @intFromEnum(self.chip_id), .little); + try writer.writeInt(u16, @backingInt(self.chip_id), .little); try writer.writeByte(0); try writer.writeInt(u16, self.min_rev, .little); try writer.writeInt(u16, self.max_rev, .little); diff --git a/tools/esp-image/src/esp_image.zig b/tools/esp-image/src/esp_image.zig index 611de4590..c1cbe3f01 100644 --- a/tools/esp-image/src/esp_image.zig +++ b/tools/esp-image/src/esp_image.zig @@ -37,7 +37,7 @@ pub const Flash_MMU_PageSize = enum(u8) { @"64k" = 16, pub fn in_bytes(self: Flash_MMU_PageSize) usize { - return @as(usize, 1) << @intCast(@intFromEnum(self)); + return @as(usize, 1) << @intCast(@backingInt(self)); } }; diff --git a/tools/generate_linker_script.zig b/tools/generate_linker_script.zig index 52724ffb5..5cc7cfe17 100644 --- a/tools/generate_linker_script.zig +++ b/tools/generate_linker_script.zig @@ -59,10 +59,10 @@ pub fn main(init: std.process.Init) !void { } else { region_name.* = try std.fmt.allocPrint(allocator, "{s}{}", .{ @tagName(region.tag), - counters[@intFromEnum(region.tag)], + counters[@backingInt(region.tag)], }); } - counters[@intFromEnum(region.tag)] += 1; + counters[@backingInt(region.tag)] += 1; } } diff --git a/tools/printer/src/Elf.zig b/tools/printer/src/Elf.zig index 26976454f..b40fb626b 100644 --- a/tools/printer/src/Elf.zig +++ b/tools/printer/src/Elf.zig @@ -90,7 +90,7 @@ pub fn init(allocator: std.mem.Allocator, file_reader: *std.Io.File.Reader) !Elf const section_data = try file_reader.interface.readAlloc(allocator, shdr.sh_size); errdefer allocator.free(section_data); - sections.put(@enumFromInt(section_field_value), section_data); + sections.put(@fromBackingInt(section_field_value), section_data); } } } diff --git a/tools/printer/tests/test_program.dwarf32.zon b/tools/printer/tests/test_program.dwarf32.zon index 3a5955f4f..b67a0f8b7 100644 --- a/tools/printer/tests/test_program.dwarf32.zon +++ b/tools/printer/tests/test_program.dwarf32.zon @@ -1,4 +1,4 @@ -.{ .zig_version = "0.17.0-dev.1158+1d1193aa7", .tests = .{ +.{ .zig_version = "0.17.0-dev.1471+ff10b90bc", .tests = .{ .{ .address = 16941056, .expected = .{ .line = 163, .column = 33, diff --git a/tools/printer/tests/test_program.dwarf64.zon b/tools/printer/tests/test_program.dwarf64.zon index 3370f16bd..bf1751e70 100644 --- a/tools/printer/tests/test_program.dwarf64.zon +++ b/tools/printer/tests/test_program.dwarf64.zon @@ -1,4 +1,4 @@ -.{ .zig_version = "0.17.0-dev.1158+1d1193aa7", .tests = .{ +.{ .zig_version = "0.17.0-dev.1471+ff10b90bc", .tests = .{ .{ .address = 16969728, .expected = .{ .line = 163, .column = 33, diff --git a/tools/regz/build.zig.zon b/tools/regz/build.zig.zon index 81cdc6f64..c6f7dd226 100644 --- a/tools/regz/build.zig.zon +++ b/tools/regz/build.zig.zon @@ -10,13 +10,13 @@ }, .dependencies = .{ .libxml2 = .{ - .url = "git+https://github.com/allyourcodebase/libxml2.git#e2c881ccb72dc96b03bb80f1f4c4b386969b76f7", - .hash = "libxml2-2.15.1-2-qHdjhjJXAAAF6fWNrfH_GFaXDHRNjlYQoeKF_RBnWtVu", + .url = "git+https://github.com/allyourcodebase/libxml2.git#38fb69d375bc364490a5cc9ac465732d03c836d3", + .hash = "libxml2-2.15.1-2-qHdjhjJXAADjFgEs5a_JV1oMyd9G6EsY12PvbfRAZwG-", }, .virtual_io = .{ .path = "../../modules/virtual-io" }, .zqlite = .{ - .url = "git+https://github.com/karlseguin/zqlite.zig#95054418207705ed9188b4d7467fec5136100f13", - .hash = "zqlite-0.0.1-RWLaY9UynADU9w6axCjGV9--FpxxKO_qu1qmorhTj2D9", + .url = "git+https://github.com/karlseguin/zqlite.zig?ref=dev#b6e439d83fe7a06c2c7e8eed8e07bd79c87b0925", + .hash = "zqlite-0.0.1-RWLaY8k8nACL-MBb7ZkqdAESSZDG-1aCWwnathuy7Mzb", }, }, } diff --git a/tools/regz/src/Database.zig b/tools/regz/src/Database.zig index 9f0395faf..5a8c0957f 100644 --- a/tools/regz/src/Database.zig +++ b/tools/regz/src/Database.zig @@ -149,8 +149,8 @@ pub const Register = struct { const description: ?[]const u8 = if (row.nullableText(3)) |text| try allocator.dupe(u8, text) else null; const ref_type: ?[]const u8 = if (row.nullableText(4)) |text| try allocator.dupe(u8, text) else null; return Register{ - .id = @enumFromInt(row.int(0)), - .struct_id = if (row.nullableInt(1)) |value| @enumFromInt(value) else null, + .id = @fromBackingInt(@intCast(row.int(0))), + .struct_id = if (row.nullableInt(1)) |value| @fromBackingInt(@intCast(value)) else null, .name = name, .description = description, .ref_type = ref_type, @@ -591,7 +591,7 @@ fn ID(comptime T: type, comptime table_name: []const u8) type { writer: *std.Io.Writer, ) !void { const ID_Type = @TypeOf(id); - try writer.print("{s}({})", .{ ID_Type.table, @intFromEnum(id) }); + try writer.print("{s}({})", .{ ID_Type.table, @backingInt(id) }); } }; } @@ -719,7 +719,7 @@ pub fn create_device(db: *Database, opts: CreateDeviceOptions) !DeviceID { }) orelse unreachable; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } pub fn get_peripheral_by_name(db: *Database, name: []const u8) !?PeripheralID { @@ -728,18 +728,18 @@ pub fn get_peripheral_by_name(db: *Database, name: []const u8) !?PeripheralID { }) orelse return null; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } /// Get the struct ID for a struct decl with `name` in parent struct pub fn get_struct_decl_id_by_name(db: *Database, parent: StructID, name: []const u8) !StructID { const row = try db.conn.row("SELECT struct_id FROM struct_decls WHERE parent_id = ? and name = ?", .{ - @intFromEnum(parent), + @backingInt(parent), name, }) orelse return error.MissingEntity; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } pub fn get_struct_decl_by_name(db: *Database, allocator: Allocator, parent: StructID, name: []const u8) !StructDecl { @@ -752,7 +752,7 @@ pub fn get_struct_decl_by_name(db: *Database, allocator: Allocator, parent: Stru }); return db.one_alloc(StructDecl, allocator, query, .{ - @intFromEnum(parent), + @backingInt(parent), name, }); } @@ -767,7 +767,7 @@ pub fn get_peripheral_by_struct_id(db: *Database, allocator: Allocator, struct_i }); return try db.get_one_alloc(Peripheral, allocator, query, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), }); } @@ -781,26 +781,26 @@ pub fn get_struct_decl_by_struct_id(db: *Database, allocator: Allocator, struct_ }); return try db.get_one_alloc(StructDecl, allocator, query, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), }); } pub fn get_peripheral_struct(db: *Database, peripheral: PeripheralID) !StructID { const row = try db.conn.row("SELECT struct_id FROM peripherals WHERE id = ? LIMIT 1", .{ - @intFromEnum(peripheral), + @backingInt(peripheral), }) orelse return error.MissingEntity; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } pub fn get_register_struct(db: *Database, register: RegisterID) !?StructID { const row = try db.conn.row("SELECT struct_id FROM registers WHERE id = ?", .{ - @intFromEnum(register), + @backingInt(register), }) orelse return null; defer row.deinit(); - return if (row.nullableInt(0)) |int| @enumFromInt(int) else null; + return if (row.nullableInt(0)) |int| @fromBackingInt(@intCast(int)) else null; } pub fn get_device_id_by_name(db: *Database, name: []const u8) !?DeviceID { @@ -809,7 +809,7 @@ pub fn get_device_id_by_name(db: *Database, name: []const u8) !?DeviceID { }) orelse return null; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } fn scan_row(comptime T: type, allocator: Allocator, row: zqlite.Row) !T { @@ -820,7 +820,7 @@ fn scan_row(comptime T: type, allocator: Allocator, row: zqlite.Row) !T { if (@hasDecl(field_type, "to_string")) @field(entry, field_name) = std.meta.stringToEnum(field_type, row.text(i)) orelse return error.Unknown else - @field(entry, field_name) = @enumFromInt(row.int(i)); + @field(entry, field_name) = @fromBackingInt(@intCast(row.int(i))); } else if (@typeInfo(field_type) == .int) { @field(entry, field_name) = @intCast(row.int(i)); } else switch (field_type) { @@ -834,7 +834,7 @@ fn scan_row(comptime T: type, allocator: Allocator, row: zqlite.Row) !T { @field(entry, field_name) = if (row.nullableInt(i)) |value| @intCast(value) else null; }, ?StructID, ?EnumID => { - @field(entry, field_name) = if (row.nullableInt(i)) |value| @enumFromInt(value) else null; + @field(entry, field_name) = if (row.nullableInt(i)) |value| @fromBackingInt(@intCast(value)) else null; }, ?Access => { @field(entry, field_name) = if (row.nullableText(i)) |text| (std.meta.stringToEnum(Access, text) orelse return error.Unknown) else null; @@ -880,7 +880,7 @@ pub fn get_struct_decls(db: *Database, allocator: Allocator, parent: StructID) ! }); return db.all(StructDecl, query, allocator, .{ - @intFromEnum(parent), + @backingInt(parent), }); } @@ -906,8 +906,8 @@ pub fn get_registers_with_mode( }); return db.all(Register, query, allocator, .{ - @intFromEnum(struct_id), - @intFromEnum(mode_id), + @backingInt(struct_id), + @backingInt(mode_id), }); } @@ -928,7 +928,7 @@ pub fn get_struct_registers( }); return db.all(Register, query, allocator, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), }); } @@ -951,7 +951,7 @@ fn get_nested_struct_fields( }); return db.all(NestedStructField, query, allocator, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), }); } @@ -1046,7 +1046,7 @@ pub fn get_struct_modes( }); return db.all(Mode, query, allocator, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), }); } @@ -1087,7 +1087,7 @@ pub fn get_enums( }); return db.all(Enum, query, allocator, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), }); } @@ -1100,7 +1100,7 @@ pub fn enum_has_name_collision(db: *Database, enum_id: EnumID) !bool { \\ AND e1.name = e2.name \\ AND e1.id != e2.id \\WHERE e1.id = ?; - , .{@intFromEnum(enum_id)}) orelse return false; + , .{@backingInt(enum_id)}) orelse return false; defer row.deinit(); return true; @@ -1117,7 +1117,7 @@ pub fn get_enum( }); return db.one_alloc(Enum, allocator, query, .{ - @intFromEnum(id), + @backingInt(id), }); } @@ -1173,7 +1173,7 @@ pub fn get_enum_fields( }); return db.all(EnumField, query, allocator, .{ - @intFromEnum(enum_id), + @backingInt(enum_id), }); } @@ -1192,7 +1192,7 @@ pub fn get_enum_field_by_name( }); return db.one_alloc(EnumField, allocator, query, .{ - @intFromEnum(enum_id), + @backingInt(enum_id), name, }); } @@ -1202,7 +1202,7 @@ pub fn get_interrupts(db: *Database, allocator: Allocator, device_id: DeviceID) comptime gen_field_list(Interrupt, .{}), }); - const interrupts = try db.all(Interrupt, query, allocator, .{@intFromEnum(device_id)}); + const interrupts = try db.all(Interrupt, query, allocator, .{@backingInt(device_id)}); return interrupts; } @@ -1283,7 +1283,7 @@ pub fn get_register_fields( comptime gen_field_list(StructField, .{ .prefix = "sf" }), }); return db.all(StructField, query, allocator, .{ - @intFromEnum(register_id), + @backingInt(register_id), }); } @@ -1303,7 +1303,7 @@ pub fn get_register_field_by_name( comptime gen_field_list(StructField, .{ .prefix = "sf" }), }); return db.one_alloc(StructField, allocator, query, .{ - @intFromEnum(register_id), + @backingInt(register_id), name, }); } @@ -1311,7 +1311,7 @@ pub fn get_register_field_by_name( pub fn get_interrupt_name(db: *Database, allocator: Allocator, interrupt_id: InterruptID) ![]const u8 { const query = "SELECT name FROM interrupts WHERE id = ?"; return db.one_alloc([]const u8, allocator, query, .{ - @intFromEnum(interrupt_id), + @backingInt(interrupt_id), }); } @@ -1325,7 +1325,7 @@ pub fn get_struct_decl(db: *Database, allocator: Allocator, struct_id: StructID) }); return try db.get_one_alloc(StructDecl, allocator, query, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), }); } @@ -1345,7 +1345,7 @@ pub fn get_peripheral(db: *Database, allocator: Allocator, peripheral_id: Periph comptime gen_field_list(Peripheral, .{}), }); return db.one_alloc(Peripheral, allocator, query, .{ - @intFromEnum(peripheral_id), + @backingInt(peripheral_id), }); } @@ -1354,7 +1354,7 @@ pub fn get_device_properties(db: *Database, allocator: Allocator, device_id: Dev comptime gen_field_list(DeviceProperty, .{}), }); - return db.all(DeviceProperty, query, allocator, .{@intFromEnum(device_id)}); + return db.all(DeviceProperty, query, allocator, .{@backingInt(device_id)}); } pub fn get_device_peripherals(db: *Database, allocator: Allocator, device_id: DeviceID) ![]DevicePeripheral { @@ -1368,7 +1368,7 @@ pub fn get_device_peripherals(db: *Database, allocator: Allocator, device_id: De }); return db.all(DevicePeripheral, query, allocator, .{ - @intFromEnum(device_id), + @backingInt(device_id), }); } @@ -1382,7 +1382,7 @@ pub fn get_device_peripheral_by_name(db: *Database, allocator: Allocator, device }); return db.one_alloc(DevicePeripheral, allocator, query, .{ - @intFromEnum(device_id), + @backingInt(device_id), name, }); } @@ -1393,12 +1393,12 @@ pub fn get_interrupt_by_name( name: []const u8, ) !?InterruptID { const row = try db.conn.row("SELECT id FROM interrupts WHERE device_id = ? AND name = ?", .{ - @intFromEnum(device_id), + @backingInt(device_id), name, }) orelse return null; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } pub fn get_enum_by_name( @@ -1417,7 +1417,7 @@ pub fn get_enum_by_name( }); return db.one_alloc(Enum, allocator, query, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), name, }) catch |err| switch (err) { error.MissingEntity => { @@ -1432,7 +1432,7 @@ pub fn get_enum_by_name( log.debug("get_enum_by_name: parent_id={f} name='{s}'", .{ parent_id, name }); return db.one_alloc(Enum, allocator, query, .{ - @intFromEnum(parent_id), + @backingInt(parent_id), name, }) catch { continue; @@ -1448,11 +1448,11 @@ pub fn get_enum_by_name( fn get_parent_struct_id(db: *Database, struct_id: StructID) !StructID { const row = try db.conn.row("SELECT parent_id FROM struct_decls WHERE struct_id = ?", .{ - @intFromEnum(struct_id), + @backingInt(struct_id), }) orelse return error.MissingEntity; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } fn one_alloc( @@ -1480,7 +1480,7 @@ fn get_one_alloc( pub fn get_interrupt_idx(db: *Database, interrupt_id: InterruptID) !i32 { const row = try db.conn.row("SELECT idx FROM interrupts WHERE id = ?", .{ - @intFromEnum(interrupt_id), + @backingInt(interrupt_id), }) orelse return error.MissingEntity; defer row.deinit(); @@ -1507,8 +1507,8 @@ pub fn add_nested_struct_field( \\VALUES \\ (?, ?, ?, ?, ?, ?, ?) , .{ - @intFromEnum(parent), - @intFromEnum(opts.struct_id), + @backingInt(parent), + @backingInt(opts.struct_id), opts.name, opts.description, opts.offset_bytes, @@ -1544,8 +1544,8 @@ pub fn create_nested_struct( \\VALUES \\ (?, ?, ?, ?, ?) , .{ - @intFromEnum(parent), - @intFromEnum(struct_id), + @backingInt(parent), + @backingInt(struct_id), opts.name, opts.description, opts.size_bytes, @@ -1574,7 +1574,7 @@ pub fn add_device_property(db: *Database, device_id: DeviceID, opts: AddDevicePr \\VALUES \\ (?, ?, ?, ?) , .{ - @intFromEnum(device_id), + @backingInt(device_id), opts.key, opts.value, opts.description, @@ -1588,7 +1588,7 @@ pub fn get_device_property( key: []const u8, ) !?[]const u8 { const row = try db.conn.row("SELECT value FROM device_properties WHERE device_id = ? AND key = ?", .{ - @intFromEnum(device_id), + @backingInt(device_id), key, }) orelse return null; defer row.deinit(); @@ -1617,14 +1617,14 @@ pub fn create_interrupt(db: *Database, device_id: DeviceID, opts: CreateInterrup \\ (?, ?, ?, ?) \\RETURNING id , .{ - @intFromEnum(device_id), + @backingInt(device_id), opts.name, opts.description, opts.idx, }) orelse unreachable; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } pub const CreatePeripheralOptions = struct { @@ -1648,14 +1648,14 @@ pub fn create_peripheral(db: *Database, opts: CreatePeripheralOptions) !Peripher const peripheral_id: PeripheralID = blk: { const row = try db.conn.row("INSERT INTO peripherals (struct_id, name, description, size_bytes) VALUES (?, ?, ?, ?) RETURNING id", .{ - @intFromEnum(struct_id), + @backingInt(struct_id), opts.name, opts.description, opts.size_bytes, }) orelse unreachable; defer row.deinit(); - break :blk @enumFromInt(row.int(0)); + break :blk @fromBackingInt(@intCast(row.int(0))); }; try db.conn.commit(); @@ -1698,8 +1698,8 @@ pub fn create_device_peripheral( \\ (?, ?, ?, ?, ?, ?) \\RETURNING id , .{ - @intFromEnum(device_id), - @intFromEnum(opts.struct_id), + @backingInt(device_id), + @backingInt(opts.struct_id), opts.name, opts.description, opts.offset_bytes, @@ -1707,7 +1707,7 @@ pub fn create_device_peripheral( }) orelse unreachable; defer row.deinit(); - return @enumFromInt(row.int(0)); + return @fromBackingInt(@intCast(row.int(0))); } pub const CreateModeOptions = struct { @@ -1727,14 +1727,14 @@ pub fn create_mode(db: *Database, parent: StructID, opts: CreateModeOptions) !Mo \\RETURNING id , .{ opts.name, - @intFromEnum(parent), + @backingInt(parent), opts.description, opts.value, opts.qualifier, }) orelse unreachable; defer row.deinit(); - const mode_id: ModeID = @enumFromInt(row.int(0)); + const mode_id: ModeID = @fromBackingInt(@intCast(row.int(0))); log.debug( "created {f}: struct_id={f} name='{s}' value='{s}' qualifier='{s}'", .{ mode_id, parent, opts.name, opts.value, opts.qualifier }, @@ -1767,8 +1767,8 @@ pub fn add_register_mode(db: *Database, register_id: RegisterID, mode_id: ModeID \\VALUES \\ (?, ?) , .{ - @intFromEnum(register_id), - @intFromEnum(mode_id), + @backingInt(register_id), + @backingInt(mode_id), }); } @@ -1795,12 +1795,12 @@ pub fn create_register(db: *Database, parent: StructID, opts: CreateRegisterOpti opts.reset_value, }) orelse unreachable; defer row.deinit(); - break :blk @enumFromInt(row.int(0)); + break :blk @fromBackingInt(@intCast(row.int(0))); }; try db.conn.exec("INSERT INTO struct_registers (struct_id, register_id) VALUES (?, ?)", .{ - @intFromEnum(parent), - @intFromEnum(register_id), + @backingInt(parent), + @backingInt(register_id), }); try db.conn.commit(); @@ -1831,7 +1831,7 @@ pub fn get_register_by_name( }); const row = try db.conn.row(query, .{ - @intFromEnum(struct_id), + @backingInt(struct_id), name, }) orelse return error.MissingEntity; defer row.deinit(); @@ -1859,8 +1859,8 @@ pub fn add_register_field(db: *Database, parent: RegisterID, opts: AddStructFiel const struct_id = try db.create_struct(.{}); try db.conn.exec("UPDATE registers SET struct_id = ? WHERE id = ?", .{ - @intFromEnum(struct_id), - @intFromEnum(parent), + @backingInt(struct_id), + @backingInt(parent), }); log.debug("{f} now has {f}", .{ parent, struct_id }); @@ -1878,12 +1878,12 @@ fn add_struct_field(db: *Database, parent: StructID, opts: AddStructFieldOptions \\VALUES \\ (?, ?, ?, ?, ?, ?, ?, ?, ?) , .{ - @intFromEnum(parent), + @backingInt(parent), opts.name, opts.description, opts.size_bits, opts.offset_bits, - if (opts.enum_id) |enum_id| @intFromEnum(enum_id) else null, + if (opts.enum_id) |enum_id| @backingInt(enum_id) else null, opts.count, opts.stride, if (opts.access) |access| access.to_string() else null, @@ -1915,14 +1915,14 @@ pub fn create_enum(db: *Database, struct_id: ?StructID, opts: CreateEnumOptions) \\ (?, ?, ?, ?) \\RETURNING id , .{ - if (struct_id) |si| @intFromEnum(si) else null, + if (struct_id) |si| @backingInt(si) else null, opts.name, opts.description, opts.size_bits, }) orelse unreachable; defer row.deinit(); - const enum_id: EnumID = @enumFromInt(row.int(0)); + const enum_id: EnumID = @fromBackingInt(@intCast(row.int(0))); log.debug("created {f}: struct_id={?f} name='{?s}' description='{?s}' size_bits={}", .{ enum_id, struct_id, @@ -1947,7 +1947,7 @@ pub fn add_enum_field(db: *Database, enum_id: EnumID, opts: CreateEnumFieldOptio \\VALUES \\ (?, ?, ?, ?) , .{ - @intFromEnum(enum_id), + @backingInt(enum_id), opts.name, opts.description, opts.value, @@ -1962,7 +1962,7 @@ pub fn create_struct(db: *Database, opts: CreateStructOptions) !StructID { const row = try db.conn.row("INSERT INTO structs DEFAULT VALUES RETURNING id", .{}) orelse unreachable; defer row.deinit(); - const struct_id: StructID = @enumFromInt(row.int(0)); + const struct_id: StructID = @fromBackingInt(@intCast(row.int(0))); log.debug("created {f}", .{struct_id}); return struct_id; } @@ -2075,8 +2075,8 @@ fn set_register_field_enum_id(db: *Database, register_id: RegisterID, field_name \\) \\AND name = ?; , .{ - if (enum_id) |eid| @intFromEnum(eid) else null, - @intFromEnum(register_id), + if (enum_id) |eid| @backingInt(eid) else null, + @backingInt(register_id), field_name, }); @@ -2115,7 +2115,7 @@ pub fn apply_patch(db: *Database, zon_text: [:0]const u8, diags: *std.zon.parse. \\WHERE id = ?; , .{ override_arch.arch.to_string(), - @intFromEnum(device_id), + @backingInt(device_id), }); }, .set_device_property => |set_prop| { @@ -2133,7 +2133,7 @@ pub fn apply_patch(db: *Database, zon_text: [:0]const u8, diags: *std.zon.parse. \\ value = excluded.value, \\ description = excluded.description; , .{ - @intFromEnum(device_id), + @backingInt(device_id), set_prop.key, set_prop.value, set_prop.description, diff --git a/tools/regz/src/analysis.zig b/tools/regz/src/analysis.zig index 2ac9e9c74..b3ca91c52 100644 --- a/tools/regz/src/analysis.zig +++ b/tools/regz/src/analysis.zig @@ -88,14 +88,14 @@ pub fn get_anonymous_enums_in_peripheral( \\ ) ; - var rows = try self.db.conn.rows(query, .{@intFromEnum(peripheral_id)}); + var rows = try self.db.conn.rows(query, .{@backingInt(peripheral_id)}); defer rows.deinit(); var result: std.ArrayList(AnonymousEnumInfo) = .empty; while (rows.next()) |row| { - const enum_id: Database.EnumID = @enumFromInt(row.int(0)); - const struct_id: ?Database.StructID = if (row.nullableInt(1)) |sid| @enumFromInt(sid) else null; + const enum_id: Database.EnumID = @fromBackingInt(@intCast(row.int(0))); + const struct_id: ?Database.StructID = if (row.nullableInt(1)) |sid| @fromBackingInt(@intCast(sid)) else null; const size_bits: u8 = @intCast(row.int(2)); const description: ?[]const u8 = if (row.nullableText(3)) |text| try arena.dupe(u8, text) else null; @@ -139,7 +139,7 @@ fn get_field_usages_for_enum( \\ AND sr.struct_id IN (SELECT struct_id FROM struct_tree) ; - var rows = try self.db.conn.rows(query, .{ @intFromEnum(peripheral_id), @intFromEnum(enum_id) }); + var rows = try self.db.conn.rows(query, .{ @backingInt(peripheral_id), @backingInt(enum_id) }); defer rows.deinit(); var result: std.ArrayList(FieldUsage) = .empty; diff --git a/tools/regz/src/gen.zig b/tools/regz/src/gen.zig index 770f1d3dc..cafb0187c 100644 --- a/tools/regz/src/gen.zig +++ b/tools/regz/src/gen.zig @@ -128,7 +128,7 @@ fn write_device_file( try writer.writeByte(0); - var ast = try std.zig.Ast.parse(arena, to_zero_sentinel(buf.written()), .zig); + var ast = try std.zig.Ast.parse(arena, to_zero_sentinel(buf.written()), .{}); defer ast.deinit(arena); if (ast.errors.len > 0) { @@ -198,7 +198,7 @@ fn write_peripherals_files(io: std.Io, db: *Database, arena: Allocator, dir: std }); try writer.writeByte(0); - var ast = try std.zig.Ast.parse(arena, to_zero_sentinel(periph_content.written()), .zig); + var ast = try std.zig.Ast.parse(arena, to_zero_sentinel(periph_content.written()), .{}); defer ast.deinit(arena); if (ast.errors.len > 0) { @@ -1492,8 +1492,8 @@ fn expect_nested_struct_field(expected: *const NestedStructField, actual: *const test "gen.StructFieldIterator.single register" { const expected: Register = .{ - .id = @enumFromInt(1), - .struct_id = @enumFromInt(1), + .id = @fromBackingInt(1), + .struct_id = @fromBackingInt(1), .description = "This is a description", .name = "TEST_REGISTER", .ref_type = null, @@ -1520,8 +1520,8 @@ test "gen.StructFieldIterator.single register" { test "gen.StructFieldIterator.two registers perfect overlap" { const registers: []const Register = &.{ .{ - .id = @enumFromInt(1), - .struct_id = @enumFromInt(1), + .id = @fromBackingInt(1), + .struct_id = @fromBackingInt(1), .description = "This is a description", .name = "TEST_REGISTER1", .ref_type = null, @@ -1533,8 +1533,8 @@ test "gen.StructFieldIterator.two registers perfect overlap" { .count = null, }, .{ - .id = @enumFromInt(2), - .struct_id = @enumFromInt(2), + .id = @fromBackingInt(2), + .struct_id = @fromBackingInt(2), .description = "This is a description", .name = "TEST_REGISTER2", .ref_type = null, @@ -1563,8 +1563,8 @@ test "gen.StructFieldIterator.two registers perfect overlap" { test "gen.StructFieldIterator.two registers overlap but one is smaller" { const registers: []const Register = &.{ .{ - .id = @enumFromInt(1), - .struct_id = @enumFromInt(1), + .id = @fromBackingInt(1), + .struct_id = @fromBackingInt(1), .description = "This is a description", .name = "TEST_REGISTER1", .ref_type = null, @@ -1576,8 +1576,8 @@ test "gen.StructFieldIterator.two registers overlap but one is smaller" { .count = null, }, .{ - .id = @enumFromInt(2), - .struct_id = @enumFromInt(2), + .id = @fromBackingInt(2), + .struct_id = @fromBackingInt(2), .description = "This is a description", .name = "TEST_REGISTER2", .ref_type = null, @@ -1606,8 +1606,8 @@ test "gen.StructFieldIterator.two registers overlap but one is smaller" { test "gen.StructFieldIterator.two registers overlap with different offsets" { const registers: []const Register = &.{ .{ - .id = @enumFromInt(1), - .struct_id = @enumFromInt(1), + .id = @fromBackingInt(1), + .struct_id = @fromBackingInt(1), .description = "This is a description", .name = "TEST_REGISTER1", .ref_type = null, @@ -1619,8 +1619,8 @@ test "gen.StructFieldIterator.two registers overlap with different offsets" { .count = null, }, .{ - .id = @enumFromInt(2), - .struct_id = @enumFromInt(2), + .id = @fromBackingInt(2), + .struct_id = @fromBackingInt(2), .description = "This is a description", .name = "TEST_REGISTER2", .ref_type = null, @@ -1648,8 +1648,8 @@ test "gen.StructFieldIterator.two registers overlap with different offsets" { test "gen.StructFieldIterator.one nested struct field" { const expected = NestedStructField{ - .parent_id = @enumFromInt(1), - .struct_id = @enumFromInt(2), + .parent_id = @fromBackingInt(1), + .struct_id = @fromBackingInt(2), .offset_bytes = 0, .name = "TEST_NESTED", .description = "a desc", @@ -1671,8 +1671,8 @@ test "gen.StructFieldIterator.one nested struct field" { test "gen.StructFieldIterator.one nested struct field and a register" { const expected_register: Register = .{ - .id = @enumFromInt(1), - .struct_id = @enumFromInt(3), + .id = @fromBackingInt(1), + .struct_id = @fromBackingInt(3), .description = "This is a description", .name = "TEST_REGISTER", .ref_type = null, @@ -1685,8 +1685,8 @@ test "gen.StructFieldIterator.one nested struct field and a register" { }; const expected_nsf = NestedStructField{ - .parent_id = @enumFromInt(1), - .struct_id = @enumFromInt(2), + .parent_id = @fromBackingInt(1), + .struct_id = @fromBackingInt(2), .offset_bytes = 8, .name = "TEST_NESTED", .description = "a desc", @@ -2470,7 +2470,7 @@ test "gen.field with named enum and unnamed default" { \\ \\ /// offset: 0x00 \\ TEST_REGISTER: mmio.Mmio(packed struct(u8) { - \\ TEST_FIELD: TEST_ENUM = @enumFromInt(0xA), + \\ TEST_FIELD: TEST_ENUM = @fromBackingInt(@intCast(0xA)), \\ padding: u4 = 0, \\ }), \\}; diff --git a/tools/uf2/src/elf2uf2.zig b/tools/uf2/src/elf2uf2.zig index 8eafe8ee9..f5f5eb4fc 100644 --- a/tools/uf2/src/elf2uf2.zig +++ b/tools/uf2/src/elf2uf2.zig @@ -60,7 +60,7 @@ pub fn main(init: std.process.Init) !void { const family_id: ?uf2.FamilyId = if (try find_arg(args, "--family-id")) |family_id_str| if (std.mem.startsWith(u8, family_id_str, "0x")) - @as(uf2.FamilyId, @enumFromInt(try std.fmt.parseInt(u32, family_id_str, 0))) + @as(uf2.FamilyId, @fromBackingInt(try std.fmt.parseInt(u32, family_id_str, 0))) else std.meta.stringToEnum(uf2.FamilyId, family_id_str) orelse { std.log.err("invalid family id: {s}, valid family names are:", .{family_id_str}); diff --git a/tools/uf2/src/uf2.zig b/tools/uf2/src/uf2.zig index 9f2924f93..9d3951ea0 100644 --- a/tools/uf2/src/uf2.zig +++ b/tools/uf2/src/uf2.zig @@ -133,7 +133,7 @@ pub const Archive = struct { .family_id = if (opts.family_id) |family_id| family_id else - @as(FamilyId, @enumFromInt(0)), + @as(FamilyId, @fromBackingInt(0)), }, .data = @splat(0), });