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L3 WALA engine + differential gate (--l3-engine wala) #194

Description

@sinha108

Scope

The second L3 engine of the two-engine design (docs/design/specs/l3-intraprocedural-dataflow-design.md, steps 6–7). The AST engine (the default, source-only) landed in #183; this issue tracks the WALA-based L3 engine behind --l3-engine wala plus the differential gate that cross-checks the two engines.

This is the intended next work item after the AST-engine PR.

Work

  1. --l3-engine wala — currently accepted but rejected with a clear "not yet implemented" error. Implement it.
  2. The WALA→source-statement mapping (B.1) — map each SSA instruction to an L1/AST statement node by line-cover match → content disambiguation → no-source-position handling (phi/pi, compiler temporaries) → innermost fallback. line:col is adopted from the matched AST node, never synthesized. This is the machinery L4's semantic DDG reuses.
  3. CFG / CDG / DDG on WALA — CFG from SSACFG + ISSABasicBlock projected via B.1, normalized to one @exit; CDG from WALA dominators/post-dominators; DDG from WALA SSA def-use, same syntactic prov:["ssa"] contract as the AST engine (no points-to at L3).
  4. Differential gate — run both engines over the fixtures and assert agreement on the defined subset (CFG node set + reachability, cdg, ddg where syntactic semantics coincide). Pin the documented divergences: exceptional-edge shape/density and within-line attribution on multi-statement lines. The AST engine is the reference.

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