Monte-Carlo analysis, Gaussian tolerance analysis and worst-case analysis

[mvanriet]

Using this method :

• https://k6jca.blogspot.com/2012/07/monte-carlo-and-worst-case-circuit.html
• https://www.analog.com/en/technical-articles/ltspice-worst-case-circuit-analysis-with-minimal-simulations-runs.html

User has to add nothing special in the schematic.
After reading the .asc file, tolerances can be specified for each refdes, and then the analysis can be started.
When a lot of runs are required, they are split up in different simulations that are run in parallel.

[nunobrum]

This was already foreseen to be implemented on the sim_analysis module.
There are however a few considerations that I think need to say in regards to the proposed methods.

First of all we need to have a way to set different tolerances to components. Not all resistor need to have the same tolerance, and
the same is applicable to other components, as for example : capacitors or inductors.

Secondly, in my opinion, a real monte-carlo should also vary other things, other than discrete components. In my design, I often vary opamp, offsets and input bias. Sometimes, even go to the point of varying intrinsic parameters of transistors and other models.
I do this by having sub-circuits that implement these monte-carlo variations.
I'm not really keen in sharing my simulation subcircuit models, but, I think that this functionality is necessary for anyone wanting to make a serious worst-case analysis.

Third, is regarding to the distributions used in LTSpice monte-carlo function mc() and in these examples. They use an uniform distribution, however, some manufacturers have processes that resemble more like a gaussian distribution. An argument could be made, that an uniform distribution is too worst case.

See

and

You see that we obtain a much better looking shape.

Using tol*gauss(1/3) on the gaussian distribution parameter as we're targeting that 3 sigma (99.7% confidence) is matching our total tolerance.
So, I think we need to give the possibility of choosing the distribution for tolerances.

Finally, for the worst-case, I would like to adopt the run=-1 as a the nominal simulation. This way we don't have to change the wc() formula everytime we need to update the number of components, and also, the nominal simulation is the first to be executed.

[mvanriet]

For input offset of opamps, and other sources of error, you can just introduce these as voltage sources in the schematic.
Then you can just specify a deviation on these voltage sources.

I've done this for several designs already, and it is quite easy and quick to do.

[nunobrum]

What I normally do for offset is to include embed the OPAMP in the following sub-circuit that models both Voffset and input currents

.function normal_zero(variation) if(run<0, 0, variation*gauss(1/3)) 

.subckt OPA364_MC IN+ IN- VCC VEE OUT
+params:
+ inputIbias = normal_zero(10p)
+ inputVoff  = normal_zero(500u)
+ inputIdiff = normal_zero(10p)
.PARAM runIO = inputIbias
.PARAM runID = (inputIdiff/2)
V1 IN-    N001 	{inputVoff}
I1 N001   VEE   {runIO-runID}
I2 IN+    VEE   {runIO+runID}
XDUT IN+ N001 VCC VEE OUT OPA364
.ends OPA364_MC

This corresponds to this circuit.

[dbriscoe511]

@mvanriet Are you implementing this now? I could really use this functionality and I have some free time and python experience so I could help develop it.
Let me know if you want to discuss your thoughts on implementing this feature.

[mvanriet]

@dbriscoe511

PyLTSpice is being refactored right now, so I'm waiting for these changes to be completed before adding new features.

I have a quite functional class already that has been used for quite some circuits.
It will have to be rewritten for the new version of PyLTSpice though.

You can see a working demo here :
https://github.com/mvanriet/PyLTSpice_dev/tree/tolerance/tolerance_demo
It works with a standard installation of PyLTSpice (so you don't have to clone this whole repo).
You just need to copy the file "tolerance.py" next to your own Python scripts.

Best regards,
Marc

[nunobrum]

This is already implemented and integrated into the main branch.