diff --git a/tools/gen-device-svd/gen-device-svd.go b/tools/gen-device-svd/gen-device-svd.go index 6c5e78ed81..c44da551ac 100755 --- a/tools/gen-device-svd/gen-device-svd.go +++ b/tools/gen-device-svd/gen-device-svd.go @@ -685,12 +685,9 @@ func parseBitfields(groupName, regName string, fieldEls []*SVDField, bitfieldPre } da := decodeDimArray(fieldEl.Dim, fieldEl.DimIndex, fieldEl.DimIncrement, "field", fieldNameTpl) - da.rangeElems(func(ia int, _ uint32) bool { - if da != nil { - lsb += da.incr - msb += da.incr - } + da.rangeElems(func(ia int, offset uint32) bool { fieldName := da.replace(fieldNameTpl, ia) + lsb, msb := lsb+offset, msb+offset // The enumerated values can be the same as another field, so to avoid // duplication SVD files can simply refer to another set of enumerated @@ -802,6 +799,7 @@ func parseBitfields(groupName, regName string, fieldEls []*SVDField, bitfieldPre } enumDefault.resolve() } + return true }) } diff --git a/tools/gen-device-svd/gen-device-svd_test.go b/tools/gen-device-svd/gen-device-svd_test.go new file mode 100644 index 0000000000..8aee700c8d --- /dev/null +++ b/tools/gen-device-svd/gen-device-svd_test.go @@ -0,0 +1,59 @@ +package main + +import "testing" + +func TestParseBitfieldsDimensionedSingleBit(t *testing.T) { + dim := "2" + dimIndex := "0-1" + lsb := uint32(0) + msb := uint32(0) + fields, bitfields := parseBitfields("ADC", "CHSELR0", []*SVDField{ + { + Name: "CHSEL%s", + Dim: &dim, + DimIndex: &dimIndex, + DimIncrement: "1", + Lsb: &lsb, + Msb: &msb, + }, + }, "") + + wantBitfields := []Bitfield{ + {Name: "CHSEL0", Offset: 0, Mask: 1}, + {Name: "CHSEL1", Offset: 1, Mask: 2}, + } + if len(bitfields) != len(wantBitfields) { + t.Fatalf("got %d bitfields, want %d", len(bitfields), len(wantBitfields)) + } + for i, want := range wantBitfields { + if got := bitfields[i]; got != want { + t.Errorf("bitfield %d = %+v, want %+v", i, got, want) + } + } + + wantConstants := map[string]uint64{ + "ADC_CHSELR0_CHSEL0_Pos": 0, + "ADC_CHSELR0_CHSEL0_Msk": 1, + "ADC_CHSELR0_CHSEL0": 1, + "ADC_CHSELR0_CHSEL1_Pos": 1, + "ADC_CHSELR0_CHSEL1_Msk": 2, + "ADC_CHSELR0_CHSEL1": 2, + } + if len(fields) != len(wantConstants) { + t.Fatalf("got %d constants, want %d", len(fields), len(wantConstants)) + } + for _, field := range fields { + want, ok := wantConstants[field.Name] + if !ok { + t.Errorf("unexpected constant %q", field.Name) + continue + } + if field.Value != want { + t.Errorf("%s = %#x, want %#x", field.Name, field.Value, want) + } + delete(wantConstants, field.Name) + } + for name := range wantConstants { + t.Errorf("missing constant %q", name) + } +}