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tests: MUL_MAT_ID with activations above the half-precision range passes on the pin; the rows that pin it (engine #2167) - #315
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…gine ggml-org#2167) test_mul_mat_id gains an activation scale (default 1, so every earlier case is unchanged; only the activation `b` is scaled). Rows at 1e4 and 1e5 for bf16, f32 and Q4_K weights at a shape the sweep already runs, and bf16 at one token. The routed kernels narrow the activation at 2^-6 since llama.cpp #285, so the rows pass; they pin that. Supersedes the test rows of llama.cpp #307, whose parameter also scaled f32 weights. Co-Authored-By: Claude Fable 5.2 <noreply@anthropic.com>
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ready for review at 8dd46e9 (tests only; rows measured on the pin's and the tip's backend, output in the body) |
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VERDICT at 8dd46e9: READY
The helper is the point: init_mul_mat_id_tensors(ctx, n_mats, float activation_scale = 1.0f) lets a test build activations above the half-precision range deliberately, scaling only the b tensor. Without it the overflow case that the 2⁻⁶ prescale exists for cannot be reached from a test at all — every fixture would sit comfortably inside f16 and pass whether or not the narrowing was correct.
That is what was missing from the family: #285/#284/#307/#309 all narrow before the truncation, and the argument that doing so is necessary rests on a case that no test could produce. A parameterised fixture makes the boundary reachable, which is the difference between a test that pins the fix and a test that merely runs beside it.
Refs 1bit-MONSTER/engine#2167. Tests only. Supersedes the test rows of #307.
What ggml-org#2167 reported, and what ran
MUL_MAT_ID(type_a=bf16, ..., m=512, n=32, k=256)with activations to 1e5 returned NaN against a finite CPU result, "at pin7a1f2b81c". That case runs onggml_mul_mat_id_f32_f32_wmma, whose tile path has narrowed the activation at 2^-6 sincedfbf2b1a3(#285), which is in that pin.The report's build was
~/wt/i1467-build, made from~/wt/i1467-srcat33f72d6d1(#307's branch).git merge-base --is-ancestorsaysdfbf2b1a3,2293f95eaand7a1f2b81care not in that tree, and its copy of the kernel has no0.015625. So the NaN was measured on the backend from before #285, not on the pin.Measured on the pin and on the tip (gfx1151, one
gpu-holdticket)One test binary with these rows, run against the public backend library built from the engine pin
204493d40and from fork2b7960bae:The "before" is the report's own run on the pre-#285 backend: the bf16 row at 1e5,
HRX0=-nan CPU=-165957.6875.The change
tests/test-backend-ops.cpp:test_mul_mat_idtakes an activation scale (default 1, so every earlier case is the same test), and seven rows use it. Two differences from #307's version of the parameter:bis scaled. tests: pin the MUL_MAT_ID activation range the f16 narrowing handles (Refs engine#2127) #307 scaled every f32 tensor, so with f32 weights it also put the weights at 1e5; that row fails on any backend that multiplies in half precision and says nothing about activations (I hit it:HRX0=-nan CPU=59434102784).#307 can be closed: its remaining content is the 1e4 row, which is here, and its branch still carries the gated-delta-net guard change of #301 and the scheduler hunks.
Not run: the whole
MUL_MAT_IDop with these rows at the current tipcaa2d4dde(the rows were run at2b7960bae; at that commit the op was 850 OK with the earlier form of these rows).🤖 Generated with Claude Code