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1. riscv riscv Public

   Single-cycle RV32I processor with a custom INT8 dot-product instruction, Verilog for the Basys3 FPGA (work in progress)

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2. mental-foramen-segmentation mental-foramen-segmentation Public

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3. geofence-rtl-to-gdsii geofence-rtl-to-gdsii Public

   2021 IC Design Contest geofence problem taken from RTL to a DRC/LVS-clean layout in TSMC 0.13 um (Design Compiler, IC Compiler II, PrimeTime, IC Validator), with a post-layout area/energy compariso…

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4. active-near-field-probe active-near-field-probe Public

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