OE4T · krant · Aug 10, 2026
diff --git a/features/tegra/platform.scc b/features/tegra/platform.scc
diff --git a/...es/tegra/platform/patches/0001-NVIDIA-SAUCE-clk-tegra-Support-unique-names-for-mult.patch b/...es/tegra/platform/patches/0001-NVIDIA-SAUCE-clk-tegra-Support-unique-names-for-mult.patch
@@ -1,7 +1,7 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Jon Hunter <jonathanh@nvidia.com>
 Date: Tue, 2 Jun 2026 09:43:34 +0100
-Subject: [PATCH 001/196] NVIDIA: SAUCE: clk: tegra: Support unique names for
+Subject: [PATCH 001/184] NVIDIA: SAUCE: clk: tegra: Support unique names for
  multi-socket platforms
 
 On multi-socket platforms each socket has its own BPMP which exposes the
@@ -26,7 +26,7 @@ GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
 (cherry picked from commit bf6c3abf6a338a24975f4de15e0e81ea4ccb3ac1)
 
 diff --git a/drivers/clk/tegra/clk-bpmp.c b/drivers/clk/tegra/clk-bpmp.c
-index 77a2586dbe000..8bf469639c607 100644
+index 77a2586dbe00..8bf469639c60 100644
 --- a/drivers/clk/tegra/clk-bpmp.c
 +++ b/drivers/clk/tegra/clk-bpmp.c
 @@ -367,7 +367,15 @@ static int tegra_bpmp_clk_get_info(struct tegra_bpmp *bpmp, unsigned int id,
@@ -47,5 +47,5 @@ index 77a2586dbe000..8bf469639c607 100644
 
  	for (i = 0; i < info->num_parents; i++)
 -- 
-2.43.0
+2.55.0
 
diff --git a/features/tegra/platform/patches/0002-cpufreq-tegra194-Rename-Tegra239-to-Tegra238.patch b/features/tegra/platform/patches/0002-cpufreq-tegra194-Rename-Tegra239-to-Tegra238.patch
@@ -1,7 +1,7 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Thierry Reding <treding@nvidia.com>
 Date: Thu, 26 Feb 2026 16:12:12 +0100
-Subject: [PATCH 002/196] cpufreq: tegra194: Rename Tegra239 to Tegra238
+Subject: [PATCH 002/184] cpufreq: tegra194: Rename Tegra239 to Tegra238
 
 This chip identifies as Tegra238, so update the device tree compatible
 string and data structures associated with it to use the correct name.
@@ -11,7 +11,7 @@ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
 (cherry picked from commit 2d14bf98e6b445afbb799b170448f628f6d4ab69)
 
 diff --git a/drivers/cpufreq/tegra194-cpufreq.c b/drivers/cpufreq/tegra194-cpufreq.c
-index 9b4f516f313e0..6fe8a3f9797a2 100644
+index 9b4f516f313e..6fe8a3f9797a 100644
 --- a/drivers/cpufreq/tegra194-cpufreq.c
 +++ b/drivers/cpufreq/tegra194-cpufreq.c
 @@ -196,7 +196,7 @@ static const struct tegra_cpufreq_soc tegra234_cpufreq_soc = {
@@ -33,5 +33,5 @@ index 9b4f516f313e0..6fe8a3f9797a2 100644
  };
  MODULE_DEVICE_TABLE(of, tegra194_cpufreq_of_match);
 -- 
-2.43.0
+2.55.0
 
diff --git a/...es/tegra/platform/patches/0003-NVIDIA-SAUCE-cpufreq-tegra194-Add-support-for-Tegra2.patch b/...es/tegra/platform/patches/0003-NVIDIA-SAUCE-cpufreq-tegra194-Add-support-for-Tegra2.patch
@@ -1,7 +1,7 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Ishan Shah <ishah@nvidia.com>
 Date: Mon, 19 Aug 2024 19:41:05 +0000
-Subject: [PATCH 003/196] NVIDIA: SAUCE: cpufreq: tegra194: Add support for
+Subject: [PATCH 003/184] NVIDIA: SAUCE: cpufreq: tegra194: Add support for
  Tegra264
 
 Adding support for Tegra264, which has clusters sharing clock-sources.
@@ -34,7 +34,7 @@ Signed-off-by: Ishan Shah <ishah@nvidia.com>
 Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
 
 diff --git a/drivers/cpufreq/tegra194-cpufreq.c b/drivers/cpufreq/tegra194-cpufreq.c
-index 6fe8a3f9797a2..e25a51b60fd4e 100644
+index 6fe8a3f9797a..e25a51b60fd4 100644
 --- a/drivers/cpufreq/tegra194-cpufreq.c
 +++ b/drivers/cpufreq/tegra194-cpufreq.c
 @@ -14,6 +14,7 @@
@@ -349,5 +349,5 @@ index 6fe8a3f9797a2..e25a51b60fd4e 100644
  };
  MODULE_DEVICE_TABLE(of, tegra194_cpufreq_of_match);
 -- 
-2.43.0
+2.55.0
 
diff --git a/...es/tegra/platform/patches/0004-NVIDIA-SAUCE-cpufreq-tegra194-fix-policy-initializat.patch b/...es/tegra/platform/patches/0004-NVIDIA-SAUCE-cpufreq-tegra194-fix-policy-initializat.patch
@@ -1,7 +1,7 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Ishan Shah <ishah@nvidia.com>
 Date: Fri, 11 Apr 2025 22:23:31 +0000
-Subject: [PATCH 004/196] NVIDIA: SAUCE: cpufreq: tegra194: fix policy
+Subject: [PATCH 004/184] NVIDIA: SAUCE: cpufreq: tegra194: fix policy
  initialization
 
 Fix the policy-initialization scheme to correctly be dependent on cores
@@ -18,7 +18,7 @@ Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/canonical/linux-noble/+/
 (cherry picked from commit c7e345eedd65f65a9fcc09805c1feb7afd3e6942)
 
 diff --git a/drivers/cpufreq/tegra194-cpufreq.c b/drivers/cpufreq/tegra194-cpufreq.c
-index e25a51b60fd4e..de989cef6d649 100644
+index e25a51b60fd4..de989cef6d64 100644
 --- a/drivers/cpufreq/tegra194-cpufreq.c
 +++ b/drivers/cpufreq/tegra194-cpufreq.c
 @@ -683,17 +683,24 @@ static int tegra194_cpufreq_init(struct cpufreq_policy *policy)
@@ -52,5 +52,5 @@ index e25a51b60fd4e..de989cef6d649 100644
  	policy->cpuinfo.transition_latency = TEGRA_CPUFREQ_TRANSITION_LATENCY;
 
 -- 
-2.43.0
+2.55.0
 
diff --git a/...es/tegra/platform/patches/0005-NVIDIA-SAUCE-cpufreq-tegra194-Support-read-only-init.patch b/...es/tegra/platform/patches/0005-NVIDIA-SAUCE-cpufreq-tegra194-Support-read-only-init.patch
@@ -1,7 +1,7 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Sumit Gupta <sumitg@nvidia.com>
 Date: Mon, 14 Apr 2025 16:37:11 +0000
-Subject: [PATCH 005/196] NVIDIA: SAUCE: cpufreq: tegra194: Support read-only
+Subject: [PATCH 005/184] NVIDIA: SAUCE: cpufreq: tegra194: Support read-only
  initialization
 
 If a platform uses system registers for frequency readback, support
@@ -23,7 +23,7 @@ Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
 (cherry picked from commit 485d868fa01e2d6522bdf851c47c532b98122cd7)
 
 diff --git a/drivers/cpufreq/tegra194-cpufreq.c b/drivers/cpufreq/tegra194-cpufreq.c
-index de989cef6d649..e0e742a034171 100644
+index de989cef6d64..e0e742a03417 100644
 --- a/drivers/cpufreq/tegra194-cpufreq.c
 +++ b/drivers/cpufreq/tegra194-cpufreq.c
 @@ -1,6 +1,6 @@
@@ -231,5 +231,5 @@ index de989cef6d649..e0e742a034171 100644
 
  	data->cpu_data = devm_kcalloc(&pdev->dev, data->soc->num_clusters *
 -- 
-2.43.0
+2.55.0
 
diff --git a/...es/tegra/platform/patches/0006-dmaengine-of_dma-Add-devm_of_dma_controller_register.patch b/...es/tegra/platform/patches/0006-dmaengine-of_dma-Add-devm_of_dma_controller_register.patch
@@ -1,7 +1,7 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Frank Li <Frank.Li@nxp.com>
 Date: Wed, 25 Feb 2026 16:41:37 -0500
-Subject: [PATCH 006/196] dmaengine: of_dma: Add
+Subject: [PATCH 006/184] dmaengine: of_dma: Add
  devm_of_dma_controller_register()
 
 Add a managed API, devm_of_dma_controller_register(), to simplify DMA
@@ -14,7 +14,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
 (cherry picked from commit 3a005126c9d7f30093627a6f329656c358e16b3a)
 
 diff --git a/include/linux/of_dma.h b/include/linux/of_dma.h
-index fd706cdf255c6..16b08234d03b3 100644
+index fd706cdf255c..16b08234d03b 100644
 --- a/include/linux/of_dma.h
 +++ b/include/linux/of_dma.h
 @@ -38,6 +38,26 @@ extern int of_dma_controller_register(struct device_node *np,
@@ -61,5 +61,5 @@ index fd706cdf255c6..16b08234d03b3 100644
  		void *(*of_dma_route_allocate)
  		(struct of_phandle_args *, struct of_dma *),
 -- 
-2.43.0
+2.55.0
 
diff --git a/...vidia-tegra186-gpc-dma-Add-iommu-ma.patch → ...vidia-tegra186-gpc-dma-Add-iommu-ma.patch b/...vidia-tegra186-gpc-dma-Add-iommu-ma.patch → ...vidia-tegra186-gpc-dma-Add-iommu-ma.patch
@@ -1,7 +1,7 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Akhil R <akhilrajeev@nvidia.com>
 Date: Tue, 31 Mar 2026 15:52:56 +0530
-Subject: [PATCH 009/196] dt-bindings: dma: nvidia,tegra186-gpc-dma: Add
+Subject: [PATCH 007/184] dt-bindings: dma: nvidia,tegra186-gpc-dma: Add
  iommu-map property
 
 Add iommu-map property to specify separate stream IDs for each DMA
@@ -18,7 +18,7 @@ Acked-by: Rob Herring (Arm) <robh@kernel.org>
 Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
 
 diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
-index 64f1e9d9896df..bc093c783d986 100644
+index 64f1e9d9896d..bc093c783d98 100644
 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
 +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
 @@ -14,6 +14,7 @@ description: |
@@ -45,5 +45,5 @@ index 64f1e9d9896df..bc093c783d986 100644
 
    dma-channel-mask:
 -- 
-2.43.0
+2.55.0
 
diff --git a/...es/tegra/platform/patches/0007-dt-bindings-dma-nvidia-tegra186-gpc-dma-Make-reset-o.patch b/...es/tegra/platform/patches/0007-dt-bindings-dma-nvidia-tegra186-gpc-dma-Make-reset-o.patch
diff --git a/features/tegra/platform/patches/0008-arm64-tegra-Remove-fallback-compatible-for-GPCDMA.patch b/features/tegra/platform/patches/0008-arm64-tegra-Remove-fallback-compatible-for-GPCDMA.patch
diff --git a/...e-tegra-Make-reset-control-optional.patch → ...e-tegra-Make-reset-control-optional.patch b/...e-tegra-Make-reset-control-optional.patch → ...e-tegra-Make-reset-control-optional.patch
@@ -1,7 +1,7 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Akhil R <akhilrajeev@nvidia.com>
 Date: Tue, 31 Mar 2026 15:52:57 +0530
-Subject: [PATCH 010/196] dmaengine: tegra: Make reset control optional
+Subject: [PATCH 008/184] dmaengine: tegra: Make reset control optional
 
 On Tegra264, reset is not available for the driver to control as
 this is handled by the boot firmware. Hence make the reset control
@@ -12,10 +12,10 @@ Reviewed-by: Frank Li <Frank.Li@nxp.com>
 Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
 
 diff --git a/drivers/dma/tegra186-gpc-dma.c b/drivers/dma/tegra186-gpc-dma.c
-index 4d6fe0efa76e4..09a1717aa808f 100644
+index 7df0a745e7b8..7857396e859f 100644
 --- a/drivers/dma/tegra186-gpc-dma.c
 +++ b/drivers/dma/tegra186-gpc-dma.c
-@@ -1382,10 +1382,10 @@ static int tegra_dma_probe(struct platform_device *pdev)
+@@ -1389,10 +1389,10 @@ static int tegra_dma_probe(struct platform_device *pdev)
  	if (IS_ERR(tdma->base_addr))
  		return PTR_ERR(tdma->base_addr);
 
@@ -29,5 +29,5 @@ index 4d6fe0efa76e4..09a1717aa808f 100644
  	reset_control_reset(tdma->rst);
 
 -- 
-2.43.0
+2.55.0