[bsp][ra6w1] Optimize System Resource Allocation

bsp/renesas/ra6w1-ek/.config

@@ -107,7 +107,7 @@ CONFIG_SOC_R7SA6W1CED=y
 # end of rt_strnlen options
 # end of klibc options
 
-CONFIG_RT_NAME_MAX=12
+CONFIG_RT_NAME_MAX=32
 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set
 # CONFIG_RT_USING_NANO is not set
 # CONFIG_RT_USING_SMART is not set
@@ -126,10 +126,10 @@ CONFIG_RT_HOOK_USING_FUNC_PTR=y
 # CONFIG_RT_USING_HOOKLIST is not set
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
-CONFIG_IDLE_THREAD_STACK_SIZE=256
+CONFIG_IDLE_THREAD_STACK_SIZE=512
 CONFIG_RT_USING_TIMER_SOFT=y
 CONFIG_RT_TIMER_THREAD_PRIO=4
-CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
+CONFIG_RT_TIMER_THREAD_STACK_SIZE=1024
 # CONFIG_RT_USING_TIMER_ALL_SOFT is not set
 # CONFIG_RT_USING_CPU_USAGE_TRACER is not set
 
@@ -171,7 +171,7 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
 # CONFIG_RT_USING_USERHEAP is not set
 # CONFIG_RT_USING_NOHEAP is not set
 # CONFIG_RT_USING_MEMTRACE is not set
-# CONFIG_RT_USING_HEAP_ISR is not set
+CONFIG_RT_USING_HEAP_ISR=y
 CONFIG_RT_USING_HEAP=y
 # end of Memory Management
 
@@ -183,7 +183,7 @@ CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
 CONFIG_RT_USING_CONSOLE_OUTPUT_CTL=y
-CONFIG_RT_VER_NUM=0x50300
+CONFIG_RT_VER_NUM=0x50301
 # CONFIG_RT_USING_STDC_ATOMIC is not set
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
 # end of RT-Thread Kernel
@@ -229,7 +229,12 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
 # CONFIG_RT_USING_DFS is not set
 # end of DFS: device virtual file system
 
-# CONFIG_RT_USING_FAL is not set
+CONFIG_RT_USING_FAL=y
+CONFIG_FAL_USING_DEBUG=y
+CONFIG_FAL_PART_HAS_TABLE_CFG=y
+# CONFIG_FAL_USING_SFUD_PORT is not set
+CONFIG_FAL_DEV_NAME_MAX=24
+CONFIG_FAL_DEV_BLK_MAX=6
 
 #
 # Device Drivers
@@ -238,7 +243,9 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
 # CONFIG_RT_USING_DEV_BUS is not set
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_UNAMED_PIPE_NUMBER=64
-# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
+CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
+CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=15
 CONFIG_RT_USING_SERIAL=y
 # CONFIG_RT_USING_SERIAL_V1 is not set
 CONFIG_RT_USING_SERIAL_V2=y
@@ -1473,7 +1480,7 @@ CONFIG_BSP_UART0_TX_BUFSIZE=0
 #
 # On-chip Peripheral Port
 #
-# CONFIG_BSP_USING_OSPI_FLASH is not set
+CONFIG_BSP_USING_OSPI_FLASH=y
 # CONFIG_BSP_USING_QSPI_PSRAM is not set
 # end of On-chip Peripheral Port
 # end of Hardware Drivers Config

bsp/renesas/ra6w1-ek/board/ports/ra6w1_pin_ext.h

@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2006-2026, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2026-09-21     rcitach           INITIAL VERSION
+ */
+
+
+#ifndef __RA6W1_PIN_EXT_H__
+#define __RA6W1_PIN_EXT_H__
+
+#ifdef EXTRA_IO_INCLUDE
+#define RA6W1_PIN_INCLUDE_FILE_(name) <name>
+#define RA6W1_PIN_INCLUDE_FILE(name)  RA6W1_PIN_INCLUDE_FILE_(name)
+#include RA6W1_PIN_INCLUDE_FILE(EXTRA_IO_INCLUDE)
+#undef RA6W1_PIN_INCLUDE_FILE
+#undef RA6W1_PIN_INCLUDE_FILE_
+#endif
+
+#ifndef RA6W1_PIN_CFG_EXTRA
+#define RA6W1_PIN_CFG_EXTRA
+#endif
+
+#ifndef RA6W1_PIN_NAME_EXTRA
+#define RA6W1_PIN_NAME_EXTRA
+#endif
+
+#ifndef RA6W1_PIN_COUNT_EXTRA
+#define RA6W1_PIN_COUNT_EXTRA 0
+#endif
+
+#endif /* __RA6W1_PIN_EXT_H__ */

bsp/renesas/ra6w1-ek/ra/SConscript

@@ -14,7 +14,9 @@ CPPPATH = [cwd + "/arm/CMSIS_6/CMSIS/Core/Include",
         cwd + "/fsp/src/bsp_w/cmsis/Device/RENESAS/Include",
         cwd + "/fsp/src/bsp_w/mcu/all",
         cwd + "/fsp/src/bsp_w/mcu/ra6w1",
-        cwd + "/fsp/src/bsp_w/mcu/ra6w1/config"]
+        cwd + "/fsp/src/bsp_w/mcu/ra6w1/config",
+        cwd + "/fsp/src/bsp_w/mcu/ra6w1/config/include",
+]
 
 src += Glob("./board/rrq61xxx_evb/*.c")
 src += Glob("./fsp/src/bsp_w/cmsis/Device/RENESAS/Source/*.c")

bsp/renesas/ra6w1-ek/rafw_gen/pin_data.c

@@ -6,6 +6,7 @@
 #include "bsp_api.h"
 #include "hal_data.h"
 #include "r_gpio_w.h"
+#include "ra6w1_pin_ext.h"
 
 ioport_pin_cfg_t g_bsp_pin_cfg_data[] =
 {
@@ -258,6 +259,7 @@ ioport_pin_cfg_t g_bsp_pin_cfg_data[] =
                    GPIO_W_CFG_PORT_DIRECTION_INPUT | GPIO_W_CFG_SLW_FAST,
     },
 #endif
+RA6W1_PIN_CFG_EXTRA
     {
         .pin = BSP_IO_PORT_01_PIN_16,
         .pin_cfg = GPIO_W_CFG_PERIPHERAL_PIN | GPIO_W_CFG_PORT_DIRECTION_INPUT |
@@ -355,6 +357,7 @@ static const char * const g_bsp_pin_cfg_name[] =
     "qspi.io2",
     "qspi.io3",
 #endif
+RA6W1_PIN_NAME_EXTRA
     "swd.swclk",
     "swd.swdio",
 };
@@ -640,7 +643,7 @@ void ra_w_pin_config_init(void)
 #ifdef BSP_USING_QSPI
     index += 6;
 #endif
-
+    index += RA6W1_PIN_COUNT_EXTRA;
     /* SWD pins are fixed and are always the last two entries. */
     index += 2;
     if (index != RA_W_PIN_CFG_COUNT)

bsp/renesas/ra6w1-ek/rtconfig.h

@@ -63,7 +63,7 @@
 
 /* end of rt_strnlen options */
 /* end of klibc options */
-#define RT_NAME_MAX 12
+#define RT_NAME_MAX 32
 #define RT_CPUS_NR 1
 #define RT_ALIGN_SIZE 8
 #define RT_THREAD_PRIORITY_32
@@ -74,10 +74,10 @@
 #define RT_HOOK_USING_FUNC_PTR
 #define RT_USING_IDLE_HOOK
 #define RT_IDLE_HOOK_LIST_SIZE 4
-#define IDLE_THREAD_STACK_SIZE 256
+#define IDLE_THREAD_STACK_SIZE 512
 #define RT_USING_TIMER_SOFT
 #define RT_TIMER_THREAD_PRIO 4
-#define RT_TIMER_THREAD_STACK_SIZE 512
+#define RT_TIMER_THREAD_STACK_SIZE 1024
 
 /* kservice options */
 
@@ -100,14 +100,15 @@
 
 #define RT_USING_SMALL_MEM
 #define RT_USING_SMALL_MEM_AS_HEAP
+#define RT_USING_HEAP_ISR
 #define RT_USING_HEAP
 /* end of Memory Management */
 #define RT_USING_DEVICE
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart0"
 #define RT_USING_CONSOLE_OUTPUT_CTL
-#define RT_VER_NUM 0x50300
+#define RT_VER_NUM 0x50301
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
 /* end of RT-Thread Kernel */
 #define RT_USING_HW_ATOMIC
@@ -142,11 +143,19 @@
 /* DFS: device virtual file system */
 
 /* end of DFS: device virtual file system */
+#define RT_USING_FAL
+#define FAL_USING_DEBUG
+#define FAL_PART_HAS_TABLE_CFG
+#define FAL_DEV_NAME_MAX 24
+#define FAL_DEV_BLK_MAX 6
 
 /* Device Drivers */
 
 #define RT_USING_DEVICE_IPC
 #define RT_UNAMED_PIPE_NUMBER 64
+#define RT_USING_SYSTEM_WORKQUEUE
+#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
+#define RT_SYSTEM_WORKQUEUE_PRIORITY 15
 #define RT_USING_SERIAL
 #define RT_USING_SERIAL_V2
 #define RT_SERIAL_BUF_STRATEGY_OVERWRITE
@@ -430,6 +439,7 @@
 
 /* On-chip Peripheral Port */
 
+#define BSP_USING_OSPI_FLASH
 /* end of On-chip Peripheral Port */
 /* end of Hardware Drivers Config */
 

bsp/renesas/ra6w1-ek/rtconfig.py

@@ -40,7 +40,7 @@
     DEVICE = ' -mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
     CFLAGS = DEVICE + ' -Dgcc'
     AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
-    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T script/fsp.ld -L script/'
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler,--no-warn-execstack -T script/fsp.ld -L script/'
 
     CPATH = ''
     LPATH = ''

bsp/renesas/ra6w1-ek/script/fsp.ld

@@ -1,4 +1,5 @@
 INCLUDE memory_regions.ld
+INCLUDE rom_code_gcc.symbols
 MEMORY
 {
 	RAM (rwx) : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
@@ -382,4 +383,3 @@ PROVIDE( _end = __HeapBase);
 PROVIDE( __end__ = __HeapBase);
 
 ASSERT(__HeapBase <= __HeapLimit, "RAM overflow: no space left for RT-Thread heap");
-