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[C++] bpacking relies on a left shift by the full lane width returning zero #51492
Description
Describe the bug, including details regarding any error messages, version, and platform.
Arrow's bpacking large kernel asks xsimd for a left shift by the full width of the lane, and depends on the answer being zero.
xsimd does not promise that. SSE2, AVX2 and NEON produce zero, while other instruction sets (e.g. LSX, LASX) take the amount modulo the lane width and return the lane untouched.
The bits then survive the mask and the value decodes incorrectly, with no error reported.
Component(s)
C++
Activity
[-]bpacking relies on a left shift by the full lane width returning zero[/-][+][C++] bpacking relies on a left shift by the full lane width returning zero[/+]apacheGH-51492: [C++] Do not left shift a bpacking lane by its full w…
apacheGH-51492: [C++] Do not left shift a bpacking lane by its full w…
GH-51492: [C++] Do not left shift a bpacking lane by its full width (#…
pitrou commentedon Sep 29, 2026
Issue resolved by pull request 51493
#51493