Use Clash v1.10.0

[DigitalBrains1]

Some additional changes to the DECA starter:

• Use altpllSync

  altpll was removed from Clash 1.10.

  Using altpllSync is the proper thing to teach our users anyway; with it, you no longer need unsafe... calls and the user doesn't need to get them right.

• Change design clock to 40 MHz

  The crystal on the board runs at 50 MHz, a period of 20 ps.

  Before, we created a design clock of 20 MHz, a period of 50 ps. And named the clock domain and bindings after the period.

  This is quite confusing, since the numbers 20 and 50 apply to both clocks, and indeed this caused a mistake in one of the comments. The comment on the PLL instantiation said it converted a 20 MHz clock into a 50 MHz clock when it was actually the other way around.

  So let's make the design clock 40 MHz, a period of 25 ps. That way you can't confuse them as easily. Also, name everything after the frequency (Dom40, clk50, clk40). We don't even need to refer to the actual period anymore if we use hzToPeriod in createDomain.

[DigitalBrains1]

Oh, by the way, this afternoon I'll have a chance to actually try out the changed DECA project on real hardware. I'll do that before I hit merge, but I actually already looked at the changes I made in Quartus's Technology Map Viewer, so I'm pretty certain it's right.

[edit]
Aw, that's too bad, I don't have the dev kit available after all. But I feel confident it's correct, and I will test it, just after we have merged this, imo.
[/edit]

[DigitalBrains1]

Ah yeah, CI needs an update too, it's using too old versions of GHC for Cabal.

[rowanG077]

Seeing it in action makes clear how much nicer this new PLL API is.