Issues

• Editor UI package and editing bridge

  enhancement
  logvik-org/bust#254 · Filter by author olagrottvik opened on Oct 27, 2026

• SystemVerilog output

  enhancement
  logvik-org/bust#253 · Filter by author olagrottvik opened on Oct 27, 2026

• HTML/markdown docs on every run, PDF only when pdflatex is present

  enhancement
  logvik-org/bust#248 · Filter by author olagrottvik opened on Oct 27, 2026 · 1.1.0: cloud-ready core

• Formal verification of the bus endpoints

  enhancementvhdl
  logvik-org/bust#247 · Filter by author olagrottvik opened on Oct 23, 2026

• VS Code extension for bust register maps, sharing the editor UI with cloudbust

  enhancement
  Feature

  logvik-org/bust#235 · Filter by author olagrottvik opened on Oct 22, 2026

• Byte enables: honour wstrb, pstrb, byteenable and sel

  enhancement
  Feature

  logvik-org/bust#220 · Filter by author olagrottvik opened on Oct 21, 2026

• Run vsg automatically on generated VHDL as a post-generation pass

  enhancementvhdl
  Feature

  logvik-org/bust#167 · Filter by author olagrottvik opened on Jun 24, 2026

• Raw (whole-register) HW access alongside field access — design discussion (post-v1)

  enhancement
  Feature

  logvik-org/bust#155 · Filter by author olagrottvik opened on Jun 15, 2026

• SystemRDL + beyond features

  enhancement
  Feature

  logvik-org/bust#98 · Filter by author olagrottvik opened on Jul 7, 2025

• TOML specification (in addition to JSON)

  enhancement
  Feature

  logvik-org/bust#95 · Filter by author olagrottvik opened on Jul 7, 2025

• Registers definition export: SystemRDL

  enhancement
  Feature

  logvik-org/bust#94 · Filter by author olagrottvik opened on Jul 7, 2025

• Registers definition export: IP-XACT

  enhancement
  Feature

  logvik-org/bust#93 · Filter by author olagrottvik opened on Jul 7, 2025