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chore(rivet): RQ-59-MEASURE and RQ-59-WCETI64 are implemented - #1027

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chore(rivet): RQ-59-MEASURE and RQ-59-WCETI64 are implemented#1027
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@avrabe avrabe commented Aug 21, 2026

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#1025 and #1026 merged. v0.59 now 6/11.

Like RQ-59-REACH, MEASURE is implemented on a verdict rather than a change: DO NOT FLIP. The colourer wins on net (−122 B, −31 instructions, −72 push/pop registers) but does not dominate — frame traffic +22 — and the named root cause is that the Chaitin occurrence-count cost metric prices a 2-byte register copy and a 4-byte frame reload identically. Delivering the verdict is the artifact; the flip is a separate gated step needing gale silicon evidence.

WCETI64 closed #936's residual: all four ops priced from the real encoder's byte length (never a hand mirror — that method was tried in #936 and found unsound at authoring). The OS shape that motivated the issue — narrowing an i64 read to i32 — now bounds at 80 cycles instead of declining. Two of the four ops moved no decline, and the lane reported that rather than counting them as wins.

claim_check 50/50. Rivet artifact only.

Refs #242, #936.

#1025 and #1026 merged. v0.59 now 6/11.

Like RQ-59-REACH, MEASURE is implemented on a verdict rather than a change:
DO NOT FLIP. The colourer wins on net (-122 B, -31 insns, -72 push/pop regs)
but does not dominate — frame traffic +22 — and the named root cause is that
the Chaitin occurrence-count cost metric prices a 2-byte register copy and a
4-byte frame reload identically. Delivering the verdict IS the artifact; the
flip is a separate gated step needing silicon evidence.

WCETI64 closed #936's residual: all four ops priced from the real encoder's
byte length, and the OS shape that motivated the issue (narrow an i64 read to
i32) now bounds at 80 cycles instead of declining. Two of the four ops moved
no decline and the lane said so rather than counting them as wins.

Refs #242, #936.
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✅ All modified and coverable lines are covered by tests.

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avrabe merged commit f33d814 into main Aug 21, 2026
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avrabe deleted the chore/rivet-v59-progress3 branch August 21, 2026 17:45
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wcet: two opcodes (I64Const, I64Str) account for all 9 unmodeled-op declines on a whole OS — and 11 cascades behind them

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