…locks
The LT9611UXC bridge can fetch only 2 EDID blocks at a time, which
previously limited EDID reading to 2 blocks and prevented support
for displays exposing more than 2 EDID blocks.
Add driver support to fetch up to 4 EDID blocks by re-triggering
EDID access after the first 2 blocks are read. For block 0 and 2,
set the EDID ready flag in 0xb028 so the bridge can expose the
corresponding EDID blocks, then retry the read until the expected
EDID is fetched.
Reset the edid_read flag on HPD disconnect so that the next
connect event triggers a fresh EDID fetch.
Increase EDID wait time from 500ms to 1000ms, On Qualcomm rb3gen2
platform sometimes edid read interrupt is coming 600-650 ms after
HPD interrupt resulting in edid read failure.
Signed-off-by: Ravi Agola <raviagol@qti.qualcomm.com>
Link: https://lore.kernel.org/r/20260624-lt9611usc_edid34_misc_next-v2-1-24ce3f5770b8@oss.qualcomm.com
Signed-off-by: Vishnu Saini <vishnu.saini@oss.qualcomm.com>
revert the previous commits which were not followed in upstream.
And add:
drm/bridge: lt9611uxc: support displays with up to 4 EDID blocks
CRs-Fixed: 4202439