Compare all 64 bits in the relational branches - #208
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Pull request overview
This PR fixes R5900 relational-branch codegen to compare the full 64-bit GPR value (matching hardware behavior) instead of only the low 32 bits, preventing incorrect branching when registers contain non-canonical 64-bit quantities.
Changes:
- Emit BLEZ/BGTZ to use
GPR_S64instead ofGPR_S32. - Emit REGIMM BLTZ/BGEZ (and variants) to use
GPR_S64instead ofGPR_S32. - Add an explanatory comment describing why 64-bit compares are required (comment wording needs a small correction per review).
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| // The R5900 compares the full 64-bit GPR for the relational branches, as it | ||
| // already does for BEQ/BNE above. Comparing only the low word takes the wrong | ||
| // branch whenever the upper half is significant, which happens with the | ||
| // dsll32/dsra32 sign-extension idiom compilers emit ahead of these opcodes. |
BEQ and BNE already compare the full GPR, but BLEZ, BGTZ, BLTZ and BGEZ (and their likely/and-link variants) were emitted against the low word only. The R5900 compares the whole 64-bit register, so any value whose upper half is significant takes the wrong branch. Compilers reach these opcodes through the dsll32/dsra32 sign-extension idiom, which leaves a canonical value and hides the bug; code that keeps a genuine 64-bit quantity in the register does not.
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BEQ and BNE already compare the full GPR via
GPR_U64, but BLEZ, BGTZ, BLTZ and BGEZ — and their likely and and-link variants — were emitted against the low word only:The R5900 compares the whole 64-bit register for these, so any value whose upper half is significant takes the wrong branch.
It is easy to miss because compilers usually reach these opcodes through the
dsll32/dsra32sign-extension idiom, which leaves a canonical value where the low word alone gives the right answer. Code that keeps a genuine 64-bit quantity in the register does not.instruction_translator.cppdefers all branch opcodes to the control-flow emitter, so this is the only site.