refactor(asm): unify backend naming, register constants, and printer surface - #18
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refactor(asm): unify backend naming, register constants, and printer surface#18Boreas618 wants to merge 1 commit into
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Re-author onto the asmt-4 skeleton (the old three-commit series cannot survive a mechanical rebase). Re-applies the PR's goals where the skeleton does not already achieve them.
Rename the backend-local types that collide with front-end names: FunctionGenerator -> AsmFunctionGenerator (ir::function defines the same name), Operand -> InstOperand (vs ir::Operand), and BinOp -> InstBinOp, which also removes the Instruction::BinOp { op: BinOp } self-shadowing. The float types (FBinOp, RegisterSize, RegisterClass) keep their names; none collide. IndexOperand::{Reg, Imm} was isomorphic to InstOperand::{Register, Immediate} and existed only for Instruction::Gep's index field, so Gep now takes an InstOperand and the redundant enum is gone. IR types keep their names throughout.
Fold the single-implementor AsmPrint trait into inherent AsmPrinter methods and reuse emit_label in the Instruction::Label arm. Whole-program orchestration (sections, globals, per-function symbol/uses_fp/prologue emission) moves from AArch64AsmGenerator::output into AsmPrinter::emit_program / emit_function, so output() delegates wholesale, mirroring how the ir layer's output() delegates to IrPrinter::emit_module. Drop the dead public re-exports of Instruction/types from asm::aarch64 (nothing outside the backend consumes them) and let the register allocator import InstBinOp from its defining module.
Add the missing //! module docs across src/asm and sweep all backend comments against the comment spec: rewrite the "asks you to implement" audience leak and first-person narration into declarative why-form, delete the floating section header in the rewriter and the what-restatements in lower_ptr, and fix stale RegSize / B { Cond, label } references that contradicted the code.
Already achieved by the skeleton and deliberately not redone: SCRATCH0/SCRATCH1 and the AAPCS register-role constants are centralized in types.rs, and aapcs.rs / frame.rs carry their own module docs. Float / aapcs / frame functionality is untouched; emitted assembly is unchanged (byte-for-byte orchestration order preserved).
cargo test: 30/30 golden end-to-end green.
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AArch64-backend unification from the cross-layer audit:
FunctionGenerator→AsmFunctionGenerator,Operand→InstOperand,BinOp→InstBinOp(also killing theInst::BinOp { op: BinOp }self-shadowing); IR types keep their names.aarch64::regsmodule (arg regs x0-x7, frame pointer x29, link register x30, scratch x16/x17, allocatable set, 16-byte stack alignment); duplicatedSCRATCH0/1definitions and all rawPhysical(29|30|16|17|0)literals eliminated.IndexOperand::{Reg, Imm}was isomorphic toInstOperand::{Register, Immediate}and existed only forInst::Gep's index — folded intoInstOperand.asm/aarch64.rs; the single-implementorAsmPrinttrait folded into inherentAsmPrintermethods; duplicateInst::Labelprinting paths merged.AArch64AsmGenerator::outputnow delegates wholesale toAsmPrinter::emit_program, like ir'soutput()delegates toIrPrinter::emit_module— emitted assembly is byte-identical.//!module docs for all files undersrc/asm/**.No instruction-selection or register-allocation behavior changes. Verified:
cargo test30/30 green.