All issues

Search results

[DXA][SimX] GMEM responses drain in issue order unlike RTL OoO direct drain

Status: Open.

#384 In vortexgpgpu/vortex;

· ForeverHYX opened on Aug 1, 2026

Using gem5 for cache modeling with Vortex?

Status: Open.

#382 In vortexgpgpu/vortex;

· StarikTenger opened on Jul 21, 2026

SIGBUS / AXI firewall trip (CTRL_USER) writing CTL_AP_RESET bit to vortex_afu s_axi_ctrl on Alveo U55C (xrt driver) — reliably alternates pass/fail

Status: Open.

#379 In vortexgpgpu/vortex;

· zmbcst-git opened on Jul 9, 2026

Performance issue related to register spilling

Status: Open.

#377 In vortexgpgpu/vortex;

· gtkiku opened on Jul 7, 2026

VCK5000 ES1 (CP-AFU): timing-clean build hangs — CP CMD_LAUNCH never retires (cp_busy=0), follow-up to #333

Status: Open.

#366 In vortexgpgpu/vortex;

· hwirys opened on Jun 15, 2026

Validate store-before-load / writeback ordering at the LLC↔DRAM boundary on real HW

Status: Open.

#364 In vortexgpgpu/vortex;

· tinebp opened on Jun 14, 2026

simx: srai instruction yields incorrect results

Status: Open.

#319 In vortexgpgpu/vortex;

· cassuto opened on Feb 13, 2026