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1. DDR2_Controller DDR2_Controller Public

   DDR2 memory controller written in Verilog

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2. nvim nvim Public

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3. Interrupt_Controller Interrupt_Controller Public

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4. brokenBench brokenBench Public

   Systemverilog and UVM exercises inspired by ziglings

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5. uvmBasics uvmBasics Public

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6. alu_tb alu_tb Public

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