simx/dxa: match RTL out-of-order response drain

[ForeverHYX]

Problem

DXA GMEM responses are drained differently in RTL and SimX. The RTL direct-drain path can consume a ready non-last response without waiting for an older request, while SimX always waits for the oldest issued tag. This makes SimX serialize response handling when GMEM responses return out of order.

Fix

• Select any ready non-last response for direct drain in SimX.
• Keep the selected slot active until all of its multicast or scatter writes finish.
• Defer the last response until it is the only outstanding response so completion notification remains ordered.
• Add a deterministic unit test that returns three GMEM reads in C, B, A order and verifies the LMEM write and completion behavior.

Validation

• make -C tests/unittest run OBJCACHE=
• make -C hw/unittest/dxa_core run OBJCACHE=
• make -C tests/regression/dxa_copy run-simx
• make -C tests/regression/dxa_copy_mcast run-simx
• make -C tests/regression/dxa_kmajor_check run-simx
• make -C tests/regression/sgemm2_dxa run-simx
• DXA-enabled and default SimX builds

Fixes #384

[Copilot]

Pull request overview

Aligns the SimX DXA GMEM-response drain behavior with the RTL’s out-of-order “direct drain” semantics (non-last responses may drain when ready; the last response remains deferred to preserve ordered completion notification). Adds a deterministic SimX unit test to exercise out-of-order return sequences and validate LMEM writes and notify_done behavior.

Changes:

• Update sim/simx/dxa/dxa_core.cpp to select any ready non-last inflight slot for draining and keep a selected slot active until its multicast/scatter writes complete; only drain the last slot when it is the only outstanding response.
• Add a new unit test (tests/unittest/dxa_ooo) and hook it into both tests/unittest and sim/simx build/run targets.
• Extend sim/simx/Makefile with a test-dxa-ooo target and build rules for dxa_ooo_test.

Reviewed changes

Copilot reviewed 5 out of 5 changed files in this pull request and generated 1 comment.

Show a summary per file

File	Description
tests/unittest/Makefile	Adds dxa_ooo to the unit-test project list so it runs with the unittest suite.
tests/unittest/dxa_ooo/Makefile	New unittest wrapper that builds/runs the SimX dxa_ooo_test with DXA enabled.
tests/unittest/dxa_ooo/main.cpp	New deterministic OoO-response test validating LMEM writes and ordered completion notification behavior.
sim/simx/Makefile	Builds dxa_ooo_test and adds a test-dxa-ooo run target; includes dependency tracking and cleanup.
sim/simx/dxa/dxa_core.cpp	Implements OoO direct-drain selection with drain_slot pinning and ordered last-response deferral.

Suppressed comments (3)

tests/unittest/dxa_ooo/main.cpp:127

• The expected LMEM address for B is hard-coded (0x240). To keep the test configuration-independent, derive this from the configured line size and SMEM base (e.g., base + 1*VX_CFG_L1_LINE_SIZE).

  check_write(wait_for_lmem_write(dxa.get()), 0x240, 0xbb, false);

tests/unittest/dxa_ooo/main.cpp:116

• The GMEM address assertions are hard-coded for 64B cache lines (0x1000/0x1040/0x1080). If VX_CFG_L1_LINE_SIZE changes, the addresses and/or number of reads will change even though the OoO drain behavior under test is still correct. Consider expressing these expectations in terms of VX_CFG_L1_LINE_SIZE and the base address.

  if (reads.at(0).addr != 0x1000 || reads.at(1).addr != 0x1040 || reads.at(2).addr != 0x1080)
    fail("unexpected GMEM request addresses");

tests/unittest/dxa_ooo/main.cpp:132

• The expected LMEM addresses for A/C are hard-coded (0x200/0x280). Deriving these from the SMEM base and VX_CFG_L1_LINE_SIZE makes the test robust to configuration changes.

  check_write(wait_for_lmem_write(dxa.get()), 0x200, 0xaa, false);
  check_write(wait_for_lmem_write(dxa.get()), 0x280, 0xcc, true);

---

💡 Add Copilot custom instructions for smarter, more guided reviews. Learn how to get started.